Patents by Inventor Takeshi Fukunaga

Takeshi Fukunaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6919237
    Abstract: A process for fabricating a semiconductor device including the steps of introducing into an amorphous silicon film, a metallic element which accelerates the crystallization of the amorphous silicon film, applying heat treatment to the amorphous silicon film to obtain a crystalline silicon film, irradiating a laser beam or an intense light to the crystalline silicon film, and heat treating the crystalline silicon film irradiated with a laser beam or an intense light.
    Type: Grant
    Filed: July 2, 2003
    Date of Patent: July 19, 2005
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hisashi Ohtani, Takeshi Fukunaga, Akiharu Miyanaga
  • Publication number: 20050151201
    Abstract: A process for producing an adhered SOI substrate without causing cracking and peeling of a single-crystal silicon thin film. The process consists of selectively forming a porous silicon layer in a single-crystal semiconductor substrate, adding hydrogen into the single-crystal semiconductor substrate to form a hydrogen-added layer, adhering the single-crystal semiconductor substrate to a supporting substrate, separating the single-crystal semiconductor substrate at the hydrogen-added layer by thermal annealing, performing thermal annealing again to stabilize the adhering interface, and selectively removing the porous silicon layer to give single-crystal silicon layer divided into islands.
    Type: Application
    Filed: March 10, 2005
    Publication date: July 14, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Takeshi Fukunaga
  • Patent number: 6909148
    Abstract: A semiconductor thin film is formed having a lateral growth region which is a collection of columnar or needle-like crystals extending generally parallel with a substrate. The semiconductor thin film is illuminated with laser light or strong light having equivalent energy. As a result, adjacent columnar or needle-like crystals are joined together to form a region having substantially no grain boundaries, i.e., a monodomain region which can substantially be regarded as a single crystal. A semiconductor device is formed by using the monodomain region as an active layer.
    Type: Grant
    Filed: August 26, 2003
    Date of Patent: June 21, 2005
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Akiharu Miyanaga, Jun Koyama, Takeshi Fukunaga
  • Patent number: 6906347
    Abstract: A semiconductor device having high reliability, in which TFTs with appropriate structures for the circuit functions are arranged, is provided. Gate insulating films (115) and (116) of a driver TFT are designed thinner than a gate insulating film (117) of a pixel TFT in a semiconductor device having a driver circuit and a pixel section on the same substrate. In addition, the gate insulating films (115) and (116) of the driver TFT and a dielectric (118) of a storage capacitor are formed at the same time, so that the dielectric (118) may be extremely thin, and a large capacity can be secured.
    Type: Grant
    Filed: June 5, 2001
    Date of Patent: June 14, 2005
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Hiroshi Shibata, Takeshi Fukunaga
  • Patent number: 6894431
    Abstract: A light-emitting device having the quality of an image high in homogeneity is provided. A printed wiring board (second substrate) (107) is provided facing a substrate (first substrate) (101) that has a luminous element (102) formed thereon. A PWB side wiring (second group of wirings) (110) on the printed wiring board (107) is electrically connected to element side wirings (first group of wirings) (103, 104) by anisotropic conductive films (105a, 105b). At this point, because a low resistant copper foil is used to form the PWB side wiring (110), a voltage drop of the element side wirings (103, 104) and a delay of a signal can be reduced. Accordingly, the homogeneity of the quality of an image is improved, and the operating speed of a driver circuit portion is enhanced.
    Type: Grant
    Filed: December 7, 2000
    Date of Patent: May 17, 2005
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Takeshi Fukunaga
  • Patent number: 6890784
    Abstract: Disclosed herein is a semiconductor device with high reliability which has TFT of adequate structure arranged according to the circuit performance required. The semiconductor has the driving circuit and the pixel portion on the same substrate. It is characterized in that the storage capacitance is formed between the first electrode formed on the same layer as the light blocking film and the second electrode formed from a semiconductor film of the same composition as the drain region, and the first base insulating film is removed at the part of the storage capacitance so that the second base insulating film is used as the dielectric of the storage capacitance. This structure provides a large storage capacitance in a small area.
    Type: Grant
    Filed: June 3, 2003
    Date of Patent: May 10, 2005
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Hiroshi Shibata, Takeshi Fukunaga
  • Publication number: 20050093852
    Abstract: There is disclosed an electrooptical device capable of achieving a large area display by making full use of the size of the substrate. An active matrix substrate acts as a driver portion for the reflection-type electrooptical device. A pixel matrix circuit and logic circuitry are formed on the active matrix substrate. At this time, the logic circuitry is disposed, by making use of a dead space in the pixel matrix circuit. The area occupied by the pixel matrix circuit, or image display region, can be enlarged without being limited by the area occupied by the logic circuitry.
    Type: Application
    Filed: November 2, 2004
    Publication date: May 5, 2005
    Inventors: Shunpei Yamazaki, Jun Koyama, Takeshi Fukunaga
  • Patent number: 6888160
    Abstract: To provide a technology for fabricating a bottom gate type TFT by steps having high mass production performance, an insulating film whose major component is silicon is formed on an active layer, the insulating film is patterned and openings are formed at portions thereof constituting source and drain regions at later steps, a resist is provided right above a portion for forming a channel forming region at later steps, a step of adding an impurity is carried out and in this case, the patterned insulating film is utilized as a doping mask.
    Type: Grant
    Filed: October 2, 1998
    Date of Patent: May 3, 2005
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Setsuo Nakajima, Takeshi Fukunaga
  • Publication number: 20050088433
    Abstract: There is disclosed an electrooptical device capable of achieving a large area display by making full use of the size of the substrate. An active matrix substrate acts as a driver portion for the reflection-type electrooptical device. A pixel matrix circuit and logic circuitry are formed on the active matrix substrate. At this time, the logic circuitry is disposed, by making use of a dead space in the pixel matrix circuit. The area occupied by the pixel matrix circuit, or image display region, can be enlarged without being limited by the area occupied by the logic circuitry.
    Type: Application
    Filed: November 29, 2004
    Publication date: April 28, 2005
    Inventors: Shunpei Yamazaki, Jun Koyama, Takeshi Fukunaga
  • Patent number: 6879309
    Abstract: An EL display having high operating performance and reliability is provided. LDD regions 15a through 15d of a switching TFT 201 formed in a pixel are formed such that they do not overlap gate electrodes 19a and 19b to provide a structure which is primarily intended for the reduction of an off-current. An LDD region 22 of a current control TFT 202 is formed such that it partially overlaps a gate electrode 35 to provide a structure which is primarily intended for the prevention of hot carrier injection and the reduction of an off-current. Appropriate TFT structures are thus provided depending on required functions to improve operational performance and reliability.
    Type: Grant
    Filed: January 7, 2003
    Date of Patent: April 12, 2005
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yukio Yamauchi, Takeshi Fukunaga
  • Publication number: 20050073241
    Abstract: An EL display device capable of performing clear multi-gradation color display and electronic equipment provided with the EL display device are provided, wherein gradation display is performed according to a time-division driving method in which the luminescence and non-luminescence of an EL element (109) disposed in a pixel (104) are controlled by time, and the influence by the characteristic variability of a current controlling TFT (108) is prevented. When this method is used, a data signal side driving circuit (102) and a gate signal side driving circuit (103) are formed with TFTs that use a silicon film having a peculiar crystal structure and exhibit an extremely high operation speed.
    Type: Application
    Filed: November 4, 2004
    Publication date: April 7, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yukio Yamauchi, Takeshi Fukunaga
  • Publication number: 20050073242
    Abstract: An EL display device capable of performing clear multi-gradation color display and electronic equipment provided with the EL display device are provided, wherein gradation display is performed according to a time-division driving method in which the luminescence and non-luminescence of an EL element (109) disposed in a pixel (104) are controlled by time, and the influence by the characteristic variability of a current controlling TFT (108) is prevented. When this method is used, a data signal side driving circuit (102) and a gate signal side driving circuit (103) are formed with TFTs that use a silicon film having a peculiar crystal structure and exhibit an extremely high operation speed.
    Type: Application
    Filed: November 4, 2004
    Publication date: April 7, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yukio Yamauchi, Takeshi Fukunaga
  • Patent number: 6875633
    Abstract: A process for producing an adhered SOI substrate without causing cracking and peeling of a single-crystal silicon thin film. The process consists of selectively forming a porous silicon layer in a single-crystal semiconductor substrate, adding hydrogen into the single-crystal semiconductor substrate to form a hydrogen-added layer, adhering the single-crystal semiconductor substrate to a supporting substrate, separating the single-crystal semiconductor substrate at the hydrogen-added layer by thermal annealing, performing thermal annealing again to stabilize the adhering interface, and selectively removing the porous silicon layer to give single-crystal silicon layer divided into islands.
    Type: Grant
    Filed: August 4, 2003
    Date of Patent: April 5, 2005
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Takeshi Fukunaga
  • Patent number: 6867085
    Abstract: Dot-pattern-like impurity regions are artificially and locally formed in a channel forming region. The impurity regions restrain the expansion of a drain side depletion layer toward the channel forming region to prevent the short channel effect. The impurity regions allow a channel width W to be substantially fined, and the resultant narrow channel effect releases the lowering of a threshold value voltage which is caused by the short channel effect.
    Type: Grant
    Filed: December 13, 2000
    Date of Patent: March 15, 2005
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hisashi Ohtani, Takeshi Fukunaga
  • Publication number: 20050017940
    Abstract: In an electrooptical device including an electrooptical modulating layer between a first substrate 101 and a second substrate 105, all edges 107 to 109 of the first substrate 101 and the second substrate 105, except an edge where IC chips 110 and 111 are attached, are trued up each other between the first substrate 101 and the second substrate 105. By this, it is possible to make the area of the first substrate 101 minimum.
    Type: Application
    Filed: August 16, 2004
    Publication date: January 27, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Yoshiharu Hirakata, Takeshi Fukunaga
  • Publication number: 20050020006
    Abstract: A method for manufacturing a semiconductor device such as a thin film transistor using a crystal silicon film is provided. The crystal silicon film is obtained by selectively forming films, particles or clusters containing nickel, iron, cobalt, ruthenium, rhodium, paradium, osmium, iridium, platinum, scandium, titanium, vanadium, chrome, manganese, copper, zinc, gold, silver or silicide thereof in a form of island, line, stripe, dot or film on or under an amorphous silicon film and using them as a starting point, by advancing its crystallization by annealing at a temperature lower than a normal crystallization temperature of an amorphous silicon. A transistor whose leak current is low and a transistor in which a mobility is high are obtained in the same time in structuring a dynamic circuit having a thin film transistor by selectively forming a cover film on a semiconductor layer which is to become an active layer of the transistor and by thermally crystallizing it thereafter.
    Type: Application
    Filed: August 26, 2004
    Publication date: January 27, 2005
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Hideki Uochi, Toru Takayama, Takeshi Fukunaga, Yasuhiko Takemura
  • Publication number: 20050012445
    Abstract: To provide a high throughput film deposition means for film depositing an organic EL material made of polymer accurately and without any positional shift. A pixel portion is divided into a plurality of pixel rows by a bank, and a head portion of a thin film deposition apparatus is scanned along a pixel row to thereby simultaneously apply a red light emitting layer application liquid, a green light emitting layer application liquid, and a blue light emitting layer application liquid in stripe shapes. Heat treatment is then performed to thereby form light emitting layers luminescing each of the colors red, green, and blue.
    Type: Application
    Filed: July 30, 2004
    Publication date: January 20, 2005
    Inventors: Shunpei Yamazaki, Kunitaka Yamamoto, Masaaki Hiroki, Takeshi Fukunaga
  • Patent number: 6844683
    Abstract: An EL display device capable of performing clear multi-gradation color display and electronic equipment provided with the EL display device are provided, wherein gradation display is performed according to a time-division driving method in which the luminescence and non-luminescence of an EL element (109) disposed in a pixel (104) are controlled by time, and the influence by the characteristic variability of a current controlling TFT (108) is prevented. When this method is used, a data signal side driving circuit (102) and a gate signal side driving circuit (103) are formed with TFTs that use a silicon film having a peculiar crystal structure and exhibit an extremely high operation speed.
    Type: Grant
    Filed: July 19, 2002
    Date of Patent: January 18, 2005
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yukio Yamauchi, Takeshi Fukunaga
  • Publication number: 20050007535
    Abstract: In a liquid crystal display device which performs image display by controlling a liquid crystal layer by a lateral electric field that is parallel with a substrate, the lateral electric field is formed by a black matrix and a pixel electrode. That is, a common electrode and a black matrix are commonized which are separately provided conventionally. Further, a storage capacitor is formed in an area where the black matrix and a pixel line coextend with a third interlayer insulating film interposed in between. Since the storage capacitor is formed by using all the area where a thin-film transistor is covered with the black matrix, sufficient capacitance can be secured even if the widths of electrodes and wiring lines are reduced in the future.
    Type: Application
    Filed: July 27, 2004
    Publication date: January 13, 2005
    Inventors: Yoshiharu Hirakata, Takeshi Nishi, Shunpei Yamazaki, Takeshi Fukunaga
  • Patent number: 6835675
    Abstract: A laser-irradiation method which comprises a process for fabricating a semiconductor device, comprising: a first step of forming a thin film amorphous semiconductor on a substrate having an insulating surface; a second step of modifying the thin film amorphous semiconductor into a crystalline thin film semiconductor by irradiating a pulse-type linear light and/or by applying a heat treatment; a third step of implanting an impurity element which imparts a one conductive type to the crystalline thin film semiconductor; and a fourth step of activating the impurity element by irradiating a pulse-type linear light and/or by applying a heat treatment; wherein the peak value, the peak width at half height, and the threshold width of the laser energy in the second and the fourth steps above are each distributed within a range of approximately ±3% of the standard value. Also claimed is a laser irradiation device which realizes the method above.
    Type: Grant
    Filed: December 10, 2002
    Date of Patent: December 28, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Teramoto, Naoto Kusumoto, Takeshi Fukunaga, Setsuo Nakajima, Tadayoshi Miyamoto, Atsushi Yoshinouchi