Patents by Inventor Takeshi Horiguchi

Takeshi Horiguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200286864
    Abstract: There are provided a small-sized power semiconductor module and a small-sized power conversion device capable of reducing ringing voltage. A power semiconductor module includes: a positive electrode-side switching element and a positive electrode-side freewheeling diode corresponding to a positive electrode-side power semiconductor element; a negative electrode-side switching element and a negative electrode-side freewheeling diode corresponding to a negative electrode-side power semiconductor element; a positive electrode conductor pattern; a negative electrode conductor pattern; an AC electrode pattern; and a snubber substrate including an insulating substrate having a snubber circuit formed thereon. The snubber substrate includes the insulating substrate and the at least one snubber circuit arranged on the insulating substrate. The snubber substrate is arranged on at least one of the positive electrode conductor pattern, the negative electrode conductor pattern and the AC electrode pattern.
    Type: Application
    Filed: February 2, 2018
    Publication date: September 10, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takeshi HORIGUCHI, Yuji MIYAZAKI, Tatsunori YANAGIMOTO
  • Publication number: 20200212906
    Abstract: A drive circuit for a power semiconductor element according to the present disclosure includes: a control command unit that outputs a turn-on command for a power semiconductor element; a gate voltage detection unit that detects a gate voltage applied to a gate terminal after the control command unit outputs the turn-on command; a differentiator that subjects the gate voltage detected by the gate voltage detection unit to time differentiation; and a determination unit that determines, based on the gate voltage detected by the gate voltage detection unit and a differential value by the differentiator, whether the power semiconductor element is in a short-circuit state or not.
    Type: Application
    Filed: May 17, 2018
    Publication date: July 2, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yasushige MUKUNOKI, Takashi MASUHARA, Takeshi HORIGUCHI
  • Patent number: 10700678
    Abstract: A voltage driver shifts a voltage on a gate as a control terminal of a power semiconductor element in response to an ON command or an OFF command. A gate voltage detector generates a detection signal of a gate-emitter voltage. A delay signal generator generates a delay signal obtained by adding a delay time to the detection signal. A subtractor generates a voltage difference signal between the detection signal and the delay signal. When the voltage difference signal exceeds a reference voltage during an operation of turning on the power semiconductor element, a short-circuit state detector detects a hard-switching fault.
    Type: Grant
    Filed: May 30, 2016
    Date of Patent: June 30, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takeshi Horiguchi, Yasushi Nakayama
  • Patent number: 10637345
    Abstract: A semiconductor device includes a positive electrode-side semiconductor element, a negative electrode-side semiconductor element, a positive electrode plate, a negative electrode plate, an AC electrode plate, a positive electrode-side auxiliary electrode terminal, a negative electrode-side auxiliary electrode terminal, a positive electrode-side capacitor, and a negative electrode-side capacitor. The positive electrode plate is connected to a first positive electrode of the positive electrode-side semiconductor element. The negative electrode plate is connected to a second negative electrode of the negative electrode-side semiconductor element. The AC electrode plate is connected to a first negative electrode of the positive electrode-side semiconductor element and a second positive electrode of the negative electrode-side semiconductor element. The positive electrode-side capacitor is connected to the positive electrode plate and the positive electrode-side auxiliary electrode terminal.
    Type: Grant
    Filed: June 23, 2017
    Date of Patent: April 28, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takashi Masuhara, Takeshi Horiguchi, Mamoru Kamikura, Kodai Katagiri
  • Publication number: 20200127657
    Abstract: A drive circuit includes: a signal generation circuit; a comparator; a comparator; and a short circuit determination unit. The signal generation circuit is configured to generate, as an output signal, a differential amplification signal of a voltage detection signal indicating a gate voltage of a semiconductor element and a delay signal of the voltage detection signal. The comparator is configured to compare a value of the differential amplification signal with a first reference voltage value. The comparator is configured to compare a voltage value indicating a gate current with a second reference voltage value. The short circuit determination unit is configured to determine whether or not the semiconductor element is in a short-circuited state, based on a result of comparison by each of the comparators, and generate a determination signal indicating a determination result.
    Type: Application
    Filed: June 13, 2017
    Publication date: April 23, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takashi MASUHARA, Takeshi HORIGUCHI
  • Publication number: 20200116780
    Abstract: An increased accuracy in detecting deterioration of a semiconductor device can be achieved. A first metal pattern and a second metal pattern are connected to a controller. A bonding wire connects the first metal pattern and an emitter electrode. A linear conductor is connected between a first electrode pad and a second electrode pad. First bonding wires connect the first electrode pad and the second metal pattern. Second bonding wires connect the second electrode pad and the second metal pattern. The controller detects the deterioration of the semiconductor device when a potential difference between the first metal pattern and the second metal pattern is above a threshold.
    Type: Application
    Filed: January 4, 2018
    Publication date: April 16, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Chihiro KAWAHARA, Takeshi HORIGUCHI, Yoshiko TAMADA, Yasushi NAKAYAMA
  • Publication number: 20200052573
    Abstract: A semiconductor device includes a positive electrode-side semiconductor element, a negative electrode-side semiconductor element, a positive electrode plate, a negative electrode plate, an AC electrode plate, a positive electrode-side auxiliary electrode terminal, a negative electrode-side auxiliary electrode terminal, a positive electrode-side capacitor, and a negative electrode-side capacitor. The positive electrode plate is connected to a first positive electrode of the positive electrode-side semiconductor element. The negative electrode plate is connected to a second negative electrode of the negative electrode-side semiconductor element. The AC electrode plate is connected to a first negative electrode of the positive electrode-side semiconductor element and a second positive electrode of the negative electrode-side semiconductor element. The positive electrode-side capacitor is connected to the positive electrode plate and the positive electrode-side auxiliary electrode terminal.
    Type: Application
    Filed: June 23, 2017
    Publication date: February 13, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takashi MASUHARA, Takeshi HORIGUCHI, Mamoru KAMIKURA, Kodai KATAGIRI
  • Patent number: 10476496
    Abstract: A drive circuit turns on an NPN transistor and a transistor in response to a turn-on command in a control signal to supply a positive current to a gate of a power transistor, and turns off the transistor after lapse of a certain time period to lower gate driving capability. The drive circuit turns on a PNP transistor and a transistor in response to a turn-off command in the control signal to supply a negative current to the gate of the power transistor, and turns off the transistor after lapse of a certain time period to lower gate driving capability.
    Type: Grant
    Filed: June 21, 2017
    Date of Patent: November 12, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventor: Takeshi Horiguchi
  • Patent number: 10351087
    Abstract: A second-time collision position estimator section estimates a second-time collision position that is a position at which an occupant on a two-wheel mobile object has a second-time collision, based on a relative vector estimated by a relative vector estimator section and a first-time collision position identified by a first-time collision position identifier section. An operation instructor section operates an external protection device, which is determined to be able to protect the occupant on the two-wheel mobile object based on the second-time collision position estimated by the second-time collision position estimator section.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: July 16, 2019
    Assignees: DENSO CORPORATION, NATIONAL UNIVERSITY CORPORATION NAGOYA UNIVERSITY
    Inventors: Asei Wakabayashi, Takeshi Horiguchi, Kazuhisa Hashimoto, Koji Mizuno, Daisuke Ito
  • Publication number: 20190204655
    Abstract: An array substrate includes at least: a glass substrate on which a driver is mounted; a panel side output terminal disposed in a mounting area of the glass substrate and connected to the driver; a first terminal portion; a gate insulation film including a first contact hole at a position overlapping a first terminal portion; a second terminal portion disposed to overlap at least a first contact hole and an opening edge of the first contact hole; a first interlayer insulation film including a second contact hole at a position overlapping a second terminal portion not to overlap the first contact hole; and a third terminal portion disposed to overlap at least the second contact hole and an opening edge of the second contact hole.
    Type: Application
    Filed: September 7, 2017
    Publication date: July 4, 2019
    Inventors: YUKIO SHIMIZU, SHINZOH MURAKAMI, TAKESHI HORIGUCHI
  • Publication number: 20190158083
    Abstract: A drive circuit turns on an NPN transistor and a transistor in response to a turn-on command in a control signal to supply a positive current to a gate of a power transistor, and turns off the transistor after lapse of a certain time period to lower gate driving capability. The drive circuit turns on a PNP transistor and a transistor in response to a turn-off command in the control signal to supply a negative current to the gate of the power transistor, and turns off the transistor after lapse of a certain time period to lower gate driving capability.
    Type: Application
    Filed: June 21, 2017
    Publication date: May 23, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventor: Takeshi HORIGUCHI
  • Publication number: 20190041685
    Abstract: The semiconductor device of the present invention includes: a first bump group including multiple first bumps aligned in a long side direction; a second bump group including multiple second bumps aligned in the long side direction; and a third bump group including multiple third bumps between the first bump group and the second bump group, wherein on the surface to be connected to the display device, in a short side direction perpendicular to the long side direction, no second bump is disposed or at least one of the multiple second bumps is disposed at least one of positions facing the multiple third bumps, the at least one of the multiple second bumps being a dummy bump.
    Type: Application
    Filed: February 3, 2017
    Publication date: February 7, 2019
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: SHINZOH MURAKAMI, YUKIO SHIMIZU, TAKESHI HORIGUCHI
  • Publication number: 20180304849
    Abstract: A protection control device is for being used in a vehicle having a protection device and includes an output value acquisition unit, an object recognition unit, a collision subject identification unit, a collision position acquisition unit, and an operation determination unit. The operation determination unit uses, as an operation threshold, a predetermined default threshold when a collision position acquired by the collision position acquisition unit is not in a low output area of a front end portion where the output value of the collision sensor is likely to be lower than another area of the front end portion. The operation determination unit uses, as the operation threshold, a low output area threshold when the collision position is in the low output area of the front end portion. The low output area threshold is less than the predetermined default threshold.
    Type: Application
    Filed: October 4, 2016
    Publication date: October 25, 2018
    Inventors: Kazuhisa HASHIMOTO, Asei WAKABAYASHI, Takeshi HORIGUCHI
  • Publication number: 20180194315
    Abstract: A second-time collision position estimator section estimates a second-time collision position that is a position at which an occupant on a two-wheel mobile object has a second-time collision, based on a relative vector estimated by a relative vector estimator section and a first-time collision position identified by a first-time collision position identifier section. An operation instructor section operates an external protection device, which is determined to be able to protect the occupant on the two-wheel mobile object based on the second-time collision position estimated by the second-time collision position estimator section.
    Type: Application
    Filed: June 24, 2016
    Publication date: July 12, 2018
    Inventors: Asei Wakabayashi, Takeshi Horiguchi, Kazuhisa Hashimoto, Koji Mizuno, Daisuke Ito
  • Publication number: 20180115310
    Abstract: A voltage driver shifts a voltage on a gate as a control terminal of a power semiconductor element in response to an ON command or an OFF command. A gate voltage detector generates a detection signal of a gate-emitter voltage. A delay signal generator generates a delay signal obtained by adding a delay time to the detection signal. A subtractor generates a voltage difference signal between the detection signal and the delay signal. When the voltage difference signal exceeds a reference voltage during an operation of turning on the power semiconductor element, a short-circuit state detector detects a hard-switching fault.
    Type: Application
    Filed: May 30, 2016
    Publication date: April 26, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takeshi HORIGUCHI, Yasushi NAKAYAMA
  • Publication number: 20160268017
    Abstract: A conductive sheet capable of improving conductivity by suppressing reaggregation of carbon nanotubes, and a manufacturing method thereof are provided. Also, carbon composite paste and carbon composite filler are provided. The conductive sheet is characterized in that carbon nanotubes and carbon black as conductive materials are dispersed in a resin material. Carbon composite filler, which is composed of the carbon nanotubes in an amount of 10-30 wt. % and the carbon black in an amount of 90-70 wt. %, is dispersed uniformly in the resin material. The conductive sheet is composed of the carbon composite filler in an amount of 10-50 wt. % and the resin material in an amount of 90-50 wt. %, whose surface resistance value is 1-10 ?/sq.
    Type: Application
    Filed: October 30, 2014
    Publication date: September 15, 2016
    Applicants: OSAKA PREFECTURE UNIVERSITY, SEIWA ELECTRIC MFG. CO., LTD.
    Inventors: Shinichi KITAMURA, Kenji MATSUNO, Yukihiro HIJIRI, Takeshi HORIGUCHI
  • Patent number: 9318454
    Abstract: This drive chip has a configuration that is provided with: a base main body; two terminal groups that are respectively disposed along the base main body sides in the longitudinal direction of the base main body, said sides facing each other; a narrow-pitch section in one terminal group wherein terminals are disposed in a zigzag manner in two or more rows, said narrow-pitch section having a narrow terminal pitch in the longitudinal direction; a rough pitch section in the one terminal group, said rough pitch section having a terminal pitch in the longitudinal direction wider than that of the narrow pitch section; and a dummy bump that is disposed between the two terminal groups, said dummy bump being disposed parallel to the rough pitch section.
    Type: Grant
    Filed: October 7, 2013
    Date of Patent: April 19, 2016
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takashi Matsui, Takeshi Horiguchi, Motoji Shiota
  • Patent number: 9217888
    Abstract: A liquid crystal display device includes: a liquid crystal panel having a display area and non-display area; a flexible substrate in the non-display area and connected to a control circuit substrate; a plurality of drivers in the non-display area; a plurality of connection wiring lines in the non-display area for connecting the flexible substrate to the plurality of drivers; a first driver; a second driver that is arranged further away from the flexible substrate than the first driver; a non-overlapping connection wiring line that connects the second driver to the flexible substrate and that does not overlap the first driver; and an overlapping connection wiring line that connects the second driver to the flexible substrate and that has a least a portion thereof overlapping the first driver.
    Type: Grant
    Filed: April 19, 2013
    Date of Patent: December 22, 2015
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Yukio Shimizu, Seiji Muraoka, Motoji Shiota, Takeshi Horiguchi
  • Publication number: 20150319849
    Abstract: The present invention provides a component securing structure that forms a wiring unit on a TFT glass substrate that is capable of transmitting UV light. A component, such as a driver IC and/or an FPC, is electrically connected to the wiring unit and is secured to the TFT glass substrate by a UV-curable ACF. An opening for transmitting UV light is formed in a light shielding layer of the wiring unit. UV light irradiated from the back side of the TFT glass substrate passes through the opening and directly irradiates the UV-curable ACF.
    Type: Application
    Filed: December 9, 2013
    Publication date: November 5, 2015
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Yukio SHIMIZU, Motoji SHIOTA, Hiroki MIYAZAKI, Hiroki NAKAHAMA, Seiji MURAOKA, Takeshi HORIGUCHI
  • Publication number: 20150279792
    Abstract: This drive chip has a configuration that is provided with: a base main body; two terminal groups that are respectively disposed along the base main body sides in the longitudinal direction of the base main body, said sides facing each other; a narrow-pitch section in one terminal group wherein terminals are disposed in a zigzag manner in two or more rows, said narrow-pitch section having a narrow terminal pitch in the longitudinal direction; a rough pitch section in the one terminal group, said rough pitch section having a terminal pitch in the longitudinal direction wider than that of the narrow pitch section; and a dummy bump that is disposed between the two terminal groups, said dummy bump being disposed parallel to the rough pitch section.
    Type: Application
    Filed: October 7, 2013
    Publication date: October 1, 2015
    Inventors: Takashi Matsui, Takeshi Horiguchi, Motoji Shiota