Abstract: A robot remote operation control device includes, in robot remote operation control for an operator to remotely operate a robot capable of gripping an object, an information acquisition unit that acquires operator state information on a state of the operator who operates the robot, an intention estimation unit that estimates a motion intention of the operator who causes the robot to perform a motion, on the basis of the operator state information, and a gripping method determination unit that determines a gripping method for the object on the basis of the estimated motion intention of the operator.

Abstract: In a semiconductor apparatus, the apparatus is so arranged as to comprise: a semiconductor device having electrodes and wiring-interconnects on a main surface of a semiconductor chip; a first resin structure member, being placed on a side of the main surface of the semiconductor chip, constituting, in lateral and upward directions of a specific electrode of the semiconductor device, a hollow-body structure between the specific electrode and the first resin structure member; a second resin structure member covering an outer lateral side of the first resin structure member, and having the permittivity smaller than or equal to the permittivity of the first resin structure member; and an insulation film covering an outer lateral side of the second resin structure member, and having moisture permeability lower than that of the second resin structure member.

Abstract: In a semiconductor apparatus, the apparatus is so arranged as to comprise: a semiconductor device having electrodes and wiring-interconnects on a main surface of a semiconductor chip; a first resin structure member, being placed on a side of the main surface of the semiconductor chip, constituting, in lateral and upward directions of a specific electrode of the semiconductor device, a hollow-body structure between the specific electrode and the first resin structure member; a second resin structure member covering an outer lateral side of the first resin structure member, and having the permittivity smaller than or equal to the permittivity of the first resin structure member; and an insulation film covering an outer lateral side of the second resin structure member, and having moisture permeability lower than that of the second resin structure member.

Abstract: A semiconductor device includes: a semiconductor chip including an electronic part; and a package sealing the semiconductor chip, wherein the package includes a transparent section which is opaque to visible light and transparent to near-infrared light or near-ultraviolet light, and the transparent section is disposed in such a way that the electronic part is observed from outside under the near-infrared light or the near-ultraviolet light.

Abstract: A printed circuit board includes: a printed wiring board including an insulating layer wherein a recessed part is provided on a top surface of the insulating layer, and a printed conductor provided inside the recessed part; a bare chip part mounted in the recessed part and electrically connected to the printed conductor; an electronic part mounted on the top surface of the printed wiring board other than the recessed part; and a cap fixed to the top surface of the printed wiring board and hollow-sealing the bare chip part mounted in the recessed part, wherein using a height of the top surface of the printed wiring board as a reference, a height of a top surface of the cap is equal to or below a maximum height of a top surface of the electronic part.

Abstract: A semiconductor device includes: a semiconductor chip including an electronic part; and a package sealing the semiconductor chip, wherein the package includes a transparent section which is opaque to visible light and transparent to near-infrared light or near-ultraviolet light, and the transparent section is disposed in such a way that the electronic part is observed from outside under the near-infrared light or the near-ultraviolet light.

Abstract: A printed circuit board includes: a printed wiring board including an insulating layer wherein a recessed part is provided on a top surface of the insulating layer, and a printed conductor provided inside the recessed part; a bare chip part mounted in the recessed part and electrically connected to the printed conductor; an electronic part mounted on the top surface of the printed wiring board other than the recessed part; and a cap fixed to the top surface of the printed wiring board and hollow-sealing the bare chip part mounted in the recessed part, wherein using a height of the top surface of the printed wiring board as a reference, a height of a top surface of the cap is equal to or below a maximum height of a top surface of the electronic part.

Abstract: According to the present invention, there is provided an article including: a main body portion (10) that is formed of a material composition containing a fiber filler and a resin and obtained using a paper-making method; and a functional layer (20) that covers the main body portion (10).

Abstract: The semiconductor device 1 includes a substrate 3, a semiconductor chip 4 mounted on the substrate 3, the substrate 3, a bump 5 connecting the substrate 3 and the semiconductor chip 4, and an underfill 6 filling in around the bump 5. In the case of a bump 5 composed of a high-melting-point solder having a melting point of 230° C. or more, the underfill 6 is composed of a resin material having an elastic modulus in the range of 30 MPa to 3000 MPa. In the case of a bump 5 composed of a lead-free solder, the underfill 6 is composed of a resin material having an elastic modulus in the range of 150 MPa to 800 MPa. An insulating layer 311 of buildup layers 31 of the substrate 3 has a linear expansion coefficient of 35 ppm/° C. or less in the in-plane direction of the substrate at temperatures in the range of 25° C. to the glass transition temperature.

Abstract: A prepreg which can meet a demand for thickness reduction is provided. The prepreg has first and second resin layers having different applications, functions, capabilities, or properties, and allows an amount of a resin composition in each of the first and second resin layers to be set appropriately depending on a circuit wiring portion to be embedded into the second resin layer. Further, a method for manufacturing the above prepreg, and a substrate and a semiconductor device having the prepreg are also provided.

Abstract: A prepreg which can meet a demand for thickness reduction is provided. The prepreg has first and second resin layers having different applications, functions, capabilities, or properties, and allows an amount of a resin composition in each of the first and second resin layers to be set appropriately depending on a circuit wiring portion to be embedded into the second resin layer. Further, a method for manufacturing the above prepreg, and a substrate and a semiconductor device having the prepreg are also provided.

Abstract: A prepreg which can meet a demand for thickness reduction is provided. The prepreg has first and second resin layers having different applications, functions, capabilities, or properties, and allows an amount of a resin composition in each of the first and second resin layers to be set appropriately depending on a circuit wiring portion to be embedded into the second resin layer. Further, a method for manufacturing the above prepreg, and a substrate and a semiconductor device having the prepreg are also provided.

Abstract: A process for manufacturing a prepreg with a carrier exhibiting excellent impregnating properties and thickness precision, which is particularly suitably used for preparing a build-up type multilayer-printed circuit board is provided. Also, a prepreg with a carrier prepared by the manufacturing process and a process for manufacturing a multilayer-printed circuit board utilizing the prepreg with a carrier are provided. There is provided a process for continuously manufacturing a prepreg with a carrier comprising an insulating resin layer having a backbone material of a textile fabric, (a) laminating the insulating resin layer side of a first and a second carriers comprising an insulating resin layer on one side on the both sides of the textile fabric, respectively, to form a laminate and bonding them under a reduced pressure, and (b) after the bonding, heating the laminate at a temperature equal to or higher than a melting point of the insulating resin.

Abstract: A prepreg which can meet a demand for thickness reduction is provided. The prepreg has first and second resin layers having different applications, functions, capabilities, or properties, and allows an amount of a resin composition in each of the first and second resin layers to be set appropriately depending on a circuit wiring portion to be embedded into the second resin layer. Further, a method for manufacturing the above prepreg, and a substrate and a semiconductor device having the prepreg are also provided.

Abstract: A semiconductor device 100 has a BGA substrate 110, a semiconductor chip 101, a bump 106 and an underfill 108 filling the periphery of the bump. An interlayer dielectric 104 in the semiconductor chip 101 contains a low dielectric constant film. The bump 106 is comprised of a lead-free solder. The underfill 108 is comprised of a resin material having an elastic modulus of 150 MPa to 800 MPa both inclusive, and a linear expansion coefficient of the BGA substrate 110 in an in-plane direction of the substrate is less than 14 ppm/° C.

Abstract: A multiple-layered printed wiring board is manufactured, which exhibits higher thermal resistance and lower thermal expansion so that no flaking and/or no crack would be occurred in a thermal shock test such as a cooling-heating cycle test and the like, in addition to exhibiting a fire retardancy.

Abstract: The semiconductor device 1 includes a substrate 3, a semiconductor chip 4 mounted on the substrate 3, the substrate 3, a bump 5 connecting the substrate 3 and the semiconductor chip 4, and an underfill 6 filling in around the bump 5. In the case of a bump 5 composed of a high-melting-point solder having a melting point of 230° C. or more, the underfill 6 is composed of a resin material having an elastic modulus in the range of 30 MPa to 3000 MPa. In the case of a bump 5 composed of a lead-free solder, the underfill 6 is composed of a resin material having an elastic modulus in the range of 150 MPa to 800 MPa. An insulating layer 311 of buildup layers 31 of the substrate 3 has a linear expansion coefficient of 35 ppm/° C. or less in the in-plane direction of the substrate at temperatures in the range of 25° C. to the glass transition temperature.

Abstract: A prepreg which can meet a demand for thickness reduction is provided. The prepreg has first and second resin layers having different applications, functions, capabilities, or properties, and allows an amount of a resin composition in each of the first and second resin layers to be set appropriately depending on a circuit wiring portion to be embedded into the second resin layer. Further, a method for manufacturing the above prepreg, and a substrate and a semiconductor device having the prepreg are also provided.

Abstract: An insulating resin layer, which is capable of being employed for forming a multiple-layered printed wiring board via a thermal compression forming process, comprising: at least one first layer and at least one second layer being stacked, wherein a specific dielectric constant of the first layer at a frequency of 1 MHz after the thermal compression forming is not more than 3.2, and wherein a linear expansion coefficient of the second layer at a temperature within a range of from not lower than 35 degree C. to not higher than 85 degree C. after the thermal compression forming is not more than 40 ppm/degree C. A multiple-layered printed wiring board, formed by disposing the aforementioned insulating resin layer over at least one side of an internal layer circuit board, and then conducting a thermal compression forming process.

Abstract: A process for manufacturing a prepreg with a carrier exhibiting excellent impregnating properties and thickness precision, which is particularly suitably used for preparing a build-up type multilayer-printed circuit board is provided. Also, a prepreg with a carrier prepared by the manufacturing process and a process for manufacturing a multilayer-printed circuit board utilizing the prepreg with a carrier are provided. There is provided a process for continuously manufacturing a prepreg with a carrier comprising an insulating resin layer having a backbone material of a textile fabric, (a) laminating the insulating resin layer side of a first and a second carriers comprising an insulating resin layer on one side on the both sides of the textile fabric, respectively, to form a laminate and bonding them under a reduced pressure, and (b) after the bonding, heating the laminate at a temperature equal to or higher than a melting point of the insulating resin.