Abstract: A semiconductor device includes a semiconductor layer with opposing first and second main surfaces and a first column extending from the first main surface and having a first concentration of a dopant of the first conductivity type. A trench with a sidewall and bottom extends at least partially through the semiconductor layer from the first main surface. A second column between the trench sidewall and the first column has a second concentration of a dopant of a second conductivity type and is formed in the semiconductor layer and extends from the first main surface. A trench oxide layer is in contact with at least the trench sidewall and the trench bottom. A trench nitride layer covers the trench oxide layer at least on the trench sidewall. A dielectric seal material seals the trench proximate the first main surface of the semiconductor layer such that the trench is air-tight.

Abstract: A high voltage superjunction MOSFET includes a semiconductor substrate and a semiconductor layer having columns of first and second conductivity. A buffer layer of the first conductivity is between the semiconductor substrate and semiconductor layer. A plug region of the second conductivity is formed at a semiconductor layer surface and extends to the columns. A source/drain region is formed at the semiconductor layer surface and is connected to the plug region. The source/drain region has a concentration of the first conductivity between about 1×1019 cm?3 and 1.5×1020 cm?3. A body region of the second conductivity is between the source/drain region and the first column and is connected to the plug region. A gate trench is formed in the semiconductor layer surface and extends toward the first column and has a trench gate electrode disposed therein. A dielectric layer separates the trench gate electrode from the first column.

Abstract: A high voltage superjunction MOSFET includes a semiconductor substrate and a semiconductor layer having columns of first and second conductivity. A buffer layer of the first conductivity is between the semiconductor substrate and semiconductor layer. A plug region of the second conductivity is formed at a semiconductor layer surface and extends to the columns. A source/drain region is formed at the semiconductor layer surface and is connected to the plug region. The source/drain region has a concentration of the first conductivity between about 1×1019 cm?3 and 1.5×1020 cm?3. A body region of the second conductivity is between the source/drain region and the first column and is connected to the plug region. A gate trench is formed in the semiconductor layer surface and extends toward the first column and has a trench gate electrode disposed therein. A dielectric layer separates the trench gate electrode from the first column.

Abstract: A power transistor has a plurality of cells, each cell having a notch formed in a substrate. An insulating material, such as an oxide, is formed within the notch. A semiconductor layer is formed over the substrate and insulating material. The semiconductor layer has a first type of semiconductor material and a second type of semiconductor material opposite the first type of semiconductor material to form the power transistor. A width of the insulating material within the notch is less than a width of the semiconductor layer so that a portion of the substrate extends to the semiconductor layer. The notch can have a slope or a step. The insulating material has a first thickness and a second thickness greater than the first thickness within the notch. The insulating material may extend completely across the interface between substrate and semiconductor layer, or only partially across the interface.

Abstract: A semiconductor device has a substrate and semiconductor layer formed over the substrate. A trench is formed through the semiconductor layer. An insulating material is disposed in the trench. A first column of semiconductor material having a first conductivity type extends through the semiconductor layer adjacent to the trench. A second column of semiconductor material having a second conductivity type extends through the semiconductor layer adjacent to the first column of semiconductor material. A first insulating layer is formed between the insulating material and a side surface of the trench. A source region is formed within the semiconductor layer. A gate region is formed adjacent to the insulating layer. A second insulating layer is formed between the gate region and source region. A conductive layer is formed over the semiconductor layer. The source region is coupled to the conductive layer.

Abstract: A semiconductor device has a substrate and semiconductor layer formed over the substrate. A trench is formed through the semiconductor layer. A polysilicon material is disposed in the trench. A first column of semiconductor material having a first conductivity type extends through the semiconductor layer adjacent to the trench. A second column of semiconductor material having a second conductivity type extends through the semiconductor layer adjacent to the first column of semiconductor material. A conductive layer is formed over the semiconductor layer. The polysilicon material is coupled to the conductive layer and operates as a field plate. A first insulating layer is formed between the polysilicon material and a side surface of the trench. A source region is formed within the semiconductor layer. A gate region is formed adjacent to the insulating layer. A second insulating layer is formed between the gate region and source region.

Abstract: A semiconductor device has a substrate. The substrate can be multiple layers. A first semiconductor layer made of a first semiconductor material is disposed over the substrate. The first semiconductor material can be substantially defect-free silicon carbide. A second semiconductor layer made of a second semiconductor material dissimilar from the first semiconductor material is disposed over the first semiconductor layer. The second semiconductor material is silicon. A third layer can be disposed between the first semiconductor layer and second semiconductor layer. A semiconductor device is formed in the second semiconductor layer. The semiconductor device can be a power MOSFET or diode. The second semiconductor layer with the electrical component provides a first portion of a breakdown voltage for the semiconductor device and the first semiconductor layer and substrate provide a second portion of the breakdown voltage for the semiconductor device.

Abstract: A semiconductor device has a substrate made of a first semiconductor material. The first semiconductor material is silicon carbide. A first semiconductor layer made of the first semiconductor material is disposed over the substrate. A second semiconductor layer made of a second semiconductor material dissimilar from the first semiconductor material is disposed over the first semiconductor layer. The second semiconductor material is silicon. A third semiconductor layer made of the second semiconductor material can be disposed between the first semiconductor layer and second semiconductor layer. A semiconductor device is formed in the second semiconductor layer. The semiconductor device can be a power MOSFET or diode. The second semiconductor layer with the electrical component provides a first portion of a breakdown voltage for the semiconductor device and the first semiconductor layer and substrate provide a second portion of the breakdown voltage for the semiconductor device.

Abstract: A semiconductor device has a first substrate and a first semiconductor layer having a first semiconductor material formed over the first substrate. A surface of the first semiconductor layer has a first element of the first semiconductor material. A first surface of a second semiconductor layer having the first semiconductor material is joined to the surface of the first semiconductor layer. The first surface of the second semiconductor layer has a second element of the first semiconductor material different from the first element. The first semiconductor material is silicon carbide or cubic silicon carbide. The first element is silicon or carbon, and the second element is carbon or silicon. The semiconductor device provides characteristics of radiation hardening. A third semiconductor layer is formed over a second surface of the second semiconductor layer opposite the first surface. An electrical component is formed over the second semiconductor layer.

Abstract: A semiconductor device has a first substrate made of a first semiconductor material, such as silicon. A sacrificial layer is formed over a first surface of the first substrate. A seed layer is formed over the sacrificial layer. A compliant layer is formed over a second surface of the first substrate opposite the first surface of the first substrate. A first semiconductor layer made of a second semiconductor material, such as silicon carbide, dissimilar from the first semiconductor material is formed over the sacrificial layer. The first substrate and sacrificial layer are removed leaving the first semiconductor layer substantially defect-free. The first semiconductor layer containing the second semiconductor material is formed at a temperature greater than a melting point of the first semiconductor material. A second semiconductor layer is formed over the first semiconductor layer with an electrical component formed in the second semiconductor layer.

Abstract: A semiconductor device has a substrate made of a first semiconductor material. The first semiconductor material is silicon carbide. A first semiconductor layer made of the first semiconductor material is disposed over the substrate. A second semiconductor layer made of a second semiconductor material dissimilar from the first semiconductor material is disposed over the first semiconductor layer. The second semiconductor material is silicon. A third semiconductor layer made of the second semiconductor material can be disposed between the first semiconductor layer and second semiconductor layer. A semiconductor device or electrical component is formed in the second semiconductor layer. The electrical component can be a power MOSFET. A first insulating layer, such as an oxide layer, is formed over the electrical component, and second insulating layer, such as a nitride layer, is formed over the first insulating layer for protection against radiation.

Abstract: A semiconductor device has a substrate made of a first semiconductor material. The first semiconductor material is silicon carbide. A first semiconductor layer made of the first semiconductor material is disposed over the substrate. A second semiconductor layer made of a second semiconductor material dissimilar from the first semiconductor material is disposed over the first semiconductor layer. The first semiconductor material is substantially defect-free silicon carbide, and the second semiconductor material is silicon. A semiconductor device is formed in the second semiconductor layer. The semiconductor device can be a power MOSFET, diode, insulated gate bipolar transistor, cluster trench insulated gate bipolar transistor, and thyristor. The second semiconductor layer with the electrical component provides a first portion of a breakdown voltage for the semiconductor device and the first semiconductor layer and substrate provide a second portion of the breakdown voltage for the semiconductor device.

Abstract: A semiconductor device includes a semiconductor layer with opposing first and second main surfaces and a first column extending from the first main surface and having a first concentration of a dopant of the first conductivity type. A trench with a sidewall and bottom extends at least partially through the semiconductor layer from the first main surface. A second column between the trench sidewall and the first column has a second concentration of a dopant of a second conductivity type and is formed in the semiconductor layer and extends from the first main surface. A trench oxide layer is in contact with at least the trench sidewall and the trench bottom. A trench nitride layer covers the trench oxide layer at least on the trench sidewall. A dielectric seal material seals the trench proximate the first main surface of the semiconductor layer such that the trench is air-tight.

Abstract: A high voltage superjunction MOSFET includes a semiconductor substrate and a semiconductor layer having columns of first and second conductivity. A buffer layer of the first conductivity is between the semiconductor substrate and semiconductor layer. A plug region of the second conductivity is formed at a semiconductor layer surface and extends to the columns. A source/drain region is formed at the semiconductor layer surface and is connected to the plug region. The source/drain region has a concentration of the first conductivity between about 1×1019 cm?3 and 1.5×1020 cm?3. A body region of the second conductivity is between the source/drain region and the first column and is connected to the plug region. A gate trench is formed in the semiconductor layer surface and extends toward the first column and has a trench gate electrode disposed therein. A dielectric layer separates the trench gate electrode from the first column.

Abstract: A high voltage superjunction MOSFET includes a semiconductor substrate and a semiconductor layer having columns of first and second conductivity. A buffer layer of the first conductivity is between the semiconductor substrate and semiconductor layer. A plug region of the second conductivity is formed at a semiconductor layer surface and extends to the columns. A source/drain region is formed at the semiconductor layer surface and is connected to the plug region. The source/drain region has a concentration of the first conductivity between about 1×1019 cm?3 and 1.5×1020 cm?3. A body region of the second conductivity is between the source/drain region and the first column and is connected to the plug region. A gate trench is formed in the semiconductor layer surface and extends toward the first column and has a trench gate electrode disposed therein. A dielectric layer separates the trench gate electrode from the first column.

Abstract: A semiconductor device includes a semiconductor layer with opposing first and second main surfaces and a first column extending from the first main surface and having a first concentration of a dopant of the first conductivity type. A trench with a sidewall and bottom extends at least partially through the semiconductor layer from the first main surface. A second column between the trench sidewall and the first column has a second concentration of a dopant of a second conductivity type and is formed in the semiconductor layer and extends from the first main surface. A trench oxide layer is in contact with at least the trench sidewall and the trench bottom. A trench nitride layer covers the trench oxide layer at least on the trench sidewall. A dielectric seal material seals the trench proximate the first main surface of the semiconductor layer such that the trench is air-tight.

Abstract: A high voltage superjunction MOSFET includes a semiconductor substrate and a semiconductor layer having columns of first and second conductivity. A buffer layer of the first conductivity is between the semiconductor substrate and semiconductor layer. A plug region of the second conductivity is formed at a semiconductor layer surface and extends to the columns. A source/drain region is formed at the semiconductor layer surface and is connected to the plug region. The source/drain region has a concentration of the first conductivity between about 1×1019 cm?3 and 1.5×1020 cm?3. A body region of the second conductivity is between the source/drain region and the first column and is connected to the plug region. A gate trench is formed in the semiconductor layer surface and extends toward the first column and has a trench gate electrode disposed therein. A dielectric layer separates the trench gate electrode from the first column.

Abstract: A semiconductor device includes a semiconductor layer with opposing first and second main surfaces and a first column extending from the first main surface and having a first concentration of a dopant of the first conductivity type. A trench with a sidewall and bottom extends at least partially through the semiconductor layer from the first main surface. A second column between the trench sidewall and the first column has a second concentration of a dopant of a second conductivity type and is formed in the semiconductor layer and extends from the first main surface. A trench oxide layer is in contact with at least the trench sidewall and the trench bottom. A trench nitride layer covers the trench oxide layer at least on the trench sidewall. A dielectric seal material seals the trench proximate the first main surface of the semiconductor layer such that the trench is air-tight.

Abstract: A method of manufacturing a superjunction device includes providing a semiconductor wafer having at least one die. At least one first trench having a first orientation is formed in the at least one die. At least one second trench having a second orientation that is different from the first orientation is formed in the at least one die.

Abstract: A semiconductor chip includes a semiconductor layer having first and second opposing main surfaces. A plurality of MOSFET cells are at least partially formed in the semiconductor layer. A gate pad region is at least partially formed in the semiconductor layer and includes a gate pad contact and a first plurality of trenches extending from the first main surface. The first plurality of trenches are spaced apart from one another in a direction parallel to the first main surface by about 45 micrometers to about 60 micrometers. At least one gate feed region is at least partially formed in the semiconductor layer and includes a gate feed contact and a second plurality of trenches extending from the first main surface. The second plurality of trenches are spaced apart from one another in the direction parallel to the first main surface by about 45 micrometers to about 60 micrometers.