Abstract: A video displaying method of displaying, on a display unit, contents of video files. Each of the video files is composed of a plurality of images. The video displaying method includes the steps of extracting, from one of the video files, a plurality of images at predetermined intervals from the images composing the video file; displaying the extracted images on the display unit; prompting selection of one image from the displayed images; reproducing the video file including the selected image beginning at a position of the selected image in the video file; and displaying the reproduced video file on the display unit.

Abstract: A video searching method, and apparatus, having a function of representing a video file are provided such that the contents of video files stored in a storage device may be recognized definitely and rapidly. The video searching apparatus includes a computer, a storage device, a device for controlling them, and a display device. The apparatus includes a software resource for producing a group image formed of at least two still images of scenes representing the contents of each of video files stored in the storage device. In the apparatus, the size of the group image is changed at any time. In response to manipulation of the group image, file operation such as deletion, movement or name change of a corresponding video file is performed.

Abstract: A video searching method, and apparatus, having a function of representing a video file are provided such that the contents of video files stored in a storage device may be recognized definitely and rapidly. The video searching apparatus includes a computer, a storage device, a device for controlling them, and a display device. The apparatus includes a software resource for producing a group image formed of at least two still images of scenes representing the contents of each of video files stored in the storage device. In the apparatus, the size of the group image is changed at any time. In response to manipulation of the group image, file operation such as deletion, movement or name change of a corresponding video file is performed.

Abstract: A semiconductor circuit for compressing or encoding output data of a scan path circuit, able to realize a circuit test and fault analysis by the scan path circuit, and capable of preventing the configuration of a combinational circuit from being guessed from the input and output. Predetermined mode key data is input by being mixed in input data to a scan path circuit during a scan mode operation so as to be fetched by a mode key circuit embedded in the scan path circuit. The mode key data is fetched by the mode holding circuit from the mode key circuit and a mode signal BE is generated in accordance with the mode key data during a system mode operation. When the mode key data has a predetermined pattern, the mode key signal becomes a predetermined set value, and an output signal of the scan path circuit is output as it is in accordance therewith. Otherwise, since the output signal of the scan path circuit is encoded and output, the output of the scan path circuit can be concealed in accordance with need.

Abstract: The invention concerns an apparatus for automatically pressure fitting parts. In the apparatus, a work with part fitting holes is set on a work bench, and parts are fed to a predetermined position while being heated. The work bench is moved in an X- and a Y-direction to bring a part fitting hole of the work to a position underneath the predetermined position. A holder is then lowered, then is caused to take hold of the part at the predetermined position and pressure fit the part in the part fitting hole of the work held below, and then is pulled upward out of the part having been pressure fitted and secured in the position in the part fitting hole. Parts may be fed while being vibrated with an ultrasonic wave instead of being heated, and then may each be pressure fitted while being vibrated in a part fitting hole of the work, followed by pulling the holder upward out of the part having been pressure fitted and secured in the position in the part fitting hole.

Abstract: When an access request is generated from a client in a network file server comprising a computer including a communication controller connected to at least one client through a network and transferring information on a plurality of addresses inside a main storage device as one packet to at least one client, the main storage device having a buffer, a central processing unit and an input/output bus for mutually connecting the communication controller, the central processing unit and the main storage device, and a secondary storage device connected to the computer, an area for storing the data corresponding to this access request is allocated into the buffer of the main storage device. The data corresponding to the access request is read out from the secondary storage device, is transferred to the buffer and is stored in the allocated area.

Abstract: A synchronizing circuit including a plurality of latches, comprised of a first dynamic type through latch circuit and a second dynamic type through latch circuit between which is disposed a static type through latch circuit, the circuits connected in cascade. Data is sampled at the timing of the rising edge of the clock signal generated by a pulse generation circuit connected to a clock input circuit and data is output at the timing of the trailing edge. By defining the clock pulse width generated at the pulse generation circuit larger than the clock skew, it is possible to prevent malfunctions of the LSI caused by clock skew caused by deviation of timing of the clock distribution. Moreover, by providing a dynamic type through circuit for a scan test input to the first dynamic type through latch circuit in parallel, a scanning function can be realized and a malfunction due to the clock skew during scanning can be prevented.

Abstract: An object of the present invention is to provide an embedded testing circuit of a dual port memory capable of effectively testing the memory using a short test pattern while making simultaneous write/read from both of the ports.The testing circuit comprises an address inputting circuit selectively supplying M-sequence pattern data or their inverted pattern data to scan registers on the port A at the address input side and also selectively supplying pattern data in inverse relationship to the pattern data supplied to the port A to scan registers on the port B and a data inputting circuit selectively supplying the M-sequence pattern data or their inverted pattern data passed through the scan registers on the port A at the address input side to scan registers on the port A at the data input side and also selectively supplying the inverted pattern data or the M-sequence pattern data passed through the scan registers on the port B at the address input side to scan registers on the port B at the data input side.