Patents by Inventor Takeshi Osada

Takeshi Osada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150228677
    Abstract: As a display device has a higher definition, the number of pixels, gate lines, and signal lines are increased. When the number of the gate lines and the signal lines are increased, a problem of higher manufacturing cost, because it is difficult to mount an IC chip including a driver circuit for driving of the gate and signal lines by bonding or the like. A pixel portion and a driver circuit for driving the pixel portion are provided over the same substrate, and at least part of the driver circuit includes a thin film transistor using an oxide semiconductor interposed between gate electrodes provided above and below the oxide semiconductor. Therefore, when the pixel portion and the driver portion are provided over the same substrate, manufacturing cost can be reduced.
    Type: Application
    Filed: April 23, 2015
    Publication date: August 13, 2015
    Inventors: Hidekazu MIYAIRI, Takeshi OSADA, Shunpei YAMAZAKI
  • Publication number: 20150221778
    Abstract: As a display device has a higher definition, the number of pixels, gate lines, and signal lines are increased. When the number of the gate lines and the signal lines are increased, there occurs a problem that it is difficult to mount an IC chip including a driver circuit for driving the gate and signal lines by bonding or the like, whereby manufacturing cost is increased. A pixel portion and a driver circuit for driving the pixel portion are provided over the same substrate, and at least part of the driver circuit includes a thin film transistor using an oxide semiconductor interposed between gate electrodes provided above and below the oxide semiconductor. The pixel portion and the driver portion are provided over the same substrate, whereby manufacturing cost can be reduced.
    Type: Application
    Filed: April 2, 2015
    Publication date: August 6, 2015
    Inventors: Hidekazu MIYAIRI, Takeshi OSADA, Kengo AKIMOTO, Shunpei YAMAZAKI
  • Publication number: 20150222143
    Abstract: An object is to provide a semiconductor device that is capable of wireless communication, such as an RFID tag, which can transmit and receive individual information without checking remaining capacity of a battery or changing batteries due to deterioration with time in the battery for a drive power supply voltage, and maintain a favorable a transmission/reception state even when electric power of an electromagnetic wave from a reader/writer is not sufficient. The semiconductor device includes a signal processing circuit, a first antenna circuit connected to the signal processing circuit, an antenna circuit group, a rectifier circuit-group and a battery connected to the signal processing circuit.
    Type: Application
    Filed: April 13, 2015
    Publication date: August 6, 2015
    Inventors: Takeshi OSADA, Hikaru TAMURA
  • Patent number: 9100028
    Abstract: It is an object of the present invention to solve a problem that malfunction of communication is generated by varying a frequency of a clock due to noise from outside in a case where there is no supplied signal in a circuit which performs negative feedback control so that the supplied signal and the feedback signal can maintain a fixed phase relationship between the signals. The present invention provides a configuration including a PLL circuit and an oscillator circuit, where a switch for switching an output between a signal from the PLL circuit and a signal from the oscillator circuit to the signal output portion is provided to switch from a connection to the PLL circuit to a connection to the oscillator circuit in a case where there is no received signal.
    Type: Grant
    Filed: February 8, 2011
    Date of Patent: August 4, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Takeshi Osada
  • Publication number: 20150214658
    Abstract: A connector (1) includes a connector housing (2), a terminal (3) received in a terminal reception chamber (21), and a retainer (4) inserted in a retainer insertion hole (22) of the connector housing (2) and configured to shift between a terminal insertion allowable position and a terminal fit position. A terminal locking protrusion (47) of the retainer (4) has a base protrusion (45) configured to come in contact with a rear wall (31b) of an opposite terminal connection part (31) of the terminal (3) with the retainer (4) being in the terminal fit position, and a tip end protrusion (46) provided on an enter-side face of the base protrusion (45) and configured to enter space inside a connection part (33) of the terminal (3) with the retainer (4) being in the terminal fit position.
    Type: Application
    Filed: July 12, 2013
    Publication date: July 30, 2015
    Inventors: Noritaka Nishiyama, Takeshi Osada
  • Publication number: 20150194757
    Abstract: A connector includes a substantially box-shaped housing, a female terminal inserted inside the housing, and a busbar supported by the housing. The housing includes a terminal housing chamber in which the female terminal is accommodated, a locking arm having elasticity, and a guide wall which guides the busbar within the housing. The locking arm includes a first securing section at which one end side is secured, a second securing section at which the other end side is secured, and an arm section connecting the first securing section and the second securing section. A linking part provided in a linked manner from the guide wall is integrally formed with the second securing section. The distance between the first securing section and the second securing section is set as the distance at which the elastic force of the locking arm is the desired elastic force.
    Type: Application
    Filed: March 18, 2015
    Publication date: July 9, 2015
    Applicant: Yazaki Corporation
    Inventors: Takeshi OSADA, Noritaka NISHIYAMA
  • Patent number: 9054203
    Abstract: As a display device has a higher definition, the number of pixels, gate lines, and signal lines are increased. When the number of the gate lines and the signal lines are increased, there occurs a problem that it is difficult to mount an IC chip including a driver circuit for driving the gate and signal lines by bonding or the like, whereby manufacturing cost is increased. A pixel portion and a driver circuit for driving the pixel portion are provided over the same substrate, and at least part of the driver circuit includes a thin film transistor using an oxide semiconductor interposed between gate electrodes provided above and below the oxide semiconductor. Therefore, when the pixel portion and the driver circuit are provided over the same substrate, manufacturing cost can be reduced.
    Type: Grant
    Filed: August 21, 2013
    Date of Patent: June 9, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hidekazu Miyairi, Takeshi Osada, Kengo Akimoto, Shunpei Yamazaki
  • Patent number: 9048147
    Abstract: A display device of which frame can be narrowed and of which display characteristics are excellent is provided. In a display device including a switch portion or a buffer portion, a logic circuit portion, and a pixel portion, the pixel portion includes a first inverted staggered TFT and a pixel electrode which is connected to a wiring of the first inverted staggered TFT, the switch portion or the buffer portion includes a second inverted staggered TFT in which a first insulating layer, a semiconductor layer, and a second insulating layer are interposed between a first gate electrode and a second gate electrode, the logic circuit portion includes an inverter circuit including a third inverted staggered thin film transistor and a fourth inverted staggered thin film transistor, and the first to the fourth inverted staggered thin film transistors have the same polarity. The inverter circuit may be an EDMOS circuit.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: June 2, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Takeshi Osada, Hidekazu Miyairi, Yasuhiro Jinbo
  • Publication number: 20150140429
    Abstract: A power storage device a positive electrode including a positive electrode active material layer and a negative electrode including a negative electrode active material layer. The positive electrode active material layer includes a plurality of particles of x[Li2MnO3]-(1?x)[LiCo1/3Mn1/3Ni1/3O2] (obtained by assigning 0.5 to x, for example) which is a positive electrode active material, and multilayer graphene with which the plurality of particles of the positive electrode active material are at least partly connected to each other. In the multilayer graphene, a plurality of graphenes are stacked in a layered manner. The graphene contains a six-membered ring composed of carbon atoms, a poly-membered ring which is a seven or more-membered ring composed of carbon atoms, and an oxygen atom bonded to one or more of the carbon atoms in the six-membered ring and the poly-membered ring, which is a seven or more-membered ring.
    Type: Application
    Filed: January 26, 2015
    Publication date: May 21, 2015
    Inventors: Takahiro KAWAKAMI, Hiroatsu TODORIKI, Teppei OGUNI, Takeshi OSADA, Shunpei YAMAZAKI
  • Patent number: 9029851
    Abstract: As a display device has a higher definition, the number of pixels, gate lines, and signal lines are increased. When the number of the gate lines and the signal lines are increased, a problem of higher manufacturing cost, because it is difficult to mount an IC chip including a driver circuit for driving of the gate and signal lines by bonding or the like. A pixel portion and a driver circuit for driving the pixel portion are provided over the same substrate, and at least part of the driver circuit includes a thin film transistor using an oxide semiconductor interposed between gate electrodes provided above and below the oxide semiconductor. Therefore, when the pixel portion and the driver portion are provided over the same substrate, manufacturing cost can be reduced.
    Type: Grant
    Filed: November 22, 2011
    Date of Patent: May 12, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hidekazu Miyairi, Takeshi Osada, Shunpei Yamazaki
  • Patent number: 9030298
    Abstract: The present invention provides a thin semiconductor device in which its security such as prevention of counterfeit or information leakage is to be enhanced. One feature of the present invention is a thin semiconductor device in which a plurality of thin film integrated circuits are mounted and in which at least one integrated circuit is different from the other integrated circuits in any one of a specification, layout, frequency for transmission or reception, a memory, a communication means, a communication rule and the like. According to the present invention, a thin semiconductor device tag having the plurality of thin film integrated circuits communicates with a reader/writer and at least one of the thin film integrated circuits receives a signal to write information in a memory, and the information written in the memory determines which of the thin film integrated circuits communicates.
    Type: Grant
    Filed: March 20, 2012
    Date of Patent: May 12, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Takeshi Osada, Yasuyuki Arai, Yuko Tachimura
  • Patent number: 9022293
    Abstract: An object is to provide a semiconductor device that is capable of wireless communication, such as an RFID tag, which can transmit and receive individual information without checking remaining capacity of a battery or changing batteries due to deterioration with time in the battery for a drive power supply voltage, and maintain a favorable a transmission/reception state even when electric power of an electromagnetic wave from a reader/writer is not sufficient. The semiconductor device includes a signal processing circuit, a first antenna circuit connected to the signal processing circuit, an antenna circuit group, a rectifier circuit group and a battery connected to the signal processing circuit.
    Type: Grant
    Filed: August 29, 2007
    Date of Patent: May 5, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takeshi Osada, Hikaru Tamura
  • Patent number: 9011173
    Abstract: A multi-connected connector 1 includes a plurality of first connectors 110a, 110b, 110c and 110d and a second connector 20 having a plurality of connector fitting chambers 21a, 21b, 21c, 21d arranged in a row in a transverse direction to fit the first connectors. The first connectors include a connector whose length is different from the other connector of the first connectors in a fitting direction of the first connectors. Butting walls 22a, 22b, 22c, 22d as positioning parts that determine fitting completed positions of the first connectors respectively in the connector fitting chambers 21a, 21b, 21c, 21d are arranged in accordance with lengths in the fitting direction of the first connectors to be connected so that rear end surfaces of the plurality of first connectors which are normally completely fitted are aligned so as to be flush.
    Type: Grant
    Filed: January 19, 2012
    Date of Patent: April 21, 2015
    Assignee: Yazaki Corporation
    Inventors: Takeshi Osada, Takuya Hasegawa
  • Patent number: 9000431
    Abstract: As a display device has a higher definition, the number of pixels, gate lines, and signal lines are increased. When the number of the gate lines and the signal lines are increased, there occurs a problem that it is difficult to mount an IC chip including a driver circuit for driving the gate and signal lines by bonding or the like, whereby manufacturing cost is increased. A pixel portion and a driver circuit for driving the pixel portion are provided over the same substrate, and at least part of the driver circuit includes a thin film transistor using an oxide semiconductor interposed between gate electrodes provided above and below the oxide semiconductor. The pixel portion and the driver portion are provided over the same substrate, whereby manufacturing cost can be reduced.
    Type: Grant
    Filed: January 5, 2012
    Date of Patent: April 7, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hidekazu Miyairi, Takeshi Osada, Kengo Akimoto, Shunpei Yamazaki
  • Publication number: 20150069386
    Abstract: A sensor circuit with high sensitivity to ultraviolet light. Ultraviolet light is detected using a transistor containing an oxide semiconductor. When the transistor is irradiated with ultraviolet light or light including ultraviolet light, the drain current of the transistor depends on the intensity of the ultraviolet light. Data on the intensity of ultraviolet light is obtained by measuring the drain current of the transistor. Since the band gap of an oxide semiconductor is wider than that of silicon, the sensitivity to light with a wavelength in the ultraviolet region can be increased. Furthermore, an increase in dark current caused by temperature rise in the sensor circuit can be suppressed, resulting in a wider allowable ambient temperature range of the sensor circuit.
    Type: Application
    Filed: September 4, 2014
    Publication date: March 12, 2015
    Inventor: Takeshi OSADA
  • Patent number: 8946710
    Abstract: A semiconductor device with high function, multifunction and high added value. The semiconductor device includes a PLL circuit that is provided over a substrate and outputs a signal with a correct frequency. By providing such a PLL circuit over the substrate, a semiconductor device with high function, multifunction and high added value can be achieved.
    Type: Grant
    Filed: January 26, 2012
    Date of Patent: February 3, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kiyoshi Kato, Takeshi Osada
  • Patent number: 8945772
    Abstract: A power storage device a positive electrode including a positive electrode active material layer and a negative electrode including a negative electrode active material layer. The positive electrode active material layer includes a plurality of particles of x[Li2MnO3]-(1?x)[LiCo1/3Mn1/3Ni1/3O2] (obtained by assigning 0.5 to x, for example) which is a positive electrode active material, and multilayer graphene with which the plurality of particles of the positive electrode active material are at least partly connected to each other. In the multilayer graphene, a plurality of graphenes are stacked in a layered manner. The graphene contains a six-membered ring composed of carbon atoms, a poly-membered ring which is a seven or more-membered ring composed of carbon atoms, and an oxygen atom bonded to one or more of the carbon atoms in the six-membered ring and the poly-membered ring, which is a seven or more-membered ring.
    Type: Grant
    Filed: October 4, 2012
    Date of Patent: February 3, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takahiro Kawakami, Hiroatsu Todoriki, Teppei Oguni, Takeshi Osada, Shunpei Yamazaki
  • Publication number: 20150017541
    Abstract: A power storage device which has high charge/discharge capacity and less deterioration in battery characteristics due to charge/discharge and can perform charge/discharge at high speed is provided. A power storage device includes a negative electrode. The negative electrode includes a current collector and an active material layer provided over the current collector. The active material layer includes a plurality of protrusions protruding from the current collector and a graphene provided over the plurality of protrusions. Axes of the plurality of protrusions are oriented in the same direction. A common portion may be provided between the current collector and the plurality of protrusions.
    Type: Application
    Filed: August 29, 2014
    Publication date: January 15, 2015
    Inventors: Ryota TAJIMA, Shunpei YAMAZAKI, Teppei OGUNI, Takeshi OSADA, Shinya SASAGAWA, Kazutaka KURIKI
  • Publication number: 20150002093
    Abstract: An object is to provide a power storage device provided with a battery that is a power storage means, for safe and accurate supply of electric power in a short period of time for drive power supply voltage without checking remaining capacity of the battery or changing batteries with deterioration over time of the battery for drive power supply voltage. The power storage device is provided with a battery that is a power storage means as a power supply for supplying electric power and a counter circuit for counting charging time of the power storage means. An electromagnetic wave with electric field intensity, magnetic field intensity, and power flux density per unit time which are transmitted from a power feeder are controlled, and the power storage means is efficiently charged using the electromagnetic wave in a short period of time.
    Type: Application
    Filed: September 18, 2014
    Publication date: January 1, 2015
    Inventor: Takeshi OSADA
  • Patent number: 8907348
    Abstract: As a display device has higher definition, the number of pixels is increased and thus, the number of gate lines and signal lines is increased. When the number of gate lines and signal lines is increased, it is difficult to mount IC chips including driver circuits for driving the gate lines and the signal lines by bonding or the like, whereby manufacturing cost is increased. A pixel portion and a driver circuit for driving the pixel portion are provided on the same substrate, and at least part of the driver circuit comprises a thin film transistor including an oxide semiconductor sandwiched between gate electrodes. A channel protective layer is provided between the oxide semiconductor and a gate electrode provided over the oxide semiconductor. The pixel portion and the driver circuit are provided on the same substrate, which leads to reduction of manufacturing cost.
    Type: Grant
    Filed: May 23, 2012
    Date of Patent: December 9, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hidekazu Miyairi, Takeshi Osada, Shunpei Yamazaki