Patents by Inventor Takeshi Shimane

Takeshi Shimane has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6495891
    Abstract: A semiconductor device has source and drain regions, a gate insulating film, a gate electrode, and a channel region. The channel region includes a region where carriers move between the source and drain regions. An impurity concentration of the channel region is higher at an end portion of a surface depletion layer than at an interface between the semiconductor layer and the gate insulating film. The impurity concentration varies along a direction in which the gate electrode, the gate insulating film and the channel region are successively provided, and it increases substantially linearly near the end portion of the surface depletion layer.
    Type: Grant
    Filed: August 25, 2000
    Date of Patent: December 17, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroyuki Kinoshita, Takeshi Shimane