Patents by Inventor Takeshi Toda

Takeshi Toda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6157685
    Abstract: A multistage interference canceller equipment and interference canceller method for use, for example, in CDMA (Code Division Multiple Access) multibeam-antenna communication system includes in each stage an interference canceller unit which has a replica signal generator which generates from an input beam signal a first interference replica signal and outputs a first error signal, and an interference removal unit which receives from another replica signal generator a second interference replica signal, multiplies that second interference replica signal by conversion coefficients and subtracts an obtained signal from the first interference replica signal to produce a second error signal so that an error signal is generated for each signal beam from the interference replica signals of a local signal beam and other signal beams to eliminate interference.
    Type: Grant
    Filed: December 19, 1997
    Date of Patent: December 5, 2000
    Assignee: Fujitsu Limited
    Inventors: Yoshinori Tanaka, Shuji Kobayakawa, Hiroyuki Seki, Takeshi Toda, Masafumi Tsutsui
  • Patent number: 6144931
    Abstract: A wafer expansion-and-contraction simulation method in which stress (intrinsic stress) caused in a film forming process on a wafer is taken into consideration, the calculation time can be shorten, and a storage amount of data can be reduced. In the simulation method, an elastic thermal stress simulation when the temperature of the silicon wafer is increased from the room temperature to the film forming temperature is performed, and the displacement of the wafer thus obtained is reserved. Thereafter, an elastic thermal stress simulation when the temperature of the silicon wafer coated with the thin film is decreased from the film forming temperature to the room temperature is performed, and the displacement of the wafer thus obtained is reserved. In the simulation, thermal strain is uniformly applied to the thin film as corresponding to an intrinsic stress in the film forming process.
    Type: Grant
    Filed: March 26, 1998
    Date of Patent: November 7, 2000
    Assignee: NEC Corporation
    Inventor: Takeshi Toda
  • Patent number: 6058318
    Abstract: A reference antenna element out of plural antenna elements directed to the same sector is set as a first antenna element; a receiver for frequency conversion of the signal received by the first antenna element is set as a first receiver; any antenna element different from the first antenna element is set as a second antenna element; and a receiver for frequency conversion of the signal received by the second antenna element is set as a second receiver. The output signals of the first and second receivers relative to a specific up-signal are supplied to phase compensation calculator means, which then calculates the phase compensation amount representing the phase amount of the difference between the output-signal phase difference of the first and second receivers and the input-signal phase difference of the first and second receivers.
    Type: Grant
    Filed: February 10, 1998
    Date of Patent: May 2, 2000
    Assignee: Fujitsu Limited
    Inventors: Shuji Kobayakawa, Yoshinori Tanaka, Hiroyuki Seki, Takeshi Toda, Masafumi Tsutsui
  • Patent number: 6032026
    Abstract: The invention provides a technique for measurement of a signal to interference power ratio wherein an SIR can be measured with a higher degree of accuracy without being influenced by a fast fading environment or an inter-station interference or noise environment.
    Type: Grant
    Filed: February 19, 1998
    Date of Patent: February 29, 2000
    Assignee: Fujitsu Limited
    Inventors: Hiroyuki Seki, Yoshinori Tanaka, Shuji Kobayakawa, Takeshi Toda, Masafumi Tsutsui