Patents by Inventor Takeshi Yuzawa
Takeshi Yuzawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10658325Abstract: A semiconductor device includes a semiconductor chip, wiring that is included in the semiconductor chip and his a coupling part between parts with different widths, a pad being formed above the wiring and in a position overlapping the coupling part, a bump being formed on the pad, a buffer layer being formed in a position between the coupling part and the pad so as to cover the entire couple part, and inorganic insulating layers being formed between the wiring and the buffer layer and between the buffer layer and the pad, respectively. The buffer layer is made of a material other than resin and softer than the inorganic insulating layer.Type: GrantFiled: September 17, 2018Date of Patent: May 19, 2020Assignee: SEIKO EPSON CORPORATIONInventors: Takeshi Yuzawa, Masatoshi Tagaki
-
Publication number: 20190019773Abstract: A semiconductor device includes a semiconductor chip, wiring that is included in the semiconductor chip and his a coupling part between parts with different widths, a pad being formed above the wiring and in a position overlapping the coupling part, a bump being formed on the pad, a buffer layer being formed in a position between the coupling part and the pad so as to cover the entire couple part, and inorganic insulating layers being formed between the wiring and the buffer layer and between the buffer layer and the pad, respectively. The buffer layer is made of a material other than resin and softer than the inorganic insulating layer.Type: ApplicationFiled: September 17, 2018Publication date: January 17, 2019Applicant: SEIKO EPSON CORPORATIONInventors: Takeshi YUZAWA, Masatoshi TAGAKI
-
Patent number: 10103120Abstract: A semiconductor device includes a semiconductor chip, wiring that is included in the semiconductor chip and has a coupling part between parts with different widths, a pad being formed above the wiring and in a position overlapping the coupling part, a bump being formed on the pad, a buffer layer being formed in a position between the coupling part and the pad so as to cover the entire couple part, and inorganic insulating layers being formed between the wiring and the buffer layer and between the buffer layer and the pad, respectively. The buffer layer is made of a material other than resin and softer than the inorganic insulating layer.Type: GrantFiled: November 15, 2017Date of Patent: October 16, 2018Assignee: SEIKO EPSON CORPORATIONInventors: Takeshi Yuzawa, Masatoshi Tagaki
-
Publication number: 20180076138Abstract: A semiconductor device includes a semiconductor chip, wiring that is included in the semiconductor chip and has a coupling part between parts with different widths, a pad being formed above the wiring and in a position overlapping the coupling part, a bump being formed on the pad, a buffer layer being formed in a position between the coupling part and the pad so as to cover the entire couple part, and inorganic insulating layers being formed between the wiring and the buffer layer and between the buffer layer and the pad, respectively. The buffer layer is made of a material other than resin and softer than the inorganic insulating layer.Type: ApplicationFiled: November 15, 2017Publication date: March 15, 2018Applicant: SEIKO EPSON CORPORATIONInventors: Takeshi YUZAWA, Masatoshi TAGAKI
-
Patent number: 9842821Abstract: A semiconductor device includes a semiconductor chip, wiring that is included in the semiconductor chip and has a coupling part between parts with different widths, a pad being formed above the wiring and in a position overlapping the coupling part, a bump being formed on the pad, a buffer layer being formed in a position between the coupling part and the pad so as to cover the entire couple part, and inorganic insulating layers being formed between the wiring and the buffer layer and between the buffer layer and the pad, respectively. The buffer layer is made of a material other than resin and softer than the inorganic insulating layer.Type: GrantFiled: November 3, 2016Date of Patent: December 12, 2017Assignee: Seiko Epson CorporationInventors: Takeshi Yuzawa, Masatoshi Tagaki
-
Publication number: 20170077058Abstract: A semiconductor device includes a semiconductor chip, wiring that is included in the semiconductor chip and has a coupling part between parts with different widths, a pad being formed above the wiring and in a position overlapping the coupling part, a bump being formed on the pad, a buffer layer being formed in a position between the coupling part and the pad so as to cover the entire couple part, and inorganic insulating layers being formed between the wiring and the buffer layer and between the buffer layer and the pad, respectively. The buffer layer is made of a material other than resin and softer than the inorganic insulating layer.Type: ApplicationFiled: November 3, 2016Publication date: March 16, 2017Inventors: Takeshi YUZAWA, Masatoshi TAGAKI
-
Patent number: 9515043Abstract: A semiconductor device includes a semiconductor chip, wiring that is included in the semiconductor chip and has a coupling part between parts with different widths, a pad being formed above the wiring and in a position overlapping the coupling part, a bump being formed on the pad, a buffer layer being formed in a position between the coupling part and the pad so as to cover the entire couple part, and inorganic insulating layers being formed between the wiring and the buffer layer and between the buffer layer and the pad, respectively. The buffer layer is made of a material other than resin and softer than the inorganic insulating layer.Type: GrantFiled: March 29, 2016Date of Patent: December 6, 2016Assignee: SEIKO EPSON CORPORATIONInventors: Takeshi Yuzawa, Masatoshi Tagaki
-
Publication number: 20160225732Abstract: A semiconductor device includes a semiconductor chip, wiring that is included in the semiconductor chip and has a coupling part between parts with different widths, a pad being formed above the wiring and in a position overlapping the coupling part, a bump being formed on the pad, a buffer layer being formed in a position between the coupling part and the pad so as to cover the entire couple part, and inorganic insulating layers being formed between the wiring and the buffer layer and between the buffer layer and the pad, respectively. The buffer layer is made of a material other than resin and softer than the inorganic insulating layer.Type: ApplicationFiled: March 29, 2016Publication date: August 4, 2016Applicant: SEIKO EPSON CORPORATIONInventors: Takeshi YUZAWA, Masatoshi TAGAKI
-
Patent number: 9331039Abstract: A semiconductor device includes a semiconductor chip, wiring that is included in the semiconductor chip and has a coupling part between parts with different widths, a pad being formed above the wiring and in a position overlapping the coupling part, a bump being formed on the pad, a buffer layer being formed in a position between the coupling part and the pad so as to cover the entire couple part, and inorganic insulating layers being formed between the wiring and the buffer layer and between the buffer layer and the pad, respectively. The buffer layer is made of a material other than resin and softer than the inorganic insulating layer.Type: GrantFiled: June 22, 2015Date of Patent: May 3, 2016Assignee: SEIKO EPSON CORPORATIONInventors: Takeshi Yuzawa, Masatoshi Tagaki
-
Publication number: 20150287690Abstract: A semiconductor device includes a semiconductor chip, wiring that is included in the semiconductor chip and has a coupling part between parts with different widths, a pad being formed above the wiring and in a position overlapping the coupling part, a bump being formed on the pad, a buffer layer being formed in a position between the coupling part and the pad so as to cover the entire couple part, and inorganic insulating layers being formed between the wiring and the buffer layer and between the buffer layer and the pad, respectively. The buffer layer is made of a material other than resin and softer than the inorganic insulating layer.Type: ApplicationFiled: June 22, 2015Publication date: October 8, 2015Inventors: Takeshi YUZAWA, Masatoshi TAGAKI
-
Patent number: 9093334Abstract: A semiconductor device includes a semiconductor chip, wiring that is included in the semiconductor chip and has a coupling part between parts with different widths, a pad being formed above the wiring and in a position overlapping the coupling part, a bump being formed on the pad, a buffer layer being formed in a position between the coupling part and the pad so as to cover the entire coupling part, and inorganic insulating layers being formed between the wiring and the buffer layer and between the buffer layer and the pad, respectively. The buffer layer is made of a material other than resin and softer than the inorganic insulating layer.Type: GrantFiled: December 23, 2014Date of Patent: July 28, 2015Assignee: SEIKO EPSON CORPORATIONInventors: Takeshi Yuzawa, Masatoshi Tagaki
-
Publication number: 20150102489Abstract: A semiconductor device includes a semiconductor chip, wiring that is included in the semiconductor chip and has a coupling part between parts with different widths, a pad being formed above the wiring and in a position overlapping the coupling part, a bump being formed on the pad, a buffer layer being formed in a position between the coupling part and the pad so as to cover the entire coupling part, and inorganic insulating layers being formed between the wiring and the buffer layer and between the buffer layer and the pad, respectively.Type: ApplicationFiled: December 23, 2014Publication date: April 16, 2015Inventors: Takeshi YUZAWA, Masatoshi TAGAKI
-
Patent number: 8952554Abstract: A semiconductor device includes a semiconductor chip, wiring that is included in the semiconductor chip and has a coupling part between parts with different widths, a pad being formed above the wiring and in a position overlapping the coupling part, a bump being formed on the pad, a buffer layer being formed in a position between the coupling part and the pad so as to cover the entire coupling part, and inorganic insulating layers being formed between the wiring and the buffer layer and between the buffer layer and the pad, respectively. The buffer layer is made of a material other than resin and softer than the inorganic insulating layer.Type: GrantFiled: April 14, 2014Date of Patent: February 10, 2015Assignee: Seiko Epson CorporationInventors: Takeshi Yuzawa, Masatoshi Tagaki
-
Publication number: 20140361433Abstract: A semiconductor device, including: a semiconductor layer; a first conductive layer formed above the semiconductor layer and having a first width; a second conductive layer connected to the first conductive layer and having a second width which is smaller than the first width; an interlayer dielectric formed above the first conductive layer and the second conductive layer; and an electrode pad formed above the interlayer dielectric. A connection section at which the first conductive layer and the second conductive layer are connected is disposed in a specific region positioned inward from a line extending vertically downward from an edge of the electrode pad; and a reinforcing section is provided at the connection section.Type: ApplicationFiled: August 25, 2014Publication date: December 11, 2014Inventors: Takeshi YUZAWA, Masatoshi TAGAKI
-
Patent number: 8878365Abstract: A semiconductor device, including: a semiconductor layer; a first conductive layer formed above the semiconductor layer and having a first width; a second conductive layer connected to the first conductive layer and having a second width which is smaller than the first width; an interlayer dielectric formed above the first conductive layer and the second conductive layer; and an electrode pad formed above the interlayer dielectric. A connection section at which the first conductive layer and the second conductive layer are connected is disposed in a specific region positioned inward from a line extending vertically downward from an edge of the electrode pad; and a reinforcing section is provided at the connection section.Type: GrantFiled: October 14, 2011Date of Patent: November 4, 2014Assignee: Seiko Epson CorporationInventors: Takeshi Yuzawa, Masatoshi Tagaki
-
Publication number: 20140217583Abstract: A semiconductor device includes a semiconductor chip, wiring that is included in the semiconductor chip and has a coupling part between parts with different widths, a pad being formed above the wiring and in a position overlapping the coupling part, a bump being formed on the pad, a buffer layer being formed in a position between the coupling part and the pad so as to cover the entire coupling part, and inorganic insulating layers being formed between the wiring and the buffer layer and between the buffer layer and the pad, respectively.Type: ApplicationFiled: April 14, 2014Publication date: August 7, 2014Applicant: SEIKO EPSON CORPORATIONInventors: Takeshi YUZAWA, Masatoshi TAGAKI
-
Patent number: 8742601Abstract: A semiconductor device includes a semiconductor chip, wiring that is included in the semiconductor chip and has a coupling part between parts with different widths, a pad being formed above the wiring and in a position overlapping the coupling part, a bump being formed on the pad, a buffer layer being formed in a position between the coupling part and the pad so as to cover the entire coupling part, and inorganic insulating layers being formed between the wiring and the buffer layer and between the buffer layer and the pad, respectively. The buffer layer is made of a material other than resin and softer than the inorganic insulating layer.Type: GrantFiled: October 30, 2013Date of Patent: June 3, 2014Assignee: Seiko Epson CorporationInventors: Takeshi Yuzawa, Masatoshi Tagaki
-
Publication number: 20140048933Abstract: A semiconductor device includes a semiconductor chip, wiring that is included in the semiconductor chip and has a coupling part between parts with different widths, a pad being formed above the wiring and in a position overlapping the coupling part, a bump being formed on the pad, a buffer layer being formed in a position between the coupling part and the pad so as to cover the entire coupling part, and inorganic insulating layers being formed between the wiring and the buffer layer and between the buffer layer and the pad, respectively.Type: ApplicationFiled: October 30, 2013Publication date: February 20, 2014Applicant: SEIKO EPSON CORPORATIONInventors: Takeshi YUZAWA, Masatoshi TAGAKI
-
Patent number: 8614513Abstract: A semiconductor device includes a semiconductor chip, wiring that is included in the semiconductor chip and has a coupling part between parts with different widths, a pad being formed above the wiring and in a position overlapping the coupling part, a bump being formed on the pad, a buffer layer being formed in a position between the coupling part and the pad so as to cover the entire coupling part, and inorganic insulating layers being formed between the wiring and the buffer layer and between the buffer layer and the pad, respectively. The buffer layer is made of a material other than resin and softer than the inorganic insulating layer.Type: GrantFiled: April 20, 2007Date of Patent: December 24, 2013Assignee: Seiko Epson CorporationInventors: Takeshi Yuzawa, Masatoshi Tagaki
-
Patent number: 8441125Abstract: A semiconductor device, including: a semiconductor layer having an active region; a first conductive layer formed above the semiconductor layer and having a first width; a second conductive layer connected to the first conductive layer and having a second width smaller than the first width; an interlayer dielectric formed above the semiconductor layer; an electrode pad formed above the interlayer dielectric and covering the active region when viewed from a top side; and a forbidden region provided in the semiconductor layer in a specific range positioned outward from a line extending vertically downward from an edge of at least part of the electrode pad. A connection section at which the first conductive layer and the second conductive layer are connected is not provided in the forbidden region.Type: GrantFiled: March 28, 2011Date of Patent: May 14, 2013Assignee: Seiko Epson CorporationInventors: Takeshi Yuzawa, Masatoshi Tagaki