Abstract: Providing a multilayer wiring substrate high in connection reliability through process steps of forming more than one opening such as a via-hole in a dielectric layer laminated on a substrate and then applying uniform copper plating to a surface portion of the dielectric layer including the opening to thereby form a wiring layer.

Abstract: A circuit board is provided, wherein electroless plating to fill via-holes can be controlled uniformly with desirable reproducibility, and via-hole portions can be identified from the surface of the substrate after forming a second conductor thereon. The specific circuit board is obtained by applying a potential higher then the potential of the electroless plating to the conductor on the surface when filling the via-holes by electroless plating. In the circuit board, via-hole portions can be identified optically, because the via-hole portion differs from the second conductor in surface condition, such as when a dent is formed.

Abstract: The semiconductor device is provided with an insulator layer having a via-stud on a semiconductor substrate, the via-stud being formed in a via-hole through a barrier layer formed of an inorganic compound layer or a high melting point metal layer formed on an inner surface of the via-hole, the via-stud being made of the same metal as a metal composing the barrier layer. The semiconductor device can be obtained by forming the barrier layer on the inner surface of the via-hole in the semiconductor substrate, then treating the substrate with a treatment solution containing a complex forming agent, immersing the treated substrate into an electroless plating solution, bringing a member made of the same metal as a metal formed by the electroless plating in contact with the electroless plating solution, and electrically connecting the member to the barrier layer to perform electroless plating.

Abstract: A thin-film multilayer wiring board with first and second metallic wiring layers formed on a substrate and an organic insulating layer interposed between the metallic wiring layers. The insulating layer has the first metallic wiring layer and via holes in a thickness of the insulating layer. The lands of the first and second metallic wiring layers are electrically connected by via studs which are made of a conductive metal filled in the via holes.

Abstract: The object of the present invention is to prevent rise of resistance due to oxidation of the copper wiring and diffusion of copper.

Abstract: When a wiring conductor is formed on a semiconductor substrate, a via-hole or a trench is formed by directly performing electroless plating on a barrier layer containing a very small depressed portion such as the via-hole or the trench in an insulator layer without using a dry metallized method or a substitutive plating method. The semiconductor device is provided with an insulator layer having a via-stud on a semiconductor substrate, the via-stud being formed in a via-hole through a barrier layer formed of an inorganic compound layer or a high melting point metal layer formed on an inner surface of the via-hole, the via-stud being made of the same metal as a metal composing the barrier layer.

Abstract: A thin-film multilayer wiring board comprising a first and a second metallic wiring layers formed on a substrate with an organic insulating layer interposed between the metallic wiring layers, wherein the lands of the first and second metallic wiring layers are electrically connected by via studs made of a conductive metal filler formed by electroless plating, and the difference between the top end diameter and the base diameter of each via stud is 10% or less, or the angle made by the taper of the interface between the insulating layer and each via stud against the axis thereof is 5° or less, can provide a high wiring density and signal transmission performance.

Abstract: A copper-based oxidation catalyst comprising a substrate of copper or copper alloy and regions of a metal composed mainly of a group VIII element in close contact with the substrate, the surface of the substrate being partly exposed to the outside, has a high catalytic activity on the carbonyl oxidation reaction and is effective as a catalyst for electroless plating, a fuel cell electrode material, a catalyst for treating waste water or waste liquor or an oxidation reaction catalyst.

Abstract: A method for forming a conductor circuit is provided which comprises depositing and filling a conductor metal in recessions of insulator in the form of grooves or holes using an electroless plating solution, the conductor metal being deposited and filled in the recession to the same level as the surface of the insulator, wherein said electroless plating solution contains an inhibitor which inhibits the cathodic partial reaction which is a metal deposition reaction and the electroless plating is carried out with stirring the plating solution. Since the plating reaction automatically stops when the metal conductor 1 is formed up to the level of the surface of the insulator 2, a conductor circuit in which the surface of the metal conductor 1 and that of the insulator 2 are even and at the same level can be easily obtained.

Abstract: A copper-based oxidation catalyst comprising a substrate of copper or copper alloy and regions of a metal composed mainly of a group VIII element in close contact with the substrate, the surface of the substrate being partly exposed to the outside, has a high catalytic activity on the carbonyl oxidation reaction and is effective as a catalyst for electroless plating, a fuel cell electrode material, a catalyst for treating waste water or waste liquor or an oxidation reaction catalyst.

Abstract: A process is provided for the formation of a conductive circuit pattern on a base metal formed on a substrate. On the base metal, a plating resist is first provided in a pattern corresponding to the circuit to be formed and a circuit pattern is then formed by plating. The plating resist is treated with a stripper and then with a stripping residue remover to cut off chemical bonds in the resist by a dehydrating decomposition reaction. The base metal is treated with an etchant for the base metal, whereby any resist residue still remaining after the treatment with the stripping residue remover is removed and the base metal are etched at areas which were covered by the plating resist.