Abstract: The present invention is a thin film transistor array substrate includes: an insulating substrate; a first metallic pattern formed on said insulting substrate; an insulating film provided on said first metallic pattern; a semiconductor pattern provided on said insulating film; and a second metallic pattern provided on said semiconductor pattern; wherein said second metallic pattern is surrounded by said semiconductor pattern.

Abstract: A method for erasing data of a nonvolatile memory includes adjusting a threshold voltage of a memory cell transistor to a first threshold voltage; adjusting the threshold voltage of the memory cell transistor to a second threshold voltage, the second threshold voltage being lower than the first threshold voltage; adjusting the threshold voltage of the memory cell transistor to a third threshold voltage, the third threshold voltage being higher than the second threshold voltage and being lower than the first threshold voltage; and adjusting the threshold voltage of the memory cell transistor to a fourth threshold voltage, the fourth threshold voltage being lower than the second threshold voltage.

Abstract: A picture display method and apparatus in which a light source is lengthened in service life and optimum color reproduction is realized, while the light utilization efficiency is improved to reduce the power consumption and the size of the apparatus. The red, green and blue illuminating light beams radiated from the light-emitting diodes 12R, 12G and 12R, are illuminated via relay lenses and field lenses on picture display light valves 11R, 11G and 11B and spatially modulated in intensity so as to be synthesized by a synthesis prism 10 and so as to be projected to an enlarged scale on a screen 17. The profile of the light radiating portions of the light-emitting diodes 12R, 12G and 12B are set so as to be the same or similar to the profile of a picture display area of each of the picture display light valves 11R, 11G and 11B in order that the profile of the light beam illuminated on the picture display area will be in keeping with the profile of the picture display area.

Abstract: A semiconductor memory capable of detecting defective data in the memory cells thereof is presented. In the memory, the defective data is detected by applying a word-line voltage, which is less than the minimum threshold voltage of memory cells. Further, when a memory cell at the address N has a defective data, a memory cell at the address N−1 is output as the data of the memory cell at the address N.

Abstract: A picture display method and apparatus in which a light source is lengthened in service life and optimum color reproduction is realized, while the light utilization efficiency is improved to reduce the power consumption and the size of the apparatus. The red, green and blue illuminating light beams radiated from the light-emitting diodes 12R, 12G and 12R, are illuminated via relay lenses and field lenses on picture display light bulbs 11R, 11G and 11B and spatially modulated in intensity so as to be synthesized by a synthesis prism 10 and so as to be projected to an enlarged scale on a screen 17. The profile of the light radiating portions of the light-emitting diodes 12R, 12G and 12B are set so as to be the same or similar to the profile of a picture display area of each of the picture display light bulbs 11R, 11G and 11B in order that the profile of the light beam illuminated on the picture display area will be in keeping with the profile of the picture display area.

Abstract: A semiconductor memory capable of detecting defective data in the memory cells thereof is presented. In the memory, the defective data is detected by applying a word-line voltage, which is less than the minimum threshold voltage of memory cells. Further, when a memory cell at the address N has a defective data, a memory cell at the address N−1 is output as the data of the memory cell at the address N.

Abstract: A picture display method and apparatus in which a light source is lengthened in service life and optimum color reproduction is realized, while the light utilization efficiency is improved to reduce the power consumption and the size of the apparatus. The red, green and blue illuminating light beams radiated from the light-emitting diodes 12R, 12G and 12R, are illuminated via relay lenses and field lenses on picture display light valves 11R, 11G and 11B and spatially modulated in intensity so as to be synthesized by a synthesis prism 10 and so as to be projected to an enlarged scale on a screen 17. The profile of the light radiating portions of the light-emitting diodes 12R, 12G and 12B are set so as to be the same or similar to the profile of a picture display area of each of the picture display light valves 11R, 11G and 11B in order that the profile of the light beam illuminated on the picture display area will be in keeping with the profile of the picture display area.

Abstract: A passive eight-pass solid-state laser amplifier is constructed using a quarter-wave plate (11), a total reflection mirror (12), a polarization beam splitter (5), and a total reflection mirror (6) while input/output faces of a hexagonal zigzag slab solid-state laser medium (15) optically pumped are kept nearly perpendicular to pulsed laser light. Thermal birefringence takes place in the laser medium (15) optically pumped with good symmetry by flash lamps or LDs (9) and is compensated for by a quartz 90.degree. rotator (10). Linearly s-polarized laser light reflected by a polarization beam splitter (3) is output as pulsed laser output light (13) to the outside. Owing to this, saturation laser amplification can be achieved using output laser light from a pulsed laser oscillator of relatively low output, as source light.

Abstract: A disk reproducing apparatus comprises recording unit for measuring an error component .epsilon. between an address represented by sub-code Q data on an information data recording region on a CD-ROM disk and an address represented by header address data, and recording the measured error component .epsilon. on the information data recording region, and correction unit for reading out, from the recording unit to, the error component .epsilon. corresponding to the information data recording region including a target position to which a pickup is to be moved, in the state in which the target position is set by the address represented by the sub-code Q data and a search for the information data recorded on the information data recording region has been requested, and for correcting the position where the pickup is to be stopped on the basis of the error component .epsilon..

Abstract: The present invention relates to a digital data processing apparatus for transferring digital data which is output from a disc reproduction section (15.sub.1) to a buffer memory (18)-equipped host processing section (13) and for making processing. By detecting a shift in frequency of an operation clock on the basis of an output of the disc reproduction section (15.sub.1) and varying the frequency of the operation clock of the host processing section (13) in accordance with a result of that detection, it is possible to prevent the memory (18) from being placed in an over- or an underflowed state and to perform a normal data reproduction.

Abstract: The present invention relates to a digital data processing apparatus for transferring digital data which is output from a disc reproduction section to a buffer memory-equipped host processing section and for performing processing. The range over which the frequency of an operation clock in the disc reproduction section is shifted under an ambient condition is set to be higher than the range over which the frequency of an operation clock in the host processing section is shifted under the ambient condition. The storage capacity of the memory is set to be greater than a maximum amount of unprocessed data accumulated in the memory which is calculated from the frequency shifts of both the operation clocks and maximum data of the disc reproduction section, whereby the memory is prevented from being placed in an over- or an underflowed state and a normal data reproduction can be achieved.

Abstract: A disc reproducing aparatus is provided which is able to read out all of the data stored on the disc in a short time. The disk reproducing apparatus reproduces data stored on a disc and comprise a device for rotating the disc and a data processing device having a plurality of optical pickup devices for reading the data from the rotating disc, such that each pickup device reads a different part of the data area.

Abstract: The present invention relates to a digital data processing apparatus for transferring digital data which is reproduced at a disc reproduction section to, together with address information, a host processing section in a block unit. When a block signal is generated at a position exceeding a range of a time-base variation of the address information caused by jitters and the address information prior to the generation of the block signal is added to main digital data, the address information is added to each block at all times, whereby it is possible to prevent the block from being dropped out, without being transferred to the host processing section, and two addresses from being allocated to the same block. It is possible to perform a continuous data reproduction in an accurate block/address correspondence relation.

Abstract: An electrically erasable programmable read-only memory receives a single supply voltage and a ground voltage, and generates a first voltage higher than both the supply voltage and the ground voltage, and a second voltage lower than both the supply voltage and the ground voltage. Each memory cell in the memory has a nonvolatile storage transistor with a floating gate. To erase the memory cell, the first voltage is applied on a first side of the floating gate and second voltage is applied on a second, opposite side of the floating gate. To program the memory cell, the second voltage is applied on the first side of the floating gate, and the first voltage is applied on the second side of the floating gate.

Abstract: When receiving address data of a target position from a host computer, a control unit reads the present address data of a pick-up using a subcode Q detector or a header detector. The control unit computes a difference between the present address data as read out and the address data of the preceding frame (one block) already read out and stored in RAM. The control unit then checks if the difference is within a preset value. If it is, the control unit decides that the present address data is correct, and uses it in the data access operation. If it is not, the control unit computes a difference between the address data at the target position as specified by the host computer and the present address. The control unit then checks to see if the difference is within a preset value. If it is, the present address data is correct it is used in the data access operation.

Abstract: A voltage level detecting circuit includes a resistance voltage divider, a level converter and an MOS driver arranged such that the detection characteristics are immune to temperature variations. The voltage divider has two resistive elements serially connected to each other to produce a divided voltage. The two resistive elements have different resistance variations to temperature change. The level converter has a threshold voltage and converts a divided voltage which is more than the threshold voltage from the voltage divider into a binary signal. The MOS driver produces a control signal on receipt of a binary signal from the level converter.

Abstract: A filter press having a slurry feed inlet arranged at the lower ends of filter cloths at locations outside filter chambers formed by filter plates thereby enabling the filter cloths to entirely open when the filter plates are opened to facilitate discharge of cakes adhered to the filter cloths.

Abstract: A filter press comprising filter cake discharge means including hammers which give upper portions of filter cloths vibrations caused by circular movement of the hammers to facilitate discharge of filter cakes adhered to the filter cloths after filtration.