Abstract: A high dielectric composite material obtained by subjecting submicron particles of an inorganic filler containing a metal as its essential component to an insulating treatment such as a chemical treatment, further subjecting to a surface treatment for improving their compatibility with organic resins, and then dispersing in an organic resin, has a dielectric constant of 15 or above, with its dielectric loss tangent in the frequency region of from 100 MHz to 80 GHz being 0.1 or less, and can therefore be used effectively for multilayer wiring boards and module substrates.

Abstract: To provide a composite material member for semiconductor device, an insulated semiconductor device and non-insulated semiconductor device using the composite material member, which are effective for obtaining a semiconductor device that alleviates thermal stress or thermal strain occurring during production or operation, has no possibilities of deformation, degeneration and rupture of each member, and is highly reliably and inexpensive. The composite material member for semiconductor device is characterized by being a composite metal plate with particles composed of cuprous oxide dispersed in a copper matrix, in which a surface of the composite metal plate is covered with a metal layer, and a copper layer with thickness of 0.5 &mgr;m or larger exists in an interface formed by the composite metal plate and the metal layer.

Abstract: A high dielectric composite material obtained by subjecting submicron particles of an inorganic filler containing a metal as its essential component to an insulating treatment such as a chemical treatment, further subjecting to a surface treatment for improving their compatibility with organic resins, and then dispersing in an organic resin, has a dielectric constant of 15 or above, with its dielectric loss tangent in the frequency region of from 100 MHz to 80 GHz being 0.1 or less, and can therefore be used effectively for multilayer wiring boards and module substrates.

Abstract: In a semiconductor device having a three-layered buffer layer comprising core layer 1 having interconnected foams such as a three-dimensional reticular structure and adhesive layers 2 proved on both sides of the core layer as a stress buffer layer between semiconductor chip 5 and wiring 4 to lessen a thermal stress generated between the semiconductor device and the package substrate, where a thickness ratio of core layer 1 to total buffer layer is at least 0.2, the production process can be simplified by using such a buffer layer, thereby improving the mass production capacity and enhancing the package reliability.

Abstract: A semiconductor device and a manufacturing method thereof, which device includes a semiconductor element arranged to form integrated circuitry, a plurality of electrode pads formed on the side of the integrated circuitry formation surface of the semiconductor element, bump electrodes for electrically connecting to the electrode pads through a conductive layer, and a stress relaxation layer formed between the integrated circuitry formation surface and electrode pads on one hand and the bump electrodes and conductive layer on the other hand, the stress relaxation layer being adhered thereto, wherein more than one third of the stress relaxation layer from a surface thereof is cut away for removal and wherein the stress relaxation layer is subdivided into a plurality of regions. Accordingly, it is possible to provide a semiconductor device capable of offering high density mounting schemes with increased reliability while reducing production costs.

Abstract: In a semiconductor device having a three-layered buffer layer comprising core layer 1 having interconnected foams such as a three-dimensional reticular structure and adhesive layers 2 provided on both sides of the core layer as a stress buffer layer between semiconductor chip 5 and wiring 4 to lessen a thermal stress generated between the semiconductor device and the package substrate, where a thickness ratio of core layer 1 to total buffer layer is at least 0.2, the production process can be simplified by using such a buffer layer, thereby improving the mass production capacity and enhancing the package reliability.

Abstract: A semiconductor device includes a semiconductor element arranged to form integrated circuitry, a plurality of electrode pads formed on the side of the integrated circuitry formation surface of the in semiconductor element, bump electrodes for external connection electrically connected to the electrode pads through a conductive layer, and a stress relaxation layer formed between the integrated circuitry formation surface and electrode pads on one hand and the bump electrodes and conductive layer on the other hand, the stress relaxation layer being adhered thereto, wherein more than one third of the stress relaxation layer from a surface thereof is cut away for removal and wherein the stress relaxation layer is subdivided into a plurality of regions.

Abstract: A manufacturing method makes it possible to produce a semiconductor apparatus which is outstanding in mounting reliability at a high manufacturing yield rate. A semiconductor apparatus, in which, on the surface of a semiconductor chip with a circuit and an electrode formed thereon, a stress cushioning layer is provided, except for a part where the electrode is, has a wiring layer connected to the electrode on the stress cushioning layer, an external protection film on the wiring layer and stress cushioning layer, a window where a part of the wiring layer is exposed at a predetermined location of the external protection film, and an external electrode which is electrically connected to the wiring layer via the window. The stress cushioning layer, wiring layer, conductor, external protection film, and external electrode are formed on the inside of the end of the semiconductor chip.

Abstract: Supply of a semiconductor device capable of preventing the likely occurrence of cracking of a ceramic substrate, and the consequential disconnection of internal layer wiring, due to the thermal changes suffered when the semiconductor device is mounted on external wiring boards different in thermal expansion coefficient.

Abstract: A photosensitive composition comprising a polyimide precursor, a photosensitive material having a structure represented by the following formula wherein A1 is an atom belonging to Group VI of the periodic table, in the molecule thereof and/or a photosensitive material having a structure represented by the following formula: wherein A2 is O, S or N atom, in the molecule thereof is suitable for formation of a positive tone pattern excellent in heat resistance, and applicable to electronic devices.

Abstract: A resin encapsulated semiconductor element is encapsulated with resin composition containing an organic compound selected from the group consisting of organobromine compounds, organophosphorus compounds and organonitrogen compounds, an inorganic filler, and a metal borate. The obtained resin encapsulated semiconductor element has the same flame resistance as a conventional semiconductor element which is encapsulated with a resin composition containing a halogen and antimony compound, and furthermore, has remarkably improved reliabilities regarding moisture resistance and storing at a high temperature by effects of the contained metal borate for suppressing generation of or trapping released gas components, such as halogen or phosphorus, and others.

Abstract: A highly reliable positive type photosensitive resin composition composed of diamine having a carboxyl group as a structural unit, which can be developed with an alkaline aqueous solution, comprising polyamic acid ester having hydrophobic group, o-quinonediazidesulfonyl amide compound, and/or o-quinonediazidesulfonyl amide sulfonic ester compound, and electronic devices using the same. A polyamide film having preferable positive type relief patterns, of which the unexposed portion is not corroded, can be obtained.

Abstract: A pattern can be formed on a substrated using a pattern forming material comprising (a) a medium, e.g. a polymer or compound, having reactivity for changing solubility in an alkali aqueous solution by a reaction using an acid as a catalyst, and (b) as an acid precursor an alkylsulfonic acid ester obtained from a compound having at least two phenolic hydroxyl groups.

Abstract: Electrical charge accumulation caused by exposure to a charged particle beam during the formation of latent image pattern can be reduced and thus the positional deviation of the pattern by using a bottom-resist layer comprising a radiation-induced conductive composition. Highly integrated semiconductor device can be made easily and in high yields. The positional deviation can further be reduced by exposing a charge particle beam patterning apparatus substantially simultaneously with an actinic radiation such as ultraviolet light, X-ray, and infrared light.

Abstract: A comb-like or dot-like phase shifter pattern is added to a phase shifter used in phase shifting mask technology, which is then exposed onto a wafer. This enables the formation of extremely fine line patterns or space patterns having widths different from each other simultaneously. Further, when two reticles are disposed such that phase shifter patterns disposed therein intersect each other and are exposed consecutively onto a wafer, a fine hole pattern or dot pattern can be formed at a position where the phase shifter patterns intersect each other.

Abstract: A pattern can be formed on a substrated using a pattern forming material comprising (a) a medium, e.g. a polymer or compound, having reactivity for changing solubility in an alkali aqueous solution by a reaction using an acid as a catalyst, and (b) as an acid precursor an alkylsulfonic acid ester obtained from a compound having at least two phenolic hydroxyl groups.

Abstract: A process for forming a pattern comprising forming an alkali-soluble polymer layer on a substrate, forming a radiation-sensitive composition layer containing a diazonium salt on the alkali-soluble polymer layer to form a resist layer having a two-layer structure, exposing the resist layer to a radiation to cause the change in solubility in an aqueous alkaline solution at the boundary between the two layers and forming a predetermined pattern in the resist layer by a usual resist process. The resist layer may comprise a plurality of layers comprising the two-layer structure as a repeating unit structure.

Abstract: A thick polymer film containing an aromatic bisazide and/or an aromatic sulfonyl azide compound is formed on a substrate having topography level on its surface to flatten said surface and then heated or the whole surface thereof is exposed to a light. A mask pattern having a dry etching resistance higher than that of the polymer is formed on the polymer film, exposed parts of the polymer film are removed by the dry etching and the exposed parts of the film to be processed are removed to form a pattern.

Abstract: This invention relates to a radiation-sensitive composition having resistance to oxygen reactive-ion etching and a process for forming a pattern by using the same.The radiation-sensitive composition of this invention comprises a mixture of cis-(1,3,5,7-tetrahydroxy)-1,3,5,7-tetraphenylcyclotetrasiloxane and a polysilsesquioxane, said mixture containing 5 to 100 wt. % of cis-(1,3,5,7-tetrahydroxy)-1,3,5,7-tetraphenylcyclotetrasiloxane, and a resist containing a phenolic resin soluble in an aqueous alkali solution.

Abstract: A radiation-sensitive composition comprising an iodine-containing azide compound at least a part of which can be fixed substantially in a polymer by exposure to a radiation and a polymer, or a radiation-sensitive composition comprising an azide compound, an iodine compound at least a part of which can be fixed substantially in a polymer by exposure to a radiation and a polymer. This composition can be subjected to the dry development with oxygen plasma after the exposure followed by heating.