Patents by Inventor Takuro Ohmaru

Takuro Ohmaru has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9667148
    Abstract: An object is to obtain a rectifier having a small voltage drop and to reduce the fabrication cost of a converter circuit. A photoelectric transducer device including: a photoelectric transducer element; and a converter circuit stepping up or stepping down an output of the photoelectric transducer element and including a switching element and a rectifier, in which the switching element is a first oxide semiconductor transistor that is normally off and in which the rectifier is a second oxide semiconductor transistor that is diode-connected and normally on.
    Type: Grant
    Filed: June 1, 2011
    Date of Patent: May 30, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Yoshiaki Ito, Takuro Ohmaru, Shunpei Yamazaki
  • Publication number: 20170092674
    Abstract: A small semiconductor device suitable for high-speed operation is provided. The semiconductor device includes a first circuit, a global bit line pair for writing, a global bit line pair for reading, and a local bit line pair. The first circuit includes second to fifth circuits. The second to fifth circuits are electrically connected to each other by the local bit line pair. The second circuit functions as a read/write selection switch. The third circuit functions as a working memory that stores 1-bit complementary data temporarily. The fourth circuit has a function of precharging the local bit line pair. The fifth circuit includes n (n is an integer of 2 or more) sixth circuits. The sixth circuits each have a function of retaining 1-bit complementary data written from the third circuit.
    Type: Application
    Filed: September 21, 2016
    Publication date: March 30, 2017
    Inventors: Takuro OHMARU, Yukio MAEHASHI
  • Publication number: 20170092670
    Abstract: A solid-state imaging device with high productivity and improved dynamic range is provided. In the imaging device including a photoelectric conversion element having an i-type semiconductor layer, functional elements, and a wiring, an area where the functional elements and the wiring overlap with the i-type semiconductor in a plane view is preferably less than or equal to 35%, further preferably less than or equal to 15%, and still further preferably less than or equal to 10% of the area of the i-type semiconductor in a plane view. Plural photoelectric conversion elements are provided in the same semiconductor layer, whereby a process for separating the respective photoelectric conversion elements can be reduced. The respective i-type semiconductor layers in the plural photoelectric conversion elements are separated by a p-type semiconductor layer or an n-type semiconductor layer.
    Type: Application
    Filed: May 27, 2015
    Publication date: March 30, 2017
    Inventors: Yuki OKAMOTO, Yoshiyuki KUROKAWA, Hiroki INOUE, Takuro OHMARU
  • Publication number: 20170084649
    Abstract: An imaging device that has a structure where a transistor is used in common by a plurality of pixels and is capable of imaging with a global shutter system is provided. A transistor that resets the potential of a charge detection portion, a transistor that outputs a signal corresponding to the potential of the charge detection portion, and a transistor that selects a pixel are used in common by the plurality of pixels. A node AN (a first charge retention portion), a node FD (a second charge retention portion), and a node FDX (the charge detection portion) are provided. Imaging data obtained in the node AN is transferred to the node FD, and the imaging data is sequentially transferred from the node FD to the node FDX to be read.
    Type: Application
    Filed: September 7, 2016
    Publication date: March 23, 2017
    Inventors: Takuro OHMARU, Naoto KUSUMOTO
  • Patent number: 9601215
    Abstract: A holding circuit includes first to third input terminals, an output terminal, first to third switches, a capacitor, and a node. The first to third switches control conduction between the node and the first input terminal, conduction between the node and the output terminal, and conduction between the second input terminal and the output terminal, respectively. First and second terminals of the capacitor are electrically connected to the node and the third input terminal, respectively. The first to third switches are each a transistor comprising an oxide semiconductor layer comprising a semiconductor region. Owing to the structure, a potential change of the node in an electrically floating state can be suppressed; thus, the holding circuit can retain its state for a long time. The holding circuit can be used as a memory circuit for backup of a sequential circuit, for example.
    Type: Grant
    Filed: April 2, 2015
    Date of Patent: March 21, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Takuro Ohmaru
  • Publication number: 20170078606
    Abstract: An imaging device whose dynamic range can be wide with a simple structure is provided. In a circuit configuration and an operation method of the imaging device, whether a charge detection portion provided in a pixel is saturated with electrons is determined and an operation mode is changed depending on the determination result. First imaging data is captured first, and is read out in the case where the charge detection portion is not saturated with electrons. In the case where the charge detection portion is saturated with electrons, the saturation of the charge detection portion is eliminated and second imaging data is captured and read out.
    Type: Application
    Filed: September 7, 2016
    Publication date: March 16, 2017
    Inventor: Takuro OHMARU
  • Publication number: 20170054930
    Abstract: An imaging device with low power consumption is provided. The pixel of the imaging device includes first and second photoelectric conversion elements, and first to fifth transistors. A cathode of the first photoelectric conversion element is electrically connected to the first transistor. An anode of a second photoelectric conversion element is electrically connected to the second transistor. Imaging data of a reference frame is obtained using the first photoelectric conversion element, and then imaging data of a difference detection frame is obtained using the second photoelectric conversion element. After the imaging data of the difference detection frame is obtained, a first potential that is a potential of a signal output from the pixel and a second potential that is a reference potential are compared. Whether or not there is a difference between the imaging data of the reference frame and the imaging data of the difference detection frame is determined using the first potential and the second potential.
    Type: Application
    Filed: August 8, 2016
    Publication date: February 23, 2017
    Inventors: Takuro OHMARU, Naoto KUSUMOTO, Kentaro HAYASHI
  • Publication number: 20170039970
    Abstract: In the case where a still image is displayed on a pixel portion having a pixel, for example, a driver circuit for controlling writing of an image signal having image data to the pixel portion stops by stopping supply of power supply voltage to the driver circuit, and writing of an image signal to the pixel portion is stopped. After the driver circuit stops, supply of power supply voltage to a panel controller for controlling the operation of the driver circuit and an image memory for storing the image data is stopped, and supply of power supply voltage to a CPU for collectively controlling the operation of the panel controller, the image memory, and a power supply controller for controlling supply of power supply voltage to a variety of circuits in a semiconductor display device is stopped.
    Type: Application
    Filed: October 21, 2016
    Publication date: February 9, 2017
    Inventors: Tatsuji NISHIJIMA, Seiichi YONEDA, Takuro OHMARU, Jun KOYAMA
  • Publication number: 20170033130
    Abstract: A semiconductor device includes a first transistor which includes a first gate electrode below its oxide semiconductor layer and a second gate electrode above its oxide semiconductor layer, and a second transistor which includes a first gate electrode above its oxide semiconductor layer and a second gate electrode below its oxide semiconductor layer and is provided so as to at least partly overlap with the first transistor. In the semiconductor device, a conductive film serving as the second gate electrode of the first transistor and the second gate electrode of the second transistor is shared between the first transistor and the second transistor. Note that the second gate electrode not only controls the threshold voltages (Vth) of the first transistor and the second transistor but also has an effect of reducing interference of an electric field applied from respective first gate electrodes of the first transistor and the second transistor.
    Type: Application
    Filed: October 14, 2016
    Publication date: February 2, 2017
    Inventors: Seiichi YONEDA, Takuro OHMARU
  • Patent number: 9559105
    Abstract: A signal processing circuit includes a memory and a control portion configured to control the memory. The control portion includes a volatile memory circuit including data latch terminals, a first non-volatile memory circuit electrically connected to one of the data latch terminals, a second non-volatile memory circuit electrically connected to the other of the data latch terminals, and a precharge circuit having a function of supplying a potential that is a half of a high power supply potential to the one and the other of the data latch terminals. Each of the first non-volatile memory circuit and the second non-volatile memory circuit includes a transistor having a channel formation region including an oxide semiconductor and a capacitor connected to a node that is brought into a floating state by turning off the transistor.
    Type: Grant
    Filed: May 17, 2012
    Date of Patent: January 31, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takuro Ohmaru, Hidetomo Kobayashi
  • Publication number: 20170025456
    Abstract: An imaging device capable of obtaining high-quality imaging data is provided. The imaging device can correct variation in the threshold voltage of amplifier transistors included in pixel circuits. The amplifier transistor includes two gates facing each other with a channel formation region provided therebetween. The amplifier transistor operates in such a manner that one of the gates holds a potential for correcting variation in the threshold voltage and the other thereof is supplied with a potential corresponding to imaging data.
    Type: Application
    Filed: July 15, 2016
    Publication date: January 26, 2017
    Inventor: Takuro OHMARU
  • Publication number: 20170018587
    Abstract: An imaging device whose dynamic range is broadened is provided. The imaging device includes a pixel including a first photoelectric conversion element and a first circuit including a second photoelectric conversion element. The first circuit switches the operation mode of the pixel to a normal imaging mode or a wide dynamic range mode and switches the operation region of the first photoelectric conversion element to a normal region or an avalanche region in accordance with the illuminance of light with which the second photoelectric conversion element is irradiated. When the illuminance of light with which the first photoelectric conversion element is irradiated is increased, the increase rate of a writing current flowing to the pixel is higher in the avalanche region than in the normal region. However, in the wide dynamic range mode, the increase rate of current can be lowered, and thus the dynamic range can be broadened.
    Type: Application
    Filed: July 11, 2016
    Publication date: January 19, 2017
    Inventor: Takuro OHMARU
  • Publication number: 20170013214
    Abstract: An imaging device that has a high degree of freedom for exposure time and is capable of taking an image with little distortion is provided. In an n-th frame period where n is a natural number of two or more, a potential of a first charge accumulation portion is reset; the first charge accumulation portion is charged with a potential in accordance with an output of a photoelectric conversion element and simultaneously, imaging data in the (n?1)-th frame that is output in accordance with a potential of a second charge accumulation portion is read; a potential of the second charge accumulation portion is reset; a potential of the first charge accumulation portion is transferred to the second charge accumulation portion, and a potential of the second charge accumulation portion is held. Through the steps, the degree of freedom for an exposure period is increased.
    Type: Application
    Filed: July 5, 2016
    Publication date: January 12, 2017
    Inventor: Takuro OHMARU
  • Patent number: 9537043
    Abstract: It is an object to reduce the region of a photoelectric conversion element which light does not reach, to suppress deterioration of power generation efficiency, and to suppress manufacturing cost of a voltage conversion element. The present invention relates to a transmissive photoelectric conversion device which includes a photoelectric conversion element including an n-type semiconductor layer, an intrinsic semiconductor layer, and a p-type semiconductor layer; a voltage conversion element which is overlapped with the photoelectric conversion element and which includes an oxide semiconductor film for a channel formation region; and a conductive element which electrically connects the photoelectric conversion element and the voltage conversion element. The photoelectric conversion element is a solar cell. The voltage conversion element includes a transistor having a channel formation region including an oxide semiconductor film. The voltage conversion element is a DC-DC converter.
    Type: Grant
    Filed: April 15, 2011
    Date of Patent: January 3, 2017
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Hajime Kimura, Yoshiaki Ito, Takuro Ohmaru
  • Patent number: 9536592
    Abstract: A memory device includes a first memory circuit including a silicon transistor, a selection circuit including a silicon transistor, and a second memory circuit including oxide semiconductor transistors and a storage capacitor, in which one terminal of the storage capacitor is connected to a portion where two oxide semiconductor transistors are connected in series, an output of the second memory circuit is connected to a second input terminal of the selection circuit, and an input of the second memory circuit is connected to a first input terminal of the selection circuit or an output terminal of the first memory circuit.
    Type: Grant
    Filed: March 17, 2016
    Date of Patent: January 3, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Naoaki Tsutsui, Atsuo Isobe, Wataru Uesugi, Takuro Ohmaru
  • Publication number: 20160381266
    Abstract: Provided is an imaging device operated at high speed and low power consumption. The imaging device includes a pixel and a first circuit. The pixel includes a first photoelectric conversion element and a second photoelectric conversion element. The first circuit is configured to compare a first signal which is output from the pixel on the basis of imaging data obtained by the first photosensitive conversion element to a second signal which is output from the pixel on the basis of imaging data obtained by the second photosensitive conversion element for determining whether there is a difference between the first signal and the second signal. Thus, edge detection can be performed without a periphery device for edge detection outside the imaging device.
    Type: Application
    Filed: June 16, 2016
    Publication date: December 29, 2016
    Inventor: Takuro OHMARU
  • Patent number: 9496022
    Abstract: To provide a novel semiconductor device. The semiconductor device includes a circuit including a memory cell including a transistor using an oxide semiconductor; and a refresh timing determination unit including a capacitor, a transistor using an oxide semiconductor, and a comparator circuit. The potential of a floating node in the refresh timing determination unit is directly or indirectly input to the comparator circuit and compared with a reference potential. When the potential of the floating node becomes a certain value, a power switch operating in accordance with an output of the comparator circuit is turned on, power is supplied to the circuit including the memory cell, and then the reference potential is also changed. After that, refresh operation of the memory cell is performed. When the refresh operation is finished, the power switch is turned off.
    Type: Grant
    Filed: May 28, 2015
    Date of Patent: November 15, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Takuro Ohmaru
  • Publication number: 20160329368
    Abstract: To provide a novel semiconductor device, a semiconductor device capable of operating at a high speed, or a semiconductor device with reduced area, or a semiconductor device with low power consumption. The semiconductor device which has a function of taking a moving image includes a pixel portion including a plurality of pixels, a first circuit, and a second circuit. Each of the plurality of pixels has a function of converting irradiation light to generate first data and a function of generating second data corresponding to a difference between the first data in a first frame period and the first data in a second frame period. The first circuit has a function of converting the second data into a digital signal and outputting the digital signal as compressed data of the moving image. The second circuit has a function of controlling output of the compressed data.
    Type: Application
    Filed: April 25, 2016
    Publication date: November 10, 2016
    Inventor: Takuro OHMARU
  • Patent number: 9490806
    Abstract: A programmable analog device and an analog device that can retain data even when supply of a power supply potential is interrupted and consumes less power. In a semiconductor device, first to fourth transistors are used as switches in a unit cell including an analog element, and the output of the unit cell switches between a conducting state, a non-conducting state, and a conducting state through the analog element by controlling the potential of a first node where the first transistor and the second transistor are connected and the potential of a second node where the third transistor and the fourth transistor are connected.
    Type: Grant
    Filed: June 1, 2015
    Date of Patent: November 8, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Takuro Ohmaru
  • Patent number: 9478704
    Abstract: In the case where a still image is displayed on a pixel portion having a pixel, for example, a driver circuit for controlling writing of an image signal having image data to the pixel portion stops by stopping supply of power supply voltage to the driver circuit, and writing of an image signal to the pixel portion is stopped. After the driver circuit stops, supply of power supply voltage to a panel controller for controlling the operation of the driver circuit and an image memory for storing the image data is stopped, and supply of power supply voltage to a CPU for collectively controlling the operation of the panel controller, the image memory, and a power supply controller for controlling supply of power supply voltage to a variety of circuits in a semiconductor display device is stopped.
    Type: Grant
    Filed: November 27, 2012
    Date of Patent: October 25, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuji Nishijima, Seiichi Yoneda, Takuro Ohmaru, Jun Koyama