Patents by Inventor Takuya Handa
Takuya Handa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9142681Abstract: A metal oxide layer is in contact with an interlayer insulating layer covering a transistor, and has a stacked-layer structure including a first metal oxide layer having an amorphous structure and a second metal oxide layer having a polycrystalline structure. In the first metal oxide layer, there are no crystal grain boundaries, and grid intervals are wide as compared to those in a metal oxide layer in a crystalline state; thus, the first metal oxide layer easily traps moisture between the lattices. In the second metal oxide layer having a polycrystalline structure, crystal parts other than crystal grain boundary portions have dense structures and extremely low moisture permeability. Thus, the structure in which the metal oxide layer including the first metal oxide layer and the second metal oxide layer is in contact with the interlayer insulating layer can effectively prevent moisture permeation into the transistor.Type: GrantFiled: September 21, 2012Date of Patent: September 22, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masahiro Watanabe, Mitsuo Mashiyama, Takuya Handa, Kenichi Okazaki
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Publication number: 20150115262Abstract: To provide a semiconductor device which has transistor characteristics with little variation and includes an oxide semiconductor. The semiconductor device includes an insulating film over a conductive film and an oxide semiconductor film over the insulating film. The oxide semiconductor film includes a first oxide semiconductor layer, a second oxide semiconductor layer over the first oxide semiconductor layer, and a third oxide semiconductor layer over the second oxide semiconductor layer. The energy level of a bottom of a conduction band of the second oxide semiconductor layer is lower than those of the first and third oxide semiconductor layers. An end portion of the second oxide semiconductor layer is positioned on an inner side than an end portion of the first oxide semiconductor layer.Type: ApplicationFiled: December 30, 2014Publication date: April 30, 2015Inventors: Hajime TOKUNAGA, Takuya HANDA
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Patent number: 8963155Abstract: To provide a semiconductor device which has transistor characteristics with little variation and includes an oxide semiconductor. The semiconductor device includes an insulating film over a conductive film and an oxide semiconductor film over the insulating film. The oxide semiconductor film includes a first oxide semiconductor layer, a second oxide semiconductor layer over the first oxide semiconductor layer, and a third oxide semiconductor layer over the second oxide semiconductor layer. The energy level of a bottom of a conduction band of the second oxide semiconductor layer is lower than those of the first and third oxide semiconductor layers. An end portion of the second oxide semiconductor layer is positioned on an inner side than an end portion of the first oxide semiconductor layer.Type: GrantFiled: July 29, 2013Date of Patent: February 24, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hajime Tokunaga, Takuya Handa
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Publication number: 20140326997Abstract: A highly reliable semiconductor device that includes a transistor including an oxide semiconductor, which can display a high-definition image and can be manufactured with a high yield. The semiconductor device includes a pixel portion including a plurality of pixels, a gate signal line driver circuit portion, and a source signal line driver circuit portion including a first circuit that controls timing of sampling video signals and a second circuit that samples the video signals in accordance with the timing and then inputs the sampled video signals to the pixels. The second circuit includes a plurality of transistors in each of which an oxide semiconductor stacked layer is used as a channel formation region, the first circuit and the second circuit are electrically connected to each other by a wiring, and the wiring is electrically connected to gates of at least two transistors of the plurality of transistors.Type: ApplicationFiled: July 17, 2014Publication date: November 6, 2014Inventors: Shunpei YAMAZAKI, Kenichi OKAZAKI, Masahiro WATANABE, Takuya HANDA
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Publication number: 20140239296Abstract: A transistor or the like having high field-effect mobility is provided. A transistor or the like having stable electrical characteristics is provided. A semiconductor device including a first oxide semiconductor layer, a second oxide semiconductor layer, a gate insulating film, and a gate electrode which partly overlap with one another is provided. The second oxide semiconductor layer is positioned between the first oxide semiconductor layer and the gate insulating film. The gate insulating film is positioned between the second oxide semiconductor layer and the gate electrode. The first oxide semiconductor layer has fewer oxygen vacancies than those of the second oxide semiconductor layer.Type: ApplicationFiled: February 26, 2014Publication date: August 28, 2014Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hajime Tokunaga, Takuya Handa, Kenichi Okazaki
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Patent number: 8785928Abstract: A highly reliable semiconductor device that includes a transistor including an oxide semiconductor, which can display a high-definition image and can be manufactured with a high yield. The semiconductor device includes a pixel portion including a plurality of pixels, a gate signal line driver circuit portion, and a source signal line driver circuit portion including a first circuit that controls timing of sampling video signals and a second circuit that samples the video signals in accordance with the timing and then inputs the sampled video signals to the pixels. The second circuit includes a plurality of transistors in each of which an oxide semiconductor stacked layer is used as a channel formation region, the first circuit and the second circuit are electrically connected to each other by a wiring, and the wiring is electrically connected to gates of at least two transistors of the plurality of transistors.Type: GrantFiled: May 30, 2013Date of Patent: July 22, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kenichi Okazaki, Masahiro Watanabe, Takuya Handa
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Publication number: 20140103335Abstract: Stable electrical characteristics of a transistor including an oxide semiconductor layer are achieved. A highly reliable semiconductor device including the transistor is provided. The semiconductor device includes a multilayer film formed of an oxide layer and an oxide semiconductor layer, a gate insulating film in contact with the oxide layer, and a gate electrode overlapping with the multilayer film with the gate insulating film interposed therebetween. The oxide layer contains a common element to the oxide semiconductor layer and has a large energy gap than the oxide semiconductor layer. The composition between the oxide layer and the oxide semiconductor layer gradually changes.Type: ApplicationFiled: October 7, 2013Publication date: April 17, 2014Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kenichi Okazaki, Mitsuo Mashiyama, Takuya Handa, Masahiro Watanabe, Hajime Tokunaga
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Publication number: 20140034945Abstract: To provide a semiconductor device which has transistor characteristics with little variation and includes an oxide semiconductor. The semiconductor device includes an insulating film over a conductive film and an oxide semiconductor film over the insulating film. The oxide semiconductor film includes a first oxide semiconductor layer, a second oxide semiconductor layer over the first oxide semiconductor layer, and a third oxide semiconductor layer over the second oxide semiconductor layer. The energy level of a bottom of a conduction band of the second oxide semiconductor layer is lower than those of the first and third oxide semiconductor layers. An end portion of the second oxide semiconductor layer is positioned on an inner side than an end portion of the first oxide semiconductor layer.Type: ApplicationFiled: July 29, 2013Publication date: February 6, 2014Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hajime TOKUNAGA, Takuya HANDA
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Publication number: 20130320337Abstract: A highly reliable semiconductor device that includes a transistor including an oxide semiconductor, which can display a high-definition image and can be manufactured with a high yield. The semiconductor device includes a pixel portion including a plurality of pixels, a gate signal line driver circuit portion, and a source signal line driver circuit portion including a first circuit that controls timing of sampling video signals and a second circuit that samples the video signals in accordance with the timing and then inputs the sampled video signals to the pixels. The second circuit includes a plurality of transistors in each of which an oxide semiconductor stacked layer is used as a channel formation region, the first circuit and the second circuit are electrically connected to each other by a wiring, and the wiring is electrically connected to gates of at least two transistors of the plurality of transistors.Type: ApplicationFiled: May 30, 2013Publication date: December 5, 2013Inventors: Shunpei YAMAZAKI, Kenichi OKAZAKI, Masahiro WATANABE, Takuya HANDA
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Publication number: 20130048978Abstract: Provided is a semiconductor device including an oxide semiconductor and having stable electrical characteristics. Specifically, a semiconductor device including an oxide semiconductor and including a gate insulating film with favorable characteristics is provided. Further, a method for manufacturing the semiconductor device is provided. The semiconductor device includes a gate electrode, a gate insulating film over the gate electrode, an oxide semiconductor film over the gate insulating film, and a source electrode and a drain electrode in contact with the oxide semiconductor film. The gate insulating film includes at least a silicon oxynitride film and an oxygen release type oxide film which is formed over the silicon oxynitride film. The oxide semiconductor film is formed on and in contact with the oxygen release type oxide film.Type: ApplicationFiled: August 23, 2012Publication date: February 28, 2013Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Masahiro WATANABE, Mitsuo MASHIYAMA, Takuya HANDA, Kenichi OKAZAKI, Shunpei YAMAZAKI
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Publication number: 20130048977Abstract: To provide a semiconductor device including an oxide semiconductor, which has stable electric characteristics and has high reliability. To provide a method for manufacturing the semiconductor device. The semiconductor device includes a gate electrode, a gate insulating film formed over the gate electrode, an oxide semiconductor film formed over the gate insulating film, a source electrode and a drain electrode formed over the oxide semiconductor film, and a protective film. The protective film includes a metal oxide film, and the metal oxide film has a film density of higher than or equal to 3.2 g/cm3.Type: ApplicationFiled: August 23, 2012Publication date: February 28, 2013Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Masahiro WATANABE, Mitsuo MASHIYAMA, Takuya HANDA, Kenichi OKAZAKI
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Patent number: 7133956Abstract: The CPU of an electronic device generates a parameter for determining the amplitude of a serial data signal when it is output from an output device to a serial ATA bus. The parameter indicates a value that is needed to make the amplitude of the received serial data signal fall within a range, stipulated in serial ATA interface standards, when another electronic device receives the serial data signal. The parameter is generated in accordance with the cable length of the serial ATA bus designated by a cable length designation unit. The other electronic device is connected to the serial ATA bus.Type: GrantFiled: August 4, 2004Date of Patent: November 7, 2006Assignee: Kabushiki Kaisha ToshibaInventors: Takuya Handa, Fubito Igari, Akihiro Watanabe
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Publication number: 20050066203Abstract: The CPU of an electronic device generates a parameter for determining the amplitude of a serial data signal when it is output from an output device to a serial ATA bus. The parameter indicates a value that is needed to make the amplitude of the received serial data signal fall within a range, stipulated in serial ATA interface standards, when another electronic device receives the serial data signal. The parameter is generated in accordance with the cable length of the serial ATA bus designated by a cable length designation unit. The other electronic device is connected to the serial ATA bus.Type: ApplicationFiled: August 4, 2004Publication date: March 24, 2005Inventors: Takuya Handa, Fubito Igari, Akihiro Watanabe