Patents by Inventor Takuya Maruyama

Takuya Maruyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210270941
    Abstract: The present technology relates to a light-receiving element and a distance-measuring module for enabling improvement of characteristics. A light-receiving element includes an on-chip lens, a wiring layer, and a semiconductor layer arranged between the on-chip lens and the wiring layer, the semiconductor layer includes a first voltage application portion to which a first voltage is applied, a second voltage application portion to which a second voltage different from the first voltage is applied, a first charge detection portion arranged around the first voltage application portion, and a second charge detection portion arranged around the second voltage application portion, and the wiring layer includes at least one ground line having a wider line width than a power supply line. The present technology can be applied to, for example, a light-receiving element that generates distance information by a ToF method.
    Type: Application
    Filed: July 4, 2019
    Publication date: September 2, 2021
    Inventors: RYOTA WATANABE, TOSHIFUMI WAKANO, TAKURO MURASE, TAKUYA MARUYAMA, TSUTOMU IMOTO, YUJI ISOGAI
  • Patent number: 11079476
    Abstract: A light-receiving element includes an on-chip lens; an interconnection layer; and a semiconductor layer that is disposed between the on-chip lens and the interconnection layer. The semiconductor layer includes a first voltage application unit to which a first voltage is applied, a second voltage application unit to which a second voltage different from the first voltage is applied, a first charge detection unit that is disposed at the periphery of the first voltage application unit, a second charge detection unit that is disposed at the periphery of the second voltage application unit, and a charge discharge region that is provided on an outer side of an effective pixel region. For example, the present technology is applicable to a light-receiving element that generates distance information in a ToF method, or the like.
    Type: Grant
    Filed: July 8, 2019
    Date of Patent: August 3, 2021
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Tsutomu Imoto, Yuji Isogai, Takuya Maruyama, Takuro Murase, Ryota Watanabe, Takeshi Yamazaki
  • Patent number: 11075236
    Abstract: The present technology relates to a solid-state imaging device and an electronic apparatus capable of improving the accuracy of phase difference detection while suppressing degradation of a picked-up image. There is provided a solid-state imaging device including: a pixel array unit, a plurality of pixels being two-dimensionally arranged in the pixel array unit, a plurality of photoelectric conversion devices being formed with respect to one on-chip lens in each of the plurality of pixels, a part of at least one of an inter-pixel separation unit formed between the plurality of pixels and an inter-pixel light blocking unit formed between the plurality of pixels protruding toward a center of the corresponding pixel in a projecting shape to form a projection portion. The present technology is applicable to, for example, a CMOS image sensor including a pixel for detecting the phase difference.
    Type: Grant
    Filed: May 28, 2018
    Date of Patent: July 27, 2021
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Shouichirou Shiraishi, Takuya Maruyama, Shinichiro Yagi, Shohei Shimada, Shinya Sato
  • Publication number: 20210225907
    Abstract: The present technology relates to a light-receiving element and a distance measurement module which are capable of improving characteristics. A light-receiving element includes: a first voltage application unit to which a voltage is applied; a first charge detection unit that is disposed at a periphery of the first voltage application unit; a second voltage application unit to which a voltage is applied; a second charge detection unit that is disposed at a periphery of the second voltage application unit; a third voltage application unit to which a first voltage is applied; and a voltage control unit that applies a second voltage to one of the first voltage application unit and the second a voltage application unit and causes the other to be in a floating state, the second voltage being different from the first voltage. The present technology is applicable to a light-receiving element.
    Type: Application
    Filed: July 4, 2019
    Publication date: July 22, 2021
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Takuya MARUYAMA, Yuji ISOGAI, Tsutomu IMOTO, Takuro MURASE, Ryota WATANABE
  • Publication number: 20210135022
    Abstract: The present technology relates to a light reception device and a distance measurement module whose characteristic can be improved. The light reception device includes an on-chip lens, a wiring layer, and a semiconductor layer arranged between the on-chip lens and the wiring layer. The semiconductor layer includes a first tap having a first voltage application portion and a first charge detection portion arranged around the first voltage application portion, and a second tap having a second voltage application portion and a second charge detection portion arranged around the second voltage application portion. Furthermore, the light reception device is configured such that a phase difference is detected using signals detected by the first tap and the second tap. The present technology can be applied, for example, to a light reception device that generates distance information, for example, by a ToF method, and so forth.
    Type: Application
    Filed: July 4, 2019
    Publication date: May 6, 2021
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Takuro MURASE, Ryota WATANABE, Toshifumi WAKANO, Takuya MARUYAMA, Yusuke OTAKE, Tsutomu IMOTO, Yuji ISOGAI
  • Publication number: 20210135021
    Abstract: The present technology relates to a light receiving element and a ranging module that can improve characteristics._A light receiving element includes: light receiving regions each including a first voltage application unit to which a first voltage is applied, a first charge detection unit provided around the first voltage application unit, a second voltage application unit to which a second voltage different from the first voltage is applied, and a second charge detection unit provided around the second voltage application unit; and an isolation portion that is arranged at a boundary between the light receiving regions adjacent to each other, and isolates the light receiving regions from each other. The present technology can be applied to a light receiving element.
    Type: Application
    Filed: July 4, 2019
    Publication date: May 6, 2021
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Koji NEYA, Takuya MARUYAMA
  • Publication number: 20210118897
    Abstract: A manufacturing method of a semiconductor device includes: (a) forming a gate structure for a control gate electrode on a semiconductor substrate; (b) forming a charge storage film so as to cover a first side surface, a second side surface, and an upper surface of the gate structure; (c) forming a conductive film for a memory gate electrode on the charge storage film; (d) removing a part of the charge storage film and a part of the conductive film such that the charge storage film and the conductive film remain in this order on the first side surface and the second side surface of the gate structure, thereby forming the memory gate electrode; and (e) removing apart of the gate structure separate from the first side surface and the second side surface such that a part of the semiconductor substrate is exposed from the gate structure.
    Type: Application
    Filed: September 25, 2020
    Publication date: April 22, 2021
    Inventors: Takuya MARUYAMA, Takahiro MARUYAMA
  • Publication number: 20200393003
    Abstract: The tooth part includes: a tubular portion having an inner tooth portion formed on an inner peripheral surface and an outer tooth portion formed on an outer peripheral surface; a plurality of inner peripheral wall portions that each extend in an axial direction of the tubular portion and form a tooth tip portion of the inner tooth portion and a tooth bottom portion of the outer tooth portion; a plurality of outer peripheral wall portions that each extend in the axial direction and form a tooth bottom portion of the inner tooth portion and a tooth tip portion of the outer tooth portion; and an annular rib that is joined to the outer peripheral wall portions and that extends in an annular shape on an open end side with respect to the inner peripheral wall portions in the axial direction and radially outward from the inner peripheral wall portions, at an open end of the tubular portion.
    Type: Application
    Filed: January 25, 2019
    Publication date: December 17, 2020
    Applicant: AISIN AW CO., LTD.
    Inventors: Ryo MATSUMOTO, Takuya MARUYAMA
  • Publication number: 20200235149
    Abstract: The present technology relates to a solid-state imaging device and an electronic apparatus capable of improving the accuracy of phase difference detection while suppressing degradation of a picked-up image. There is provided a solid-state imaging device including: a pixel array unit, a plurality of pixels being two-dimensionally arranged in the pixel array unit, a plurality of photoelectric conversion devices being formed with respect to one on-chip lens in each of the plurality of pixels, a part of at least one of an inter-pixel separation unit formed between the plurality of pixels and an inter-pixel light blocking unit formed between the plurality of pixels protruding toward a center of the corresponding pixel in a projecting shape to form a projection portion. The present technology is applicable to, for example, a CMOS image sensor including a pixel for detecting the phase difference.
    Type: Application
    Filed: May 28, 2018
    Publication date: July 23, 2020
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Shouichirou SHIRAISHI, Takuya MARUYAMA, Shinichiro YAGI, Shohei SHIMADA, Shinya SATO
  • Patent number: 10692910
    Abstract: The present disclosure relates to a solid-state imaging element capable of suppressing stray light with respect to a charge storage unit such as an FD, and an electronic device. According to an aspect of the present disclosure, a solid-state imaging element constituted by many pixels includes a photoelectric conversion unit formed for each of the pixels and that converts incident light into a charge; a charge storage unit that temporarily holds the converted charge; and a first light shielding unit formed between the pixels and having a predetermined length in a thickness direction of a substrate. The charge storage unit is formed below a cross portion where the first light shielding unit formed between pixels adjacent to each other in a longitudinal direction crosses the first light shielding unit formed between pixels adjacent to each other in a lateral direction. The present disclosure can be applied to, for example, a backside irradiation type CMOS image sensor.
    Type: Grant
    Filed: March 1, 2017
    Date of Patent: June 23, 2020
    Assignee: SONY CORPORATION
    Inventors: Kyohei Mizuta, Takuya Maruyama, Yukihiro Ando
  • Publication number: 20200115442
    Abstract: Disclosed is a protein aqueous suspension preparation containing a protein and a polyamino acid, the protein and the polyamino acid having a surface charge in a buffer and forming a complex suspended in the buffer, wherein the absolute value of the difference between pH of the buffer and isoelectric point pI of the protein is in the range of from 0.5 to 4.0. Also disclosed are a method of preparing a protein aqueous suspension preparation and a prefilled syringe containing a concentrated protein aqueous suspension preparation. The protein can exhibit at least one of shaking stress resistance, fluidity enhancement, oxidation resistance, thermal stability, and aggregation inhibitory properties.
    Type: Application
    Filed: October 18, 2019
    Publication date: April 16, 2020
    Applicant: TERUMO KABUSHIKI KAISHA
    Inventors: Shunsuke IZAKI, Tomoaki KIMOTO, Kenji HANDA, Shiuhei MIEDA, Kentaro SHIRAKI, Takaaki KURINOMARU, Takuya MARUYAMA
  • Publication number: 20200028017
    Abstract: A light-receiving element includes an on-chip lens; an interconnection layer; and a semiconductor layer that is disposed between the on-chip lens and the interconnection layer. The semiconductor layer includes a first voltage application unit to which a first voltage is applied, a second voltage application unit to which a second voltage different from the first voltage is applied, a first charge detection unit that is disposed at the periphery of the first voltage application unit, a second charge detection unit that is disposed at the periphery of the second voltage application unit, and a charge discharge region that is provided on an outer side of an effective pixel region. For example, the present technology is applicable to a light-receiving element that generates distance information in a ToF method, or the like.
    Type: Application
    Filed: July 8, 2019
    Publication date: January 23, 2020
    Applicant: Sony Semiconductor Solutions Corporation
    Inventors: TSUTOMU IMOTO, YUJI ISOGAI, TAKUYA MARUYAMA, TAKURO MURASE, RYOTA WATANABE, TAKESHI YAMAZAKI
  • Publication number: 20190088701
    Abstract: The present disclosure relates to a solid-state imaging element capable of suppressing stray light with respect to a charge storage unit such as an FD, and an electronic device. According to an aspect of the present disclosure, a solid-state imaging element constituted by many pixels includes: a photoelectric conversion unit formed for each of the pixels and configured to convert incident light into a charge; a charge storage unit configured to temporarily hold the converted charge; and a first light shielding unit formed between the pixels and having a predetermined length in a thickness direction of a substrate. The charge storage unit is formed below a cross portion where the first light shielding unit formed between pixels adjacent to each other in a longitudinal direction crosses the first light shielding unit formed between pixels adjacent to each other in a lateral direction. The present disclosure can be applied to, for example, a backside irradiation type CMOS image sensor.
    Type: Application
    Filed: March 1, 2017
    Publication date: March 21, 2019
    Inventors: KYOHEI MIZUTA, TAKUYA MARUYAMA, YUKIHIRO ANDO
  • Patent number: 9553121
    Abstract: A connection portion connects a copper-based first wiring layer with a copper-based second wiring layer arranged on the upper side of a first diffusion barrier film. The first diffusion barrier film includes a first opening region formed in a semiconductor circuit region that is a partial region in a two-dimensional view and a second opening region formed as an opening region different from the first opening region in a two-dimensional view. The opening regions are formed in a region different from an opening region formed to allow the connection portion to pass through the first diffusion barrier film. A mark wiring layer is arranged immediately above the second opening region as the same layer as the second wiring layer. A second diffusion barrier film is arranged in contact with the upper surface of the mark wiring layer.
    Type: Grant
    Filed: August 25, 2015
    Date of Patent: January 24, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Hiroaki Sekikawa, Hidenori Sato, Yotaro Goto, Takuya Maruyama, Masaaki Shinohara
  • Publication number: 20160206752
    Abstract: Disclosed is a protein aqueous suspension preparation containing a protein and a polyamino acid, the protein and the polyamino acid having a surface charge in a buffer and forming a complex suspended in the buffer, wherein the absolute value of the difference between pH of the buffer and isoelectric point pI of the protein is in the range of from 0.5 to 4.0. Also disclosed are a method of preparing a protein aqueous suspension preparation and a prefilled syringe containing a concentrated protein aqueous suspension preparation. The protein can exhibit at least one of shaking stress resistance, fluidity enhancement, oxidation resistance, thermal stability, and aggregation inhibitory properties.
    Type: Application
    Filed: March 28, 2016
    Publication date: July 21, 2016
    Applicant: TERUMO KABUSHIKI KAISHA
    Inventors: Shunsuke IZAKI, Tomoaki KIMOTO, Kenji HANDA, Shiuhei MIEDA, Kentaro SHIRAKI, Takaaki KURINOMARU, Takuya MARUYAMA
  • Patent number: 9337093
    Abstract: The semiconductor device includes an insulating film that is formed using a cyclic siloxane having a six-membered ring structure as a raw material; a trench that is formed in the insulating film; and a interconnect that is configured by a metal film embedded in the trench. In the semiconductor device, a modified layer is formed on a bottom surface of the trench, in which the number of carbon atoms and/or the number of nitrogen atoms per unit volume is larger than that inside the insulating film.
    Type: Grant
    Filed: July 14, 2011
    Date of Patent: May 10, 2016
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Daisuke Oshida, Ippei Kume, Makoto Ueki, Manabu Iguchi, Naoya Inoue, Takuya Maruyama, Toshiji Taiji, Hirokazu Katsuyama
  • Publication number: 20160064323
    Abstract: A connection portion connects a copper-based first wiring layer with a copper-based second wiring layer arranged on the upper side of a first diffusion barrier film. The first diffusion barrier film includes a first opening region formed in a semiconductor circuit region that is a partial region in a two-dimensional view and a second opening region formed as an opening region different from the first opening region in a two-dimensional view. The opening regions are formed in a region different from an opening region formed to allow the connection portion to pass through the first diffusion barrier film. A mark wiring layer is arranged immediately above the second opening region as the same layer as the second wiring layer. A second diffusion barrier film is arranged in contact with the upper surface of the mark wiring layer.
    Type: Application
    Filed: August 25, 2015
    Publication date: March 3, 2016
    Inventors: Hiroaki SEKIKAWA, Hidenori SATO, Yotaro GOTO, Takuya MARUYAMA, Masaaki SHINOHARA
  • Patent number: 8854156
    Abstract: A thin-film piezoelectric resonator including a substrate (6); a piezoelectric layer (2), a piezoelectric resonator stack (12) with a top electrode (10) and bottom electrode (8), and a cavity (4). The piezoelectric resonator stack (12) has a vibration region (40) where the top electrode and bottom electrode overlap in the thickness direction, and the vibration region comprises a first vibration region, second vibration region, and third vibration region. When seen from the thickness direction, the first vibration region is present at the outermost side, the third vibration region is present at the innermost side and does not contact the first vibration region, and the second vibration region is interposed between the first vibration region and third vibration region.
    Type: Grant
    Filed: February 17, 2010
    Date of Patent: October 7, 2014
    Assignee: UBE Industries, Ltd.
    Inventors: Kazuki Iwashita, Hiroshi Tsuchiya, Kensuke Tanaka, Takuya Maruyama
  • Publication number: 20120015517
    Abstract: The semiconductor device includes an insulating film that is formed using a cyclic siloxane having a six-membered ring structure as a raw material; a trench that is formed in the insulating film; and a interconnect that is configured by a metal film embedded in the trench. In the semiconductor device, a modified layer is formed on a bottom surface of the trench, in which the number of carbon atoms and/or the number of nitrogen atoms per unit volume is larger than that inside the insulating film.
    Type: Application
    Filed: July 14, 2011
    Publication date: January 19, 2012
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Daisuke OSHIDA, Ippei KUME, Makoto UEKI, Manabu IGUCHI, Naoya INOUE, Takuya MARUYAMA, Toshiji TAIJI, Hirokazu KATSUYAMA
  • Publication number: 20110298564
    Abstract: A thin-film piezoelectric resonator including a substrate (6); a piezoelectric layer (2), a piezoelectric resonator stack (12) with a top electrode (10) and bottom electrode (8), and a cavity (4). The piezoelectric resonator stack (12) has a vibration region (40) where the top electrode and bottom electrode overlap in the thickness direction, and the vibration region comprises a first vibration region, second vibration region, and third vibration region. When seen from the thickness direction, the first vibration region is present at the outermost side, the third vibration region is present at the innermost side and does not contact the first vibration region, and the second vibration region is interposed between the first vibration region and third vibration region.
    Type: Application
    Filed: February 17, 2010
    Publication date: December 8, 2011
    Inventors: Kazuki Iwashita, Hiroshi Tsuchiya, Kensuke Tanaka, Takuya Maruyama