Patents by Inventor Takuya Takahashi

Takuya Takahashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170123332
    Abstract: The toner of the present invention contains: a toner base particle, and a silica particle and a fatty acid metal salt particle adhering to a surface of the toner base particle. The toner base particle contains a crystalline polyester resin and an amorphous polyester resin. The toner particle has an average circularity of 0.945 to 0.965. The silica particle has a volume average particle size of 70 to 300 nm, and has an average circularity of 0.5 to 0.9. The fatty acid metal salt particle has a median diameter based on a volume of 0.50 to 2.00 ?m.
    Type: Application
    Filed: September 23, 2016
    Publication date: May 4, 2017
    Inventors: Satoshi UCHINO, Shinya OBARA, Futoshi KADONOME, Noriyuki KIMPARA, Ikuko SAKURADA, Takuya TAKAHASHI
  • Publication number: 20170123334
    Abstract: An electrostatic latent image developing toner of the present invention includes toner base particles and particles containing a fatty acid metal salt. The toner base particles contain a crystalline resin containing a segment of a first resin and a segment of a second resin chemically bonded to each other and an amorphous resin containing at least the second resin. The crystalline resin is a hybrid crystalline polyester resin. The first resin is a crystalline polyester resin. The second resin is an amorphous resin. The volume-based median diameter (Da) of the toner base particles and the volume-based median diameter (Db) of the particles containing the fatty acid metal salt satisfy the relations represented by Expressions (1) and (2) below: 0.5 ?m?Db?2.0 ?m??Expression (1) 0.1 Db/Da?0.5.
    Type: Application
    Filed: September 30, 2016
    Publication date: May 4, 2017
    Inventors: Noriyuki KIMPARA, Satoshi UCHINO, Shinya OBARA, Futoshi KADONOME, Ikuko SAKURADA, Takuya TAKAHASHI
  • Publication number: 20170113329
    Abstract: The fluid clamp apparatus includes: a sliding piston member that vertically partitions its cylinder bore; first and second fluid pressure operation chambers; a fluid passage that, during an upward light-load stroke of the piston member, causes the back pressure in the second fluid pressure operation chamber to be received by the output rod to advance the output rod; a force multiplying mechanism that, during a heavy-load stroke of the piston member, multiplies the force acting on the piston member and transmits this force to the output rod; and a link mechanism that, during unclamping lowering operation of the piston member, links together the output rod and the piston member after lowering by a predetermined stroke amount.
    Type: Application
    Filed: March 4, 2015
    Publication date: April 27, 2017
    Inventor: Takuya TAKAHASHI
  • Patent number: 9633918
    Abstract: A semiconductor device includes an insulating substrate, a semiconductor element secured to a top surface of the insulating substrate, a case formed of a resin and having a frame portion surrounding the semiconductor element, a metal support located above the insulating substrate and having an end secured to the frame portion, a holding-down portion extending downward from the metal support so as to prevent upwardly convex bending of the insulating substrate, and an adhesive bonding the insulating substrate and the case together.
    Type: Grant
    Filed: June 5, 2014
    Date of Patent: April 25, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takuya Takahashi, Yoshitaka Otsubo
  • Publication number: 20170090324
    Abstract: Provided is an electrostatic image developing toner including a toner mother particle containing a colorant and a binder resin comprising a crystalline resin and an amorphous resin; and an external additive. The external additive includes an inorganic fine particle having a number average major axis in a range of 50 to 100 nm, an average aspect ratio in a range of 3 to 10, and a volume resistivity in a range of 1×1010 to 1×1012 ?·cm in primary particles.
    Type: Application
    Filed: September 16, 2016
    Publication date: March 30, 2017
    Inventors: Futoshi KADONOME, Satoshi UCHINO, Shinya OBARA, Noriyuki KIMPARA, Ikuko SAKURADA, Takuya TAKAHASHI
  • Patent number: 9455208
    Abstract: An insertion vertical electrode region and part of a case-contact horizontal electrode region of an electrode insertion part of an external electrode is inserted and molded in an intra-case insertion region of a housing case. Inserting the case-contact horizontal electrode region, which serves as part of the electrode insertion part, in the intra-case insertion region allows the upper and lower surfaces of the case-contact horizontal electrode region to be in contact with the intra-case insertion region.
    Type: Grant
    Filed: August 7, 2015
    Date of Patent: September 27, 2016
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takuya Takahashi, Yoshitaka Otsubo
  • Patent number: 9397014
    Abstract: An electrode includes an extending portion extending such that both ends thereof get into a first recessed portion and a second recessed portion provided in a first inner wall and a second inner wall, respectively, facing each other in a lateral direction of a case. The extent to which both the ends of the extending portion get into is set such that positions of both the ends thereof in a case where both the ends are narrowed toward a midpoint therebetween to reduce a length of the extending portion to 70% of the length of the extending portion exist between positions of the first and second inner walls in a case where the first and second inner walls are each narrowed toward a midpoint therebetween by 10% of the distance between the first and second inner walls.
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: July 19, 2016
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Masaomi Miyazawa, Mituharu Tabata, Takuya Takahashi
  • Publication number: 20160148852
    Abstract: An insertion vertical electrode region and part of a case-contact horizontal electrode region of an electrode insertion part of an external electrode is inserted and molded in an intra-case insertion region of a housing case.
    Type: Application
    Filed: August 7, 2015
    Publication date: May 26, 2016
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takuya TAKAHASHI, Yoshitaka OTSUBO
  • Publication number: 20160095213
    Abstract: A semiconductor device includes a semiconductor element and a ceramic circuit substrate on which the semiconductor element is mounted. The ceramic circuit substrate includes a ceramic substrate having one surface and the other surface facing each other, a metal circuit board joined to the one surface of the ceramic substrate and electrically connected to the semiconductor element, and a metal heat-dissipation plate joined to the other surface of the ceramic substrate. The metal circuit board is greater in thickness than the metal heat-dissipation plate. A surface of the metal heat-dissipation plate on a side opposite to the ceramic substrate is larger in area than a surface of the metal circuit board on a side opposite to the ceramic substrate. Thereby, a semiconductor device capable of suppressing warpage of the ceramic substrate can be achieved.
    Type: Application
    Filed: April 15, 2015
    Publication date: March 31, 2016
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yoshitaka OTSUBO, Takuya TAKAHASHI, Masaomi MIYAZAWA, Tetsuo YAMASHITA, Tomohiro HIEDA, Mituharu TABATA
  • Publication number: 20160053394
    Abstract: The present invention relates to an additive for a copper electroplating bath, including at least one polymer compound selected from polymer compounds each represented by the following general formula (1) or the following general formula (2), each of the polymer compounds having a weight-average molecular weight of from 20,000 to 10,000,000; a copper electroplating bath including the additive; and a copper electroplating method using the copper electroplating bath. (In the formulae, X represents at least one unit selected from units represented by specific structures, and a ratio of a to b, i.e. “a:b” falls within the range of from 10:90 to 99:1.
    Type: Application
    Filed: March 19, 2014
    Publication date: February 25, 2016
    Applicant: ADEKA CORPORATION
    Inventors: Takuya TAKAHASHI, Takahiro YOSHII, Tomoko HATSUKADE, Takehiro ZUSHI
  • Patent number: 9219113
    Abstract: A semiconductor device includes a substrate of a first conductivity type, a first impurity region of a second conductivity type formed on a top surface side of the substrate, a second impurity region of the second conductivity type formed on the top surface side of the substrate and in contact with the first impurity region, the second impurity region laterally surrounding the first impurity region and having a greater depth than the first impurity region, as viewed in cross-section, and a breakdown voltage enhancing structure of the second conductivity type formed to laterally surround the second impurity region. A boundary between the first and second impurity regions has a maximum impurity concentration equal to or less than that of the second impurity region, and a current is applied between a top surface and a bottom surface of the substrate.
    Type: Grant
    Filed: April 1, 2014
    Date of Patent: December 22, 2015
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takuya Takahashi, Atsushi Narazaki, Tetsuo Takahashi
  • Patent number: 9182592
    Abstract: An optical filtering device and an optical inspection apparatus for detecting a defect in a high sensitivity using an optical filtering device which includes a shutter array formed in a two-dimensionally on an optically opaque thin film produced on a SOI wafer and the SOI wafer is removed at portions thereof on the lower side of the shutter patterns to form perforation portions while working electrodes are formed at the remaining portion of the SOI wafer, a glass substrate having electrode patterns formed on the surface thereof and having the shutter array mounted thereon, and a power supply section for supplying electric power to the electrode patterns formed on the glass substrate and the working electrodes of the SOI wafer. And the working electrodes is controlled to cause the shutter patterns to carry out opening and closing movements with respect to the perforation portions to carry out optical filtering.
    Type: Grant
    Filed: February 3, 2012
    Date of Patent: November 10, 2015
    Assignees: HITACHI, LTD., THE UNIVERSITY OF TOKYO
    Inventors: Taketo Ueno, Toshihiko Nakata, Yukihiro Shibata, Shun'ichi Matsumoto, Atsushi Taniguchi, Hiroshi Toshiyoshi, Takuya Takahashi, Kentaro Motohara
  • Publication number: 20150303126
    Abstract: A semiconductor device includes an insulating substrate including a substrate, a metal pattern formed on an upper surface of the substrate, and a metal film formed on a lower surface of the substrate, a semiconductor element fixed on the metal pattern, a case surrounding the metal pattern and having a contact portion maintained in contact with the upper surface of the substrate, and an adhesive with which the case and a portion of the upper surface of the substrate outside a portion maintained in contact with the contact portion are bonded together, wherein a plurality of through holes are formed in a peripheral portion of the case, the through holes extending vertically through the case, and wherein the metal film exists in at least part of a place right below the contact portion.
    Type: Application
    Filed: April 3, 2015
    Publication date: October 22, 2015
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takuya TAKAHASHI, Yoshitaka OTSUBO
  • Publication number: 20150270186
    Abstract: An electrode includes an extending portion extending such that both ends thereof get into a first recessed portion and a second recessed portion provided in a first inner wall and a second inner wall, respectively, facing each other in a lateral direction of a case. The extent to which both the ends of the extending portion get into is set such that positions of both the ends thereof in a case where both the ends are narrowed toward a midpoint therebetween to reduce a length of the extending portion to 70% of the length of the extending portion exist between positions of the first and second inner walls in a case where the first and second inner walls are each narrowed toward a midpoint therebetween by 10% of the distance between the first and second inner walls.
    Type: Application
    Filed: December 10, 2014
    Publication date: September 24, 2015
    Applicant: Mitsubishi Electric Corporation
    Inventors: Masaomi MIYAZAWA, Mituharu TABATA, Takuya TAKAHASHI
  • Publication number: 20150115282
    Abstract: A semiconductor device includes an insulating substrate, a semiconductor element secured to a top surface of the insulating substrate, a case formed of a resin and having a frame portion surrounding the semiconductor element, a metal support located above the insulating substrate and having an end secured to the frame portion, a holding-down portion extending downward from the metal support so as to prevent upwardly convex bending of the insulating substrate, and an adhesive bonding the insulating substrate and the case together.
    Type: Application
    Filed: June 5, 2014
    Publication date: April 30, 2015
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takuya TAKAHASHI, Yoshitaka OTSUBO
  • Publication number: 20150012582
    Abstract: There is provided an information processing apparatus including an existing place information acquisition part and a my-spot information registration part. The existing place information acquisition part is configured to acquire existing place information which specifies an existing place. The my-spot information registration part is configured to acquire spot information related to a spot, which spot information is provided from a plurality of information provider devices, based on the existing place information; and to register spot information specified by a user as my-spot information, out of the acquired spot information.
    Type: Application
    Filed: May 30, 2014
    Publication date: January 8, 2015
    Applicant: SONY CORPORATION
    Inventors: Toru MASANO, Seiji TATEMATSU, Naoshi KOBUYA, Hiroaki AKIYAMA, Tadashi YOKOYAMA, Tomohiro NAITO, Kaoru NAKAMURA, Takuya TAKAHASHI, Yuichi UEDA
  • Publication number: 20140367737
    Abstract: A semiconductor device includes a substrate of a first conductivity type, a first impurity region of a second conductivity type formed on a top surface side of the substrate, a second impurity region of the second conductivity type formed on the top surface side of the substrate and in contact with the first impurity region, the second impurity region laterally surrounding the first impurity region and having a greater depth than the first impurity region, as viewed in cross-section, and a breakdown voltage enhancing structure of the second conductivity type formed to laterally surround the second impurity region. A boundary between the first and second impurity regions has a maximum impurity concentration equal to or less than that of the second impurity region, and a current is applied between a top surface and a bottom surface of the substrate.
    Type: Application
    Filed: April 1, 2014
    Publication date: December 18, 2014
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takuya TAKAHASHI, Atsushi NARAZAKI, Tetsuo TAKAHASHI
  • Patent number: 8882544
    Abstract: Provided is a connector that can be firmly mounted on the substrate. A plug connector is mounted on a plug substrate while making a metal plate function as a plurality of contacts by an insulting layer formed on the metal plate and a plurality of conductive patterns formed on the insulating layer. A plurality of protrusions that protrude toward the plug substrate are formed on a substrate opposing surface, which is a surface opposite to the plug substrate. The plurality of conductive patterns are formed to respectively overlap the plurality of protrusions.
    Type: Grant
    Filed: November 29, 2012
    Date of Patent: November 11, 2014
    Assignee: Japan Aviation Electronics Industry, Ltd.
    Inventors: Tetsuya Komoto, Osamu Hashiguchi, Takuya Takahashi, Ryuzo Shimeno
  • Publication number: 20140296357
    Abstract: Provided are a support for supporting a metal, a metal-supported catalyst, a methanation reaction apparatus, and a method relating thereto that realize effective methanation of carbon monoxide. The support for supporting a metal includes a carbonized material obtained by carbonizing raw materials containing an organic substance and a metal, in which the support is used for supporting a metal that exhibits a catalytic activity for a methanation reaction of carbon monoxide. The metal-supported catalyst includes: a support formed of a carbonized material obtained by carbonizing raw materials containing an organic substance and a metal; and a metal that exhibits a catalytic activity for a methanation reaction of carbon monoxide, the metal being supported on the support.
    Type: Application
    Filed: November 1, 2012
    Publication date: October 2, 2014
    Applicant: National University Corporation gunma University
    Inventors: Jun-ichi Ozaki, Hiroki Takahashi, Takuya Takahashi, Naokatsu Kannari, Rieko Kobayashi, Naoto Saito
  • Publication number: 20140160471
    Abstract: An optical filtering device and an optical inspection apparatus for detecting a defect in a high sensitivity using an optical filtering device which includes a shutter array formed in a two-dimensionally on an optically opaque thin film produced on a SOI wafer and the SOI wafer is removed at portions thereof on the lower side of the shutter patterns to form perforation portions while working electrodes are formed at the remaining portion of the SOI wafer, a glass substrate having electrode patterns formed on the surface thereof and having the shutter array mounted thereon, and a power supply section for supplying electric power to the electrode patterns formed on the glass substrate and the working electrodes of the SOI wafer. And the working electrodes is controlled to cause the shutter patterns to carry out opening and closing movements with respect to the perforation portions to carry out optical filtering.
    Type: Application
    Filed: February 3, 2012
    Publication date: June 12, 2014
    Inventors: Taketo Ueno, Toshihiko Nakata, Yukihiro Shibata, Shun'ichi Matsumoto, Atsushi Taniguchi, Hiroshi Toshiyoshi, Takuya Takahashi, Kentaro Motohara