Abstract: A system and method that allows out of order fetching of host non-volatile memory commands can improve and maximize the memory device performance. The memory device can examine the non-volatile memory command headers available in the non-volatile memory command queue to select one or more, non-volatile memory commands to be fetched, in an optimum order and executed according to currently available resources in the memory device. The memory device can optimize performance of the non-volatile memory commands by re-ordering the host commands fetched from the host memory.

Abstract: Methods, systems, and computer readable media for intelligent fetching of storage device commands from submission queues are disclosed. On method is implemented in a data storage device including a controller and a memory. The method includes collecting submission queue command statistics; monitoring resource state of the data storage device. The method further includes using the submission queue command statistics and the resource state to select a submission queue from which a next data storage device command should be fetched. The method further includes fetching the command from the selected submission queue. The method further includes providing the command to command processing logic.

Abstract: Methods, systems, and computer readable media for intelligent fetching of storage device commands from submission queues are disclosed. On method is implemented in a data storage device including a controller and a memory. The method includes collecting submission queue command statistics; monitoring resource state of the data storage device. The method further includes using the submission queue command statistics and the resource state to select a submission queue from which a next data storage device command should be fetched. The method further includes fetching the command from the selected submission queue. The method further includes providing the command to command processing logic.

Abstract: A method and system are disclosed that monitor and control random cache read operations. Random cache read operation may occur until the expiration of a timer. Upon expiration of the timer, the current random cache read sequence is terminated and new received read commands will not use this sequence. A flash controller may either use a page read operation or initiate a new random cache read sequence.

Abstract: A method for write aggregation using a host memory buffer includes fetching write commands and data specified by the write commands from a host over a bus to a non-volatile memory system coupled to the host. Writing the data specified by the write commands from the non-volatile memory system over the bus to the host. The method further includes aggregating the data specified by the write commands in a host memory buffer maintained in memory of the host. The method further includes determining whether the data in the host memory buffer has aggregated to a threshold amount. The method further includes, in response to determining that the data has aggregated to the threshold amount, reading the data from the host memory buffer to the non-volatile memory system and writing the data to non-volatile memory in the non-volatile memory system.

Abstract: A data storage device includes a memory and a controller coupled to the memory. The controller is configured to select a submission queue from a set of submission queues of an access device based at least in part on availability of space in a completion queue of the access device.

Abstract: A data storage device includes a memory and a controller coupled to the memory. The controller includes an interface to enable the controller to be coupled to an access device that includes a direct memory access (DMA) engine. The controller is configured to instruct the access device to perform an access device DMA operation to transfer data from a first location of a memory of the access device to a second location of the memory of the access device.

Abstract: A storage device may utilize a host memory buffer for re-ordering commands in a submission queue. Out of order commands in a submission queue that uses host virtual buffers that are not the same size may be difficult to search. Accordingly, commands in a submission queue may be correctly ordered in a host memory buffer before being put into the host virtual buffers. When the commands are in order, the search operation for specific data is improved.

Abstract: Methods, systems, and computer readable media for aggregating completion entries in a nonvolatile storage device are disclosed. On method is implemented in a data storage device including a controller and a memory. The method includes receiving a request to post a completion entry that indicates an execution of a command by a data storage device and determining whether the completion entry is to be aggregated with one or more completion entries prior to being sent by the data storage device to a host device memory. The method further includes, in response to determining that the completion entry is to be aggregated, aggregating the completion entry with at least one other completion entry within an aggregation data store per predefined aggregation criteria and sending an aggregation of the completion entry and the at least one other completion entry to the host memory device in response to a trigger event.

Abstract: Methods, systems, and computer readable media for submission queue pointer management are disclosed. One method is implemented in a data storage device including a controller and a memory. The method includes fetching a plurality of commands from a submission queue. The method further includes parsing at least one of the commands. The method further includes, in response to successful parsing of at least one of the commands and prior to executing all of the commands, notifying a host to advance a head entry pointer for the submission queue by a number of entries corresponding to a number of the commands successfully parsed.

Abstract: A data storage device includes a non-volatile memory device coupled to a controller. The controller includes a first memory. The controller is configured to receive, from an access device, descriptor data indicating addresses and sizes of portions of a second memory of the access device and to select a portion from the portions. The controller is further configured to write first data to the first memory. The first data indicates an address and a size of the selected portion. The controller is also configured to send second data to the access device to be stored at the second memory. The second data indicates a first address and a second address. The first address corresponds to a first segment of a plurality of segments of a first portion of the portions that is distinct from the selected portion. The second address corresponds to a second segment of the plurality of segments.

Abstract: Methods, systems, and computer readable media for intelligent fetching of storage device commands from submission queues are disclosed. On method is implemented in a data storage device including a controller and a memory. The method includes collecting submission queue command statistics; monitoring resource state of the data storage device. The method further includes using the submission queue command statistics and the resource state to select a submission queue from which a next data storage device command should be fetched. The method further includes fetching the command from the selected submission queue. The method further includes providing the command to command processing logic.

Abstract: A system and method that allows out of order fetching of host non-volatile memory commands can improve and maximize the memory device performance. The memory device can examine the non-volatile memory command headers available in the non-volatile memory command queue to select one or more, non-volatile memory commands to be fetched, in an optimum order and executed according to currently available resources in the memory device. The memory device can optimize performance of the non-volatile memory commands by re-ordering the host commands fetched from the host memory.

Abstract: A storage controller system may include a host controller that queues host commands as data transfer commands in a plurality of queue channels. The storage controller system may also include a data storage controller that selects data transfer commands for execution. The data storage controller may select all data transfer commands associated with a host command when all of the data transfer commands are located at heads of the queue channels. Alternatively, the data storage controller may select for execution data transfer commands at heads of the queue channels when associated cache areas are available to receive data, regardless of whether all of the data transfer commands associated with a host command are at the heads. The host controller may then retrieve the data in the cache areas when all of the data to be sent to the host in response to the host command is being cached.

Abstract: A host interface for a storage module may include an out-of-band (OOB) detector that is configured to detect receipt of an OOB signal using a clock signal. The clock signal may be generated by a clock generator that is activated using a counter. When an OOB signal is received, the counter may activate the clock generator. When no OOB signal is being received, the counter may wait for a predetermined time period before deactivating the clock generator.

Abstract: A storage module and method for configuring command attributes are provided. In one embodiment, a storage module is provided comprising a controller having hardware function blocks and further comprising a memory storing associations between command codes and command attributes for the hardware function blocks. The storage module receives a command that includes a command code and determines if the command code is stored in the memory. If the command code is stored in the memory, the storage module configures the hardware function blocks using the command attributes associated with command code and processes the command with the configured hardware function blocks. The associations are configurable after the storage module has been manufactured. This allows new or different associations to be defined after the storage module has been manufactured.

Abstract: Methods, systems, and devices are provided that processes storage commands. Data may be read from a storage memory at a storage device based on a read command received at the storage device from a host. An error may be detected in the data read from the storage memory at the storage device. In response to the error, placeholder data may be transmitted from the storage device to the host without transmitting an indication that the read command failed or succeeded. Corrected data may be transmitted from the storage device to the host, where the host replaces the placeholder data with the corrected data.

Abstract: A storage controller system may include a host controller that queues host commands as data transfer commands in a plurality of queue channels. The storage controller system may also include a data storage controller that selects data transfer commands for execution. The data storage controller may select all data transfer commands associated with a host command when all of the data transfer commands are located at heads of the queue channels. Alternatively, the data storage controller may select for execution data transfer commands at heads of the queue channels when associated cache areas are available to receive data, regardless of whether all of the data transfer commands associated with a host command are at the heads. The host controller may then retrieve the data in the cache areas when all of the data to be sent to the host in response to the host command is being cached.

Abstract: A storage controller system may include a host controller that queues host commands as data transfer commands in a plurality of queue channels. The storage controller system may also include a data storage controller that selects data transfer commands for execution. The data storage controller may select all data transfer commands associated with a host command when all of the data transfer commands are located at heads of the queue channels. Alternatively, the data storage controller may select for execution data transfer commands at heads of the queue channels when associated cache areas are available to receive data, regardless of whether all of the data transfer commands associated with a host command are at the heads. The host controller may then retrieve the data in the cache areas when all of the data to be sent to the host in response to the host command is being cached.

Abstract: A storage system may include a queue included in a memory and a controller configured to store commands received from a host in the queue. The queue may have a linked-list configuration. In response to a triggering event, the controller may take a snapshot of the queue, creating a snapshot queue. The snapshot queue may have a linear configuration. Subsequent analysis or parsing of queued information may be performed on the linear snapshot queue instead of the linked-list queue. Modifications to the linear snapshot queue may be corresponding made to the linked-list queue.