Patents by Inventor Tang-Yuan CHEN

Tang-Yuan CHEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10217649
    Abstract: A semiconductor device package includes a substrate, a semiconductor device, and an underfill. The substrate includes a top surface defining a mounting area, and a barrier section on the top surface and adjacent to the mounting area. The semiconductor device is mounted on the mounting area of the substrate. The underfill is disposed between the semiconductor device and the mounting area and the barrier section of the substrate. A contact angle between a surface of the underfill and the barrier section is greater than or equal to about 90 degrees.
    Type: Grant
    Filed: June 9, 2017
    Date of Patent: February 26, 2019
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Jin-Yuan Lai, Tang-Yuan Chen, Ying-Xu Lu, Dao-Long Chen, Kwang-Lung Lin, Chih-Pin Hung, Tse-Chuan Chou, Ming-Hung Chen, Chi-Hung Pan
  • Publication number: 20180358238
    Abstract: The present disclosure relates to a semiconductor device package comprising a substrate, a semiconductor device, and a underfill. The substrate includes a top surface defining a mounting area, and a barrier section on the top surface and adjacent to the mounting area. The semiconductor device is mounted on the mounting area of the substrate. The underfill is disposed between the semiconductor device and the mounting area and the barrier section of the substrate. A contact angle between a surface of the underfill and the barrier section is greater than or equal to about 90 degrees.
    Type: Application
    Filed: June 9, 2017
    Publication date: December 13, 2018
    Inventors: Jin-Yuan LAI, Tang-Yuan CHEN, Ying-Xu LU, Dao-Long CHEN, Kwang-Lung LIN, Chih-Pin HUNG, Tse-Chuan CHOU, Ming-Hung CHEN, Chi-Hung PAN
  • Publication number: 20180358237
    Abstract: The present disclosure relates to a semiconductor device package including a substrate, a semiconductor device and an underfill. The substrate has a first surface and a second surface angled with respect to the first surface. The semiconductor device is mounted on the first surface of the substrate and has a first surface facing the first surface of the substrate and a second surface angled with respect to the first surface of the substrate. The underfill is disposed between the first surface of the semiconductor device and the first surface of the substrate. The second surface of the substrate is located in the substrate and external to a vertical projection of the semiconductor device on the first surface of the substrate.
    Type: Application
    Filed: June 9, 2017
    Publication date: December 13, 2018
    Inventors: Ying-Xu LU, Tang-Yuan CHEN, Jin-Yuan LAI, Tse-Chuan CHOU, Meng-Kai SHIH, Shin-Lih TARNG
  • Patent number: 9589871
    Abstract: The present disclosure relates to a semiconductor package structure and a method for manufacturing the same. The semiconductor package structure includes a leadframe and a semiconductor die. The leadframe includes a main portion and a protrusion portion. The semiconductor die is bonded to a first surface of the main portion. The protrusion portion protrudes from a second surface of the main portion. The position of the protrusion portion corresponds to the position of the semiconductor die.
    Type: Grant
    Filed: April 13, 2015
    Date of Patent: March 7, 2017
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Tang-Yuan Chen, Chin-Li Kao, Kuo-Hua Chen, Ming-Hung Chen, Dao-Long Chen
  • Patent number: 9478500
    Abstract: Described herein are interposer substrate designs for warpage control, semiconductor structures including said interposer substrates, and fabricating processes thereof. An interposer substrate defines a cavity and further includes a reinforcement structure, wherein the reinforcement structure is used to control warpage of the semiconductor package structure.
    Type: Grant
    Filed: February 17, 2015
    Date of Patent: October 25, 2016
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chia-Ching Chen, Chin-Li Kao, Hung-Jen Chang, Tang-Yuan Chen, Wei-Hong Lai
  • Publication number: 20160300782
    Abstract: The present disclosure relates to a semiconductor package structure and a method for manufacturing the same. The semiconductor package structure includes a leadframe and a semiconductor die. The leadframe includes a main portion and a protrusion portion. The semiconductor die is bonded to a first surface of the main portion. The protrusion portion protrudes from a second surface of the main portion. The position of the protrusion portion corresponds to the position of the semiconductor die.
    Type: Application
    Filed: April 13, 2015
    Publication date: October 13, 2016
    Inventors: Tang-Yuan CHEN, Chin-Li KAO, Kuo-Hua CHEN, Ming-Hung CHEN, Dao-Long CHEN
  • Publication number: 20160240481
    Abstract: Described herein are interposer substrate designs for warpage control, semiconductor structures including said interposer substrates, and fabricating processes thereof. An interposer substrate defines a cavity and further includes a reinforcement structure, wherein the reinforcement structure is used to control warpage of the semiconductor package structure.
    Type: Application
    Filed: February 17, 2015
    Publication date: August 18, 2016
    Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Chia-Ching CHEN, Chin-Li KAO, Hung-Jen CHANG, Tang-Yuan CHEN, Wei-Hong LAI