Patents by Inventor Tao Chang

Tao Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6647484
    Abstract: The present invention provides a register-indirect addressing mode using modulo arithmetic to transpose addresses for digital processing systems. The preferred systems and methods permit direct access of column data, which improves matrix computation significantly. The overhead of transpose mode is minimal because it can be implemented, if desired, by sharing hardware and/or software used in circular buffers. Transpose addressing mode also reduces program size and processor power consumed by reducing the sequence of instruction cycles.
    Type: Grant
    Filed: September 19, 2000
    Date of Patent: November 11, 2003
    Assignee: 3 DSP Corporation
    Inventors: Chongjun June Jiang, Kan Lu, Chung Tao-Chang
  • Patent number: 6485198
    Abstract: An optoelectronic transceiver that has integrated optical and electronic components, and can be passively aligned by a flip-chip method and a mechanical method is provided. The optoelectronic transceiver can be constructed by the key components of a circuit board, a silicon sub-mount, at least two IC chips formed on a silicon sub-mount, a microlens array, an optical fiber, and a receptacle for housing the silicon sub-mount, the at least two IC chips, the microlens array and the optical fiber connector in an aligned configuration. The at least two IC chips preferably include a laser diode, a laser diode driver, a photodetector and a photodetector amplifier. The mechanical alignment between a microlens array and a silicon sub-mount is performed by indentations provided in the surfaces of the two parts and the placement of spacer balls in the indentations.
    Type: Grant
    Filed: December 12, 2001
    Date of Patent: November 26, 2002
    Assignee: Industrial Technology Research Institute
    Inventors: Chung-Tao Chang, Bi-Chu Wu, Chien Chen, Chih-Hsiang Ko
  • Patent number: 6444561
    Abstract: A method for forming solder bumps for a flip-chip bonding process wherein the bumps have substantially the same height and structures formed by the method are described. In the method, a pre-processed semiconductor substrate that has a plurality of metal traces formed on a top surface is first provided. At least two solder non-wettable masking strips are then deposited on top of and perpendicular to the plurality of metal traces. The at least two solder non-wettable masking strips are deposited spaced-apart at a predetermined spacing sufficient for forming a bond pad therein-between on the plurality of metal traces. Finally, a solder material is deposited onto the bond pads forming solder bumps which are then reflown into solder balls.
    Type: Grant
    Filed: October 2, 2000
    Date of Patent: September 3, 2002
    Assignee: Industrial Technology Research Institute
    Inventors: Chia-Chung Wang, Chung-Tao Chang, Kuo-Chuan Chen
  • Patent number: 6433427
    Abstract: A wafer level package that incorporates dual stress buffer layers for achieving I/O pad redistribution and a method for forming the package are disclosed. In the package, a first stress buffer layer and a second stress buffer layer are sequentially deposited on top of an IC die by a method such as spin coating, laminating, screen printing or stencil printing of an elastic material which has a Young's modulus of less than 10 MPa. A suitable thickness for the first and the second stress buffer layer is between about 10 &mgr;m and about 70 &mgr;m. Metal traces are formed on top of the first and the second stress buffer layer for connecting a first plurality of I/O pads and a second plurality of I/O pads to achieve I/O redistribution.
    Type: Grant
    Filed: January 16, 2001
    Date of Patent: August 13, 2002
    Assignee: Industrial Technology Research Institute
    Inventors: Enboa Wu, Tsung-Yao Chu, Hsin-Chien Huang, Chung-Tao Chang
  • Publication number: 20020093107
    Abstract: A wafer level package that incorporates dual stress buffer layers for achieving I/O pad redistribution and a method for forming the package are disclosed. In the package, a first stress buffer layer and a second stress buffer layer are sequentially deposited on top of an IC die by a method such as spin coating, laminating, screen printing or stencil printing of an elastic material which has a Young's modulus of less than 10 MPa. A suitable thickness for the first and the second stress buffer layer is between about 10 &mgr;m and about 70 &mgr;m. Metal traces are formed on top of the first and the second stress buffer layer for connecting a first plurality of I/O pads and a second plurality of I/O pads to achieve I/O redistribution.
    Type: Application
    Filed: January 16, 2001
    Publication date: July 18, 2002
    Applicant: Industrial Technology Research Institute
    Inventors: Enboa Wu, Tsung-Yao Chu, Hsin-Chien Huang, Chung-Tao Chang
  • Patent number: 6316953
    Abstract: Automatic alignment methods for a membrane prober are disclosed. Alignment patterns are designed and manufactured on both a membrane prober and a wafer under test. The patterns are properly designed for acquiring a first set of measurement data that provide relative position information when the prober contacts the wafer. A second set of measurement data can be obtained by a controlled move between the prober and the wafer. The relative position including the translation offset and the rotation angle can be computed by the information derived from the two sets of measurement data. The second set of measurement data may also be acquired by having two alignment pattern pairs that are made to contact in a single touch. More accurate aligrnent can be achieved by using more pairs of alignment patterns.
    Type: Grant
    Filed: July 30, 1999
    Date of Patent: November 13, 2001
    Assignee: Industrial Technology Research Institute
    Inventors: Steven Jyh-Ren Yang, Jane Huei-Chen Chan, Chung-Tao Chang, Hsiu-Tsang Lee
  • Patent number: 6250646
    Abstract: A high pressure-high temperature gasket for high pressure-high temperature pipe is disclosed. The high pressure-high temperature gasket comprises a hollow annular member defining an interior tunnel. The interior tunnel is filled with a stuffing to enhance the axial resilience of the annular member such that the high pressure-high temperature gasket can seal the joint between two high pressure-high temperature pipes, and be reused so as to decrease the coat of using the gasket.
    Type: Grant
    Filed: October 8, 1999
    Date of Patent: June 26, 2001
    Inventor: Chye-Tao Chang
  • Patent number: 6218726
    Abstract: An IC die formed with built-in stress test pattern and a method for forming such pattern are described. The stress test pattern may be formed by first forming a thermal oxide insulation layer on a silicon substrate, then forming a first plurality of diagonally positioned linear metal traces of a first metal, then depositing an electrically insulating material layer on top of the first plurality of diagonally positioned metal traces, and forming a second plurality of L-shaped metal bars of a second metal positioned with the two sides of L parallel to the two sides of a corner region and overlapping the first plurality of metal traces with the electrically insulating material layer therein between. The double metal method for forming the stress test pattern can be easily incorporated into the fabrication process for an IC die without any additional deposition or photolithographic steps.
    Type: Grant
    Filed: July 8, 1999
    Date of Patent: April 17, 2001
    Assignee: Industrial Technology Research Institute
    Inventors: Chung-Tao Chang, Chia-Chung Wang, Hsin-Chien Huang
  • Patent number: 6049216
    Abstract: Automatic alignment methods for a membrane prober are disclosed. Alignment patterns are designed and manufactured on both a membrane prober and a wafer under test. The patterns are properly designed for acquiring a first set of measurement data that provide relative position information when the prober contacts the wafer. A second set of measurement data can be obtained by a controlled move between the prober and the wafer. The relative position including the translation offset and the rotation angle can be computed by the information derived from the two sets of measurement data. The second set of measurement data may also be acquired by having two alignment pattern pairs that are made to contact in a single touch. More accurate alignment can be achieved by using more pairs of alignment patterns.
    Type: Grant
    Filed: October 27, 1997
    Date of Patent: April 11, 2000
    Assignee: Industrial Technology Research Institute
    Inventors: Steven J. R. Yang, Jane Huei-Chen Chang, Chung-Tao Chang, Hsiu-Tsang Lee
  • Patent number: 5903168
    Abstract: A switchable I/O buffer for multi-chip modules comprising a conventional I/O buffer and a miniaturized I/O buffer. A path switch selects the conventional I/O buffer or the minaturized I/O buffer according to whether the I/O interconnection is for communication off the module or chip-to-chip communication within the module. The miniaturized I/O buffer comprises a single-ended I/O buffer without electrostatic discharge protection. Two layout structures are designed for the switchable I/O buffer. A first layout structure having its path switching control provided by either a cell-programmable method or a mask-programmable method can be used for a multi-chip module or a PWB single package. A second layout structure using a pad-programmable method to provide the path switching control is suitable for a multi-chip module with flip-chip attachment technology. Four different circuit implementations of the switchable I/O buffer are presented.
    Type: Grant
    Filed: March 21, 1997
    Date of Patent: May 11, 1999
    Assignee: Industrial Technology Research Institiute
    Inventors: Jyh-Ren Yang, Chung-Tao Chang, Ruey-Wen Chien
  • Patent number: 5699509
    Abstract: Errors in data stored in the memory of a computer are detected prior to use of the data. A protected data type is declared in writing a program in which errors in critical data must be detected before the data are used. The invention is preferably implemented on a personal computer system (10) or in a microcontroller for a device. When a protected data item is initialized, both the protected data item and its corresponding bit-inverted form are stored in memory. A constructor function is used to determine the bit-inverted form. Any time that the protected data item is subsequently accessed for use by an application program, either the stored protected data item or its corresponding bit-inverted form are inverted for comparison to the other stored data item. Any difference detected in this comparison indicates that a change has occurred in either or both of the protected data item and its corresponding bit-inverted form within memory.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: December 16, 1997
    Assignee: Abbott Laboratories
    Inventors: Scott P. Gary, David E. Pope, Tao Chang
  • Patent number: 5522798
    Abstract: A host controller (10) selectively predicts and controls drug concentrations for each of a plurality of channels delivered through multiple drug channels of a multi-channel drug delivery system. The host controller includes a controller (32) that is coupled to each drug channel of the multi-channel drug delivery system to receive actual drug delivery rate information. Delivery of each drug can be selectively separately controlled by a PK model (the same PK model for each channel or different PK models for different channels) to achieve either a desired setpoint for a blood plasma drug concentration or a setpoint for an effect compartment drug concentration. Control of the drug delivery by the PK model can be selectively interrupted during operation of the multi-channel drug delivery system, to switch to a manual mode in order to administer a bolus dose or a continuous infusion, and then, control of drug infusion using the PK model can be subsequently resumed.
    Type: Grant
    Filed: October 17, 1994
    Date of Patent: June 4, 1996
    Assignee: Abbott Laboratories
    Inventors: Noel L. Johnson, Jyh-yi T. Huang, Tao Chang
  • Patent number: 4466738
    Abstract: The disclosed heterodyne measurement apparatus utilizes a single coherent light source to simultaneously measure the location of a number of points on a surface. The coherent light is split into two parts by a Bragg Cell. One part, after being spatially split into a plurality of beams by a second Bragg Cell, fed to a plurality of reflectors on the surface, and recombined by the second Bragg Cell, is heterodyned with the second part. The heterodyned signal is fed to a photodetector and further processed to produce a signal representative to the distance to the points of interest on the surface.
    Type: Grant
    Filed: August 23, 1982
    Date of Patent: August 21, 1984
    Assignee: Lockheed Missiles & Space Co.
    Inventors: Cheng-Chung Huang, Tao Chang
  • Patent number: D469398
    Type: Grant
    Filed: January 9, 2002
    Date of Patent: January 28, 2003
    Assignee: Michelin Recherche et Technique, S.A.
    Inventors: Ronald H. Thompson, Stephen J. Lash, Scott M. Waters, Shih-Tao Chang
  • Patent number: D473184
    Type: Grant
    Filed: January 9, 2002
    Date of Patent: April 15, 2003
    Assignee: Michelin Recherche et Technique, S.A.
    Inventors: Ronald H. Thompson, Stephen J. Lash, Scott M. Waters, Shih-Tao Chang
  • Patent number: D489300
    Type: Grant
    Filed: December 2, 2002
    Date of Patent: May 4, 2004
    Assignee: Segway LLC
    Inventors: Shin-Tao Chang, Scott Waters
  • Patent number: D493127
    Type: Grant
    Filed: November 27, 2002
    Date of Patent: July 20, 2004
    Assignee: Segway LLC
    Inventors: Scott Waters, Shin-Tao Chang, Richard W. Arling, W. Patrick Kelly
  • Patent number: D493128
    Type: Grant
    Filed: November 27, 2002
    Date of Patent: July 20, 2004
    Assignee: Segway LLC
    Inventors: Scott Waters, Shin-Tao Chang, Ronald K. Reich, Richard W. Arling, Kevin Webber, Joseph A. Hoell, Jr., J. Douglas Field
  • Patent number: D493129
    Type: Grant
    Filed: November 27, 2002
    Date of Patent: July 20, 2004
    Assignee: Segway LLC
    Inventors: Scott Waters, Shin-Tao Chang
  • Patent number: D424197
    Type: Grant
    Filed: February 12, 1999
    Date of Patent: May 2, 2000
    Assignee: ThermoLase Corporation
    Inventors: Paul Sydlowski, Samuel L. Millen, Shih-Tao Chang