Patents by Inventor Tao Liu

Tao Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12133853
    Abstract: Described herein are compounds that activate pyruvate kinase, pharmaceutical compositions and methods of use thereof. These compounds are represented by Formula (I) wherein R1, R2, Ra, Rb, Rj, Rk, and Q are as defined herein.
    Type: Grant
    Filed: January 20, 2023
    Date of Patent: November 5, 2024
    Assignee: Agios Pharmaceuticals, Inc.
    Inventors: Giovanni Cianchetta, Tao Liu, Anil Kumar Padyana, Zhihua Sui, Zhenwei Cai, Dawei Cui, Jingjing Ji
  • Publication number: 20240358183
    Abstract: The invention provides a multi-purpose capsule coffee pot, including the upper body and a coffee bucket, the upper body is provided with a capsule cartridge, the side of the top of the capsule box is provided with an extraction valve assembly, the bottom of the capsule valve assembly with an upper needle, the bottom of the coffee capsule, the capsule cushion, the boiler assembly at the bottom of the upper body, the boiler assembly with a protective sleeve, the bottom of the protective sleeve with a support grid, the bottom of the supporting grille is provided with a sealed flat gasket. The invention provides a multi-purpose capsule coffee pot, the capsule box combined with the body, without the influence of coffee capacity and taste to reduce the volume, easy to carry, subvert the structure design of the traditional capsule coffee machine, can use coffee capsule.
    Type: Application
    Filed: July 10, 2024
    Publication date: October 31, 2024
    Inventors: Zhiguo Ying, Tao Liu, Chen Chen
  • Publication number: 20240353468
    Abstract: The present application discloses a device leakage current test method. The method includes: applying a gradually increasing first gate voltage within a range to a gate of the MOS transistor; applying a first drain voltage to a drain of the MOS transistor; reapplying a gradually increasing second gate voltage within a range to the gate of the MOS transistor; reapplying a second drain voltage to the drain of the MOS transistor; reapplying a gradually increasing third drain voltage in a range to the drain of the MOS transistor; detecting a variation of the drain current as the first leakage current; and reapplying a gradually increasing fourth drain voltage to the drain of the MOS transistor, with a step of 0.04 V and a variation range; and detecting a variation of the drain current as the second leakage current.
    Type: Application
    Filed: March 27, 2024
    Publication date: October 24, 2024
    Applicant: Shanghai Huali Integrated Circuit Corporation
    Inventors: Jiacheng Wen, Zhi Tian, Tao Liu
  • Publication number: 20240351397
    Abstract: A heat transfer system to alternatively and/or simultaneously provide heating and cooling in a mobile vehicle that includes an electrical power source requiring heating and/or cooling during charging and/or operation and that includes a cabin that requires heat input during low temperature ambient conditions.
    Type: Application
    Filed: April 18, 2024
    Publication date: October 24, 2024
    Applicant: HONEYWELL INTERNATIONAL INC.
    Inventors: Sanmao BAI, Curt VINCENT, Michael PETERSEN, Tao LIU, Nilesh PUROHIT
  • Publication number: 20240357791
    Abstract: A method making a SRAM includes forming a low voltage region, a medium voltage region, and a high voltage region in an active region; forming a low voltage PMOS active region and a low voltage NMOS active region in the low voltage region; forming an STI region between the low voltage PMOS active region and the low voltage NMOS active region; covering the SRAM structure with an oxide layer and an HTO film layer; forming a hard mask on the HTO film layer; performing photolithography to expose the hard mask on the active low voltage region; removing the exposed hard mask from the active low voltage region and removing the HTO film layer and the oxide layer below the hard mask.
    Type: Application
    Filed: March 28, 2024
    Publication date: October 24, 2024
    Applicant: Shanghai Huali Integrated Circuit Corporation
    Inventors: Yuan Yuan, Zhi Tian, Feng Ji, Tao Liu
  • Patent number: 12125704
    Abstract: A method for forming a pattern can include the following operations. A substrate is provided, on the surface of which a patterned photoresist layer is formed. Based on the photoresist layer, isolation sidewalls are formed, in which each isolation sidewall includes a first sidewall close to the photoresist layer and a second sidewall away from the photoresist layer. Core material layers are formed between two adjacent isolation sidewalls. The second sidewalls are removed to form the pattern composed of the first sidewalls and the core material layers.
    Type: Grant
    Filed: January 12, 2022
    Date of Patent: October 22, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Qiang Wan, Jun Xia, Kangshu Zhan, Penghui Xu, Tao Liu, Sen Li
  • Patent number: 12126251
    Abstract: Turn-off circuits. In one aspect, the turn-off circuit includes a transistor having a gate terminal, a source terminal and a drain terminal, a first pull-down circuit connected to the gate terminal, a second pull-down circuit connected to the gate terminal, and a third pull-down circuit connected to the gate terminal. In another aspect, the first, the second and the third pull-down circuits are arranged to cause a turn off of the transistor by changing a voltage at the gate terminal at a first rate of voltage with respect to time from an on-state voltage to a first intermediate voltage, and from the first intermediate voltage to a second intermediate voltage at a second rate of voltage with respect to time, and from the second intermediate voltage to an off-state voltage at a third rate of voltage with respect to time, wherein the first rate is higher than the second rate.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: October 22, 2024
    Assignee: Navitas Semiconductor Limited
    Inventors: Songming Zhou, Tao Liu, Ruixia Fei, Victor Sinow
  • Publication number: 20240343852
    Abstract: Embodiments of this disclosure provide a resin composition and an disclosure thereof. The resin composition includes a polyurethane acrylate and a curing monomer, the curing monomer includes a compound containing a free radical polymerizable group and/or a compound containing a moisture curable group, and a weight-average molecular weight of the curing monomer is greater than or equal to 300.
    Type: Application
    Filed: June 27, 2024
    Publication date: October 17, 2024
    Inventors: Min Chao CHUANG, Hailiang ZOU, Guiyun CHEN, Tao LIU
  • Patent number: 12114482
    Abstract: Embodiments provide a memory and a fabrication method thereof, and relates to the field of storage device technology to solve the technical problem of lower storage density of the memory. The fabrication method of the memory includes: providing a substrate including a central region and an edge region connected to each other, a first contact structure electrically connected to a wordline structure in the substrate being formed in the edge region; forming a second contact structure electrically connected to the first contact structure on the edge region; forming a capacitor structure electrically connected to the wordline structure on the central region; forming a third contact structure electrically connected to the second contact structure on the second contact structure; and forming a transistor structure electrically connected to the wordline structure on the capacitor structure and the third contact structure.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: October 8, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Kangshu Zhan, Jun Xia, Qiang Wan, Tao Liu, Sen Li
  • Publication number: 20240327291
    Abstract: The present invention discloses a multivalent manganese oxide filler, a preparation method therefor, and an application thereof. The preparation method comprises the following steps: step 1: adding a Eucalyptus robusta Smith leaf extract into a potassium permanganate solution for oxidation reaction, and stirring to finally form a suspension; step 2: sequentially filtering and drying the suspension in the step 1 to obtain a sintering precursor; and step 3: sintering the sintering precursor to obtain the multivalent manganese oxide filler. According to the present invention, through the combination of oxidation reaction and sintering reaction in the present invention, the multivalent manganese oxide filler containing manganese (II), manganese (III) and manganese (IV) is prepared, and the filler is loose and porous; in addition, the oxidation reaction and the sintering reaction are combined in the present invention, so that the process difficulty of preparing the multivalent manganese oxide is reduced.
    Type: Application
    Filed: April 2, 2024
    Publication date: October 3, 2024
    Inventors: YI CHEN, JINGYI DAI, ZHIHAO XIAN, SHUYUAN ZHAO, XIN ZHANG, HAO WU, LANXI LI, TAO LIU
  • Publication number: 20240315430
    Abstract: The present disclosure discloses a backpack supporting bar, including a first supporting sub-bar and a second supporting sub-bar connected to the first supporting sub-bar; end portions of the first supporting sub-bar and the second supporting sub-bar are movably connected to each other; and the backpack supporting bar has a first state where the entire backpack supporting bar extends for supporting, and a second state where adjacent supporting sub-bars are folded to each other. The backpack supporting bar has a simple and stable structure, can stably support a backpack, and is convenient to mount and remove. The present disclosure further provides a backpack including the backpack supporting bar.
    Type: Application
    Filed: June 3, 2024
    Publication date: September 26, 2024
    Inventor: Tao Liu
  • Publication number: 20240316541
    Abstract: The present application provides a metal modified ZSM-5 molecular sieve catalyst and a preparation method and an application thereof, and the preparation method includes the following steps: mixing a ZSM-5 molecular sieve, tetraethyl orthosilicate, trichloroacetic acid, and water for reaction, and filtering to obtain an intermediate; mixing the intermediate, a melamine solution and a metal salt solution, drying and roasting, and obtaining the metal modified ZSM-5 molecular sieve catalyst. The prepared catalyst has the advantages of good catalytic activity, selectivity and stability, simple preparation process and easiness for operation.
    Type: Application
    Filed: May 24, 2024
    Publication date: September 26, 2024
    Inventors: Penggang LV, Tao LIU, Zhishuang PAN, Xiaoliang HUANG, Hongchang DUAN, Yunfeng ZHENG, Jinjun CAI, Manyun WANG, Zhengguo TAN
  • Publication number: 20240320836
    Abstract: A method and system for positioning a target in a brain region are provided. The method includes: obtaining datasets of N persons at a first time point and a second time point after stroke; constructing a first lesion mapping functional network based on each resting-state functional magnetic resonance imaging image in a first stroke dataset; constructing an acute phase cognitive-lesion mapping functional network; constructing a chronic phase cognitive-lesion mapping functional network; comparing the acute phase cognitive-lesion mapping functional network with the chronic phase cognitive-lesion mapping functional network to obtain a key improvement network; calculating a whole-brain functional connectivity network with each voxel as a seed point, and performing spatial correlation calculation on the whole-brain functional connectivity network and the key improvement network to obtain a spatial correlation network; and determining a therapeutic target of the functional image to be positioned.
    Type: Application
    Filed: March 20, 2024
    Publication date: September 26, 2024
    Inventors: Zixiao LI, Tao LIU, Yijun ZHOU, Weili JIA, Xingxing CAO, Hao LIU, Yongjun WANG, Jing JING, Lijun ZUO
  • Publication number: 20240308990
    Abstract: Crystal forms of Entrectinib and preparation method therefor, such as crystal form A and crystal form B of Entrectinib are provided. Compared with existing crystal forms of Entrectinib, the crystal form has better solubility, chemical and crystal form stability, is free of static electricity, has good fluidity, is easy for large-scale preparation, and can be better suitable for preparing pharmaceutical formulations and large-scale production.
    Type: Application
    Filed: January 24, 2022
    Publication date: September 19, 2024
    Inventors: Chuanxin LENG, Huicheng WANG, Xi FANG, Chuanwen FAN, Dong LIN, Tao LIU, Zhaowei HUANG, Fang CHENG, Shuailong HUANG
  • Publication number: 20240304784
    Abstract: An electrochemical apparatus includes a negative electrode plate. The negative electrode plate includes a negative electrode current collector, a first coating, and a negative electrode active material layer. The first coating is disposed between the negative electrode current collector and the negative electrode active material layer. The first coating includes carbon nanotubes, a first binder, and a first dispersant, and a mass percentage of the carbon nanotubes in the first coating is 50% to 75%.
    Type: Application
    Filed: May 10, 2024
    Publication date: September 12, 2024
    Applicant: Ningde Amperex Technology Limited
    Inventors: Manman LIU, Tao LIU, Rui ZHU
  • Publication number: 20240301162
    Abstract: The present invention relates to a polybutylene terephthalate composition, comprising (A) 40 to 99.8% by weight of polybutylene terephthalate, (B) 0.2 to 10% by weight of at least one conductive filler selected from the group consisting of carbon nanotubes, carbon nanostructures, and a combination thereof, and (C) 0 to 50% by weight of glass fiber, each being based on the total weight of the poly butylene terephthalate composition, wherein the carbon nanostructures each comprise a plurality of carbon nanotubes which are branched, crosslinked, and/or sharing common walls with one another. The present invention also relates to an EMI shielding article produced from the polybutylene terephthalate composition.
    Type: Application
    Filed: April 27, 2022
    Publication date: September 12, 2024
    Inventors: Li Xia Wang, Zhen Ke Wei, Tao Liu, Li Rong He
  • Patent number: 12089392
    Abstract: An embodiment of the disclosure provides a method for manufacturing a semiconductor structure, including: providing a substrate, where the substrate has a peripheral region and an array region; stacking and forming an insulating layer and a mask layer with a mask pattern on the substrate; etching the insulating layer with the mask layer as a mask to form a contact hole penetrating the insulating layer at the array region; reserving the mask layer; in a direction perpendicular to a surface of the substrate, providing a thickness difference between the mask layer of the peripheral region and the mask layer of the array region; forming a first material layer; forming a second material layer; etching a part of the mask layer with the second material layer as the mask; and removing the remaining second material layer, the remaining mask layer and the first material layer on the remaining mask layer.
    Type: Grant
    Filed: December 2, 2021
    Date of Patent: September 10, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Jun Xia, Qiang Wan, Penghui Xu, Tao Liu, Sen Li, Kangshu Zhan
  • Patent number: 12082393
    Abstract: A method for manufacturing a memory and a memory is provided. The method for manufacturing a memory includes: providing a substrate; stacking an electrode support structure, a protective layer and a first mask layer in sequence on the substrate; patterning the first mask layer on an array region, and etching the protective layer, the electrode support structure and the substrate by using the patterned first mask layer as a mask, to form capacitor holes penetrating the protective layer and the electrode support structure and extending into the substrate; removing the first mask layer; and forming a first electrode layer on side walls and bottom walls of the capacitor holes, a top surface of the first electrode layer being flush with a top surface of the electrode support structure.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: September 3, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Qiang Wan, Jun Xia, Kangshu Zhan, Sen Li, Tao Liu, Penghui Xu
  • Patent number: 12082394
    Abstract: A method for manufacturing a memory includes: providing a substrate, capacitor contact pads being formed in the substrate; forming a laminated structure on the substrate, the laminated structure including a first laminated structure formed on the substrate and a second laminated structure formed on the first laminated structure; forming first through holes in the second laminated structure; forming a protective layer on side walls of the first through holes, the protective layer in the first through holes enclosing second through holes; and etching the first laminated structure along the second through holes to form third through holes, the third through holes exposing the capacitor contact pads.
    Type: Grant
    Filed: July 5, 2021
    Date of Patent: September 3, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Tao Liu, Jun Xia, Kangshu Zhan, Sen Li, Qiang Wan, Penghui Xu
  • Patent number: D1042949
    Type: Grant
    Filed: March 10, 2023
    Date of Patent: September 17, 2024
    Assignee: Lanto Electronic Limited
    Inventor: Tao Liu