Patents by Inventor Tao YI
Tao YI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240088650Abstract: In some aspects of the present disclosure, an electrostatic discharge (ESD) protection circuit is disclosed. In some aspects, the ESD protection circuit includes a first transistor coupled to a pad, a second transistor coupled between the first transistor and ground, a stack of transistors coupled to the first transistor, and an ESD clamp coupled between the stack of transistors and the ground.Type: ApplicationFiled: November 20, 2023Publication date: March 14, 2024Applicant: Taiwan Semiconductor Manufacturing Company Ltd.Inventors: Li-Wei Chu, Tao Yi Hung, Chia-Hui Chen, Wun-Jie Lin, Jam-Wem Lee
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Publication number: 20240065472Abstract: A fluid texturing device is provided for use with a beverage brewing apparatus. In one embodiment, the fluid texturing device can include a housing a housing extending between a first end and a second end. The fluid texturing device can also include a hollow driveshaft arranged within the housing and having an air path extending from the first end to the second end of the housing. The hollow driveshaft can include a coupling arranged therein and axially movable within the hollow driveshaft such that the coupling can variably block the air path to prevent a flow of air through the air path. The fluid texturing device can also include a whisk assembly removably coupled to the second end of the housing and including a whisk mated to the driveshaft such that the driveshaft can rotate the whisk.Type: ApplicationFiled: October 12, 2022Publication date: February 29, 2024Inventors: Pierce Barnard, Tao Yi
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Patent number: 11862968Abstract: In some aspects of the present disclosure, an electrostatic discharge (ESD) protection circuit is disclosed. In some aspects, the ESD protection circuit includes a first transistor coupled to a pad, a second transistor coupled between the first transistor and ground, a stack of transistors coupled to the first transistor, and an ESD clamp coupled between the stack of transistors and the ground.Type: GrantFiled: April 22, 2022Date of Patent: January 2, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Li-Wei Chu, Tao Yi Hung, Chia-Hui Chen, Wun-Jie Lin, Jam-Wem Lee
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Patent number: 11855076Abstract: An electrostatic discharge (ESD) protection apparatus and method for fabricating the same are disclosed herein. In some embodiments, the ESD protection apparatus, comprises: an internal circuit patterned in a device wafer and electrically coupled between a first node and a second node, an array of electrostatic discharge (ESD) circuits patterned in a carrier wafer, where the ESD circuits are electrically coupled between a first node and a second node and configured to protect the internal circuit from transient ESD events, and where the device wafer is bonded to the carrier wafer.Type: GrantFiled: January 15, 2021Date of Patent: December 26, 2023Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Tao-Yi Hung, Wun-Jie Lin, Jam-Wem Lee, Kuo-Ji Chen
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Publication number: 20230395534Abstract: An electrostatic discharge (ESD) protection apparatus and method for fabricating the same are disclosed herein. In some embodiments, the ESD protection apparatus comprises: an internal circuit formed in a first wafer; an array of electrostatic discharge (ESD) circuits formed in a second wafer, wherein the ESD circuits include a plurality of ESD protection devices each coupled to a corresponding switch and configured to protect the internal circuit from a transient ESD event; and a switch controller in the second wafer, wherein the switch controller is configured to control, based on a control signal from the first wafer, each of the plurality of ESD protection devices to be activated or deactivated by the corresponding switch, and wherein the first wafer is bonded to the second wafer.Type: ApplicationFiled: August 10, 2023Publication date: December 7, 2023Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Tao-Yi HUNG, Wun-Jie Lin, Jam-Wem Lee, Kuo-Ji Chen
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Patent number: 11817403Abstract: An electrostatic discharge (ESD) protection apparatus and method for fabricating the same are disclosed herein. In some embodiments, the ESD protection apparatus comprises: an internal circuit formed in a first wafer; an array of electrostatic discharge (ESD) circuits formed in a second wafer, wherein the ESD circuits include a plurality of ESD protection devices each coupled to a corresponding switch and configured to protect the internal circuit from a transient ESD event; and a switch controller in the second wafer, wherein the switch controller is configured to control, based on a control signal from the first wafer, each of the plurality of ESD protection devices to be activated or deactivated by the corresponding switch, and wherein the first wafer is bonded to the second wafer.Type: GrantFiled: March 11, 2021Date of Patent: November 14, 2023Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Tao-Yi Hung, Wun-Jie Lin, Jam-Wem Lee, Kuo-Ji Chen
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Patent number: 11803594Abstract: An information display method and an apparatus are described wherein a terminal obtains a first operation entered by a user. The terminal further obtains at least one key character based on the first operation. The terminal further determines that characteristic information associated with the key character is stored, and displays target information associated with the characteristic information. The target information is information that is in a set of information associated with the key character and that is associated with the characteristic information. The method can improve information display precision.Type: GrantFiled: October 15, 2018Date of Patent: October 31, 2023Assignee: Huawei Technologies Co., Ltd.Inventors: Wenshuai Yin, Lin Cao, Jinxian Wu, Tao Yi, Yuhua Wang
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Publication number: 20230344221Abstract: In some aspects of the present disclosure, an electrostatic discharge (ESD) protection circuit is disclosed. In some aspects, the ESD protection circuit includes a first transistor coupled to a pad, a second transistor coupled between the first transistor and ground, a stack of transistors coupled to the first transistor, and an ESD clamp coupled between the stack of transistors and the ground.Type: ApplicationFiled: April 22, 2022Publication date: October 26, 2023Applicant: Taiwan Semiconductor Manufacturing Company Ltd.Inventors: Li-Wei Chu, Tao Yi Hung, Chia-Hui Chen, Wun-Jie Lin, Jam-Wem Lee
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Patent number: 11612865Abstract: Various exemplary agitators for a carbonation system, systems including an agitator for a carbonation system, and methods including an agitator for a carbonation system are provided. In general, an agitator is configured to rotate in a chamber to mix together a gas, such as carbon dioxide, and a liquid, such as water, to form a carbonated fluid. The agitator includes a plurality of paddles configured to encourage the mixing of the gas and the fluid by agitating the gas and the liquid during the agitator's rotation. Each of the arms has an angled outer tip to facilitate the efficient mixing. The agitator includes a hollow shaft through which the gas is configured to flow during the agitator's rotation. The agitator can be part of a carbonation system configured to dispense the carbonated fluid as a beverage.Type: GrantFiled: June 17, 2022Date of Patent: March 28, 2023Assignee: SharkNinja Operating LLCInventors: Noa Reisner-Stehman, Tiehe Yang, Tao Yi, Zihuang Lin, Miles William Noel Hember
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Patent number: 11571145Abstract: A heart rate detection method and an apparatus, where the method is applied to an electronic device, and the electronic device includes a heart rate sensor. The method includes detecting, by the electronic device, a current motion status of a user carrying the electronic device, determining, based on a prestored correspondence between a motion status, a startup period, and a sampling rate, a startup period and a sampling rate corresponding to the current motion status, where the startup period is a period in which the heart rate sensor is started to detect a heart rate of the user carrying the electronic device, and the sampling rate is a sampling rate of collecting heart rate data by the heart rate sensor, and starting the heart rate sensor at regular intervals based on the startup period to collect heart rate data at the sampling rate.Type: GrantFiled: May 22, 2020Date of Patent: February 7, 2023Assignee: HUAWEI TECHNOLGOIES CO., LTD.Inventors: Huaiyong Wang, Tao Yi, Xiangyang Wang, Guangze Zhu, Kui Zhang
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Patent number: 11569223Abstract: A method for fabricating an integrated circuit is provided. The method includes etching a first recess in a semiconductor structure; forming a first doped epitaxial feature in the first recess; and forming a second doped epitaxial feature over the first doped epitaxial feature, wherein the second doped epitaxial feature has a conductive type opposite to a conductive type of the first doped epitaxial feature.Type: GrantFiled: October 30, 2020Date of Patent: January 31, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Tao-Yi Hung, Wun-Jie Lin, Jam-Wem Lee, Kuo-Ji Chen, Chia-En Huang
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Publication number: 20230009740Abstract: An ESD clamp circuit has an ESD detection circuit connected between a first terminal and a second terminal, with a first output node and a second output node. The ESD detection circuit is configured to output respective first and second control signals at the first and second output nodes in response to an ESD event. A discharge circuit includes a p-type transistor having a source, a drain and a gate, with the gate connected to the first output node. An n-type transistor has a source, a drain and a gate, with the gate connected to the second output node. The drain is connected to the drain of the p-type transistor. The discharge circuit is configured to establish a first ESD discharge path from the first terminal, through the p-type transistor and the n-type transistor, to the second terminal, and to further establish a second ESD discharge path in parallel with the first ESD discharge path. The second ESD discharge path includes a parasitic silicon controlled rectifier (SCR).Type: ApplicationFiled: January 18, 2022Publication date: January 12, 2023Inventors: Tao Yi Hung, Wun-Jie Lin, Jam-Wen Lee, Kuo-Ji Chen
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Publication number: 20220384421Abstract: A semiconductor device is provided. The semiconductor device comprises a detection circuit electrically coupled between a first node and a second node. The semiconductor device comprises a discharge circuit electrically coupled between the first node and a third node. The semiconductor device comprises a biasing circuit electrically coupled between the second node and the third node. The discharge circuit and the biasing circuit are configured to electrically conduct the first node and the second node in response to receiving a first signal from the detection circuit through a fourth node. A first voltage difference exists between the third node and the fourth node.Type: ApplicationFiled: May 28, 2021Publication date: December 1, 2022Inventors: TAO YI HUNG, LI-WEI CHU, WUN-JIE LIN, JAM-WEM LEE, KUO-JI CHEN
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Publication number: 20220293534Abstract: An electrostatic discharge (ESD) protection apparatus and method for fabricating the same are disclosed herein. In some embodiments, the ESD protection apparatus comprises: an internal circuit formed in a first wafer; an array of electrostatic discharge (ESD) circuits formed in a second wafer, wherein the ESD circuits include a plurality of ESD protection devices each coupled to a corresponding switch and configured to protect the internal circuit from a transient ESD event; and a switch controller in the second wafer, wherein the switch controller is configured to control, based on a control signal from the first wafer, each of the plurality of ESD protection devices to be activated or deactivated by the corresponding switch, and wherein the first wafer is bonded to the second wafer.Type: ApplicationFiled: March 11, 2021Publication date: September 15, 2022Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Tao-Yi Hung, Wun-Jie Lin, Jam-Wem Lee, Kuo-Ji Chen
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Publication number: 20220271026Abstract: An ESD protection device includes a PN diode formed in a semiconductor body. The PN diode has a first contact coupled to a metal structure on a front side of the semiconductor body and a second contact coupled to a metal structure on a back side of the semiconductor body. The metal coupled to the first contact is spaced apart from the metal coupled to the second contact by a thickness of the semiconductor body. This spacing greatly reduces the capacitance associated with the metal structures, which can substantially reduce the overall capacitance added to an I/O channel by the ESD protection device and thereby improve the performance of a high-speed circuit that uses the I/O channel.Type: ApplicationFiled: February 22, 2021Publication date: August 25, 2022Inventors: Tao Yi Hung, Yu-Xuan Huang, Kuo-Ji Chen
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Publication number: 20220231010Abstract: An electrostatic discharge (ESD) protection apparatus and method for fabricating the same are disclosed herein. In some embodiments, the ESD protection apparatus, comprises: an internal circuit patterned in a device wafer and electrically coupled between a first node and a second node, an array of electrostatic discharge (ESD) circuits patterned in a carrier wafer, where the ESD circuits are electrically coupled between a first node and a second node and configured to protect the internal circuit from transient ESD events, and where the device wafer is bonded to the carrier wafer.Type: ApplicationFiled: January 15, 2021Publication date: July 21, 2022Inventors: Tao-Yi HUNG, Wun-Jie LIN, Jam-Wem LEE, Kuo-Ji CHEN
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Publication number: 20220139903Abstract: A method for fabricating an integrated circuit is provided. The method includes etching a first recess in a semiconductor structure; forming a first doped epitaxial feature in the first recess; and forming a second doped epitaxial feature over the first doped epitaxial feature, wherein the second doped epitaxial feature has a conductive type opposite to a conductive type of the first doped epitaxial feature.Type: ApplicationFiled: October 30, 2020Publication date: May 5, 2022Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Tao-Yi HUNG, Wun-Jie LIN, Jam-Wem LEE, Kuo-Ji CHEN, Chia-En HUANG
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Patent number: 11310646Abstract: Various embodiments provide a Bluetooth-based playback method and an electronic device. In those embodiments, a first processor copies a coding algorithm, a sound effect postprocessing program, and a Bluetooth audio transmission protocol to a second processor, transmits first to-be-decoded data to the second processor, and enters a sleep state. The second processor receives the first to-be-decoded data, performs decoding, sound effect post-processing, and coding on the first to-be-decoded data to obtain first coded data, and sends the first coded data to a Bluetooth module using a third processor. The Bluetooth module converts the first coded data into a first wireless signal, and sends the first wireless signal to an external playback device to implement audio playback. The first processor is communicatively connected to the second processor, the second processor is communicatively connected to the third processor, and the third processor is communicatively connected to the Bluetooth module.Type: GrantFiled: April 17, 2018Date of Patent: April 19, 2022Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Tao Yi, Chang Hu
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Publication number: 20220058225Abstract: An information display method and an apparatus are described wherein a terminal obtains a first operation entered by a user. The terminal further obtains at least one key character based on the first operation. The terminal further determines that characteristic information associated with the key character is stored, and displays target information associated with the characteristic information. The target information is information that is in a set of information associated with the key character and that is associated with the characteristic information. The method can improve information display precision.Type: ApplicationFiled: October 15, 2018Publication date: February 24, 2022Inventors: Wenshuai YIN, Lin CAO, Jinxian WU, Tao YI, Yuhua WANG
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Publication number: 20210366846Abstract: A semiconductor device includes a device wafer having a first side and a second side. The first and second sides are opposite to each other. The semiconductor device includes a plurality of first interconnect structures disposed on the first side of the device wafer. The semiconductor device includes a plurality of second interconnect structures disposed on the second side of the device wafer. The plurality of interconnect structures comprise a first power rail and a second power rail. The semiconductor device includes a carrier wafer disposed over the plurality of first interconnect structures. The semiconductor device includes an electrostatic discharge (ESD) protection circuit formed over a side of the carrier wafer. The ESD protection circuit is operatively coupled to the first and second power rails.Type: ApplicationFiled: March 26, 2021Publication date: November 25, 2021Applicant: Taiwan Semiconductor Manufacturing Company Ltd.Inventors: Tao Yi Hung, Jam-Wem Lee, Kuo-Ji Chen, Wun-Jie Lin