Patents by Inventor Tarng-Shiang Hu

Tarng-Shiang Hu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120243207
    Abstract: A display includes a flexible display panel having a back face, two backlight modules disposed on the back face of the display panel and each including a contact end, and an outer casing having two casing panels respectively connected to and supporting the backlight modules oppositely of the display panel. The casing panels are pivotal relative to each other to move the backlight modules and the display panel between collapsed and non-collapsed positions. In the collapsed position, the display panel is folded, and the backlight modules are parallelly spaced apart. In the non-collapsed position, the display panel is laid flat, the backlight modules coplanarly cover the back face of the display panel, and the contact ends of the backlight modules abut against each other.
    Type: Application
    Filed: December 22, 2011
    Publication date: September 27, 2012
    Applicant: WISTRON CORPORATION
    Inventors: Yi-Kai Wang, Tsung-Hua Yang, Tarng-Shiang Hu, Chih-Hao Chang, Yu-Jung Peng
  • Patent number: 8026186
    Abstract: The present invention provides a microwave annealing method for a plastic substrate. The method comprises pulsed microwave annealing to an organic photo-voltaic device to avoid warpage and degradation of the plastic substrate. Utilizing pulsed microwave annealing method can improve the wettability of the organic layer on the plastic substrate verified by contact angle measurement, and achieving the organic solar cell fabricated with higher power conversion efficiency.
    Type: Grant
    Filed: October 6, 2010
    Date of Patent: September 27, 2011
    Assignee: National Tsing Hua University
    Inventors: Sheng-Fu Horng, Jen-Chun Wang, Tse-Pan Yang, Ming-Kun Lee, Tarng-Shiang Hu, Hsin-Fei Meng
  • Patent number: 8001491
    Abstract: A method of fabricating an organic thin film transistor is provided. The method includes forming a source, a drain and a gate on a substrate and forming a dielectric layer to isolate the gate from the source and isolate the gate from the drain. An organic active material layer is formed on the substrate to fill a channel region between the source and the drain and cover the source and the drain. A barrier material layer is formed on the organic active material layer. Thereafter, the barrier material layer and the organic active material layer are patterned to form a barrier layer and an organic active layer and expose the source and the drain.
    Type: Grant
    Filed: December 25, 2008
    Date of Patent: August 16, 2011
    Assignee: Industrial Technology Research Institute
    Inventors: Chi-Jen Kao, Yu-Rung Peng, Tsung-Hua Yang, Yi-Kai Wang, Tarng-Shiang Hu
  • Publication number: 20110151646
    Abstract: The present invention provides a microwave annealing method for a plastic substrate. The method comprises pulsed microwave annealing to an organic photo-voltaic device to avoid warpage and degradation of the plastic substrate. Utilizing pulsed microwave annealing method can improve the wettability of the organic layer on the plastic substrate verified by contact angle measurement, and achieving the organic solar cell fabricated with higher power conversion efficiency.
    Type: Application
    Filed: October 6, 2010
    Publication date: June 23, 2011
    Inventors: Sheng-Fu Horng, Jen-Chun Wang, Tse-Pan Yang, Ming-Kun Lee, Tarng-Shiang Hu, Hsin-Fei Meno
  • Publication number: 20110115034
    Abstract: A transistor including a substrate, a gate, a semiconductor layer, a stacked insulating layer and a source and a drain is provided. The gate is disposed on the substrate. The semiconductor layer is disposed on the substrate, and a first type carrier is the main carrier in the semiconductor layer. The stacked insulating layer is disposed between the semiconductor layer and the gate, and includes a first insulating layer and a second insulating layer. The first insulating layer contains a first group withdrawing the first type carrier, the second insulating layer contains a second group withdrawing a second type carrier, and the first insulating layer is disposed between the semiconductor layer and the second insulating layer. The source and the drain are disposed on the substrate and at two sides of the semiconductor layer.
    Type: Application
    Filed: March 26, 2010
    Publication date: May 19, 2011
    Applicant: Industrial Technology Research Institute
    Inventors: Po-Yuan Lo, Yu-Rung Peng, Tarng-Shiang Hu, Yi-Jen Chan
  • Patent number: 7939425
    Abstract: A method for fabricating a device with a flexible substrate includes providing a rigid substrate at first. Next, an interfacing layer can be formed on the rigid substrate, and then a flexible substrate is directly formed on the interfacing layer. The flexible substrate fully contacts the interfacing layer. A device structure is then formed on the flexible substrate.
    Type: Grant
    Filed: July 2, 2009
    Date of Patent: May 10, 2011
    Assignee: Industrial Technology Research Institute
    Inventors: Tarng-Shiang Hu, Jing-Yi Yan, Jia-Chong Ho, Cheng-Chung Lee
  • Patent number: 7872263
    Abstract: A method of TFT (Thin Film Transistor) manufacturing and a substrate structure are provided. The structure includes a substrate and a self-alignment mask. A self-alignment mask on a substrate is first manufactured and then the self-alignment mask may synchronously extend with the substrate during the thermal process. When an exposure light source is provided on the side without a TFT formed, the self-alignment mask can overcome the problem that when a plastic substrate extends, the positions of the source and drain to be formed on the plastic substrate are incorrect, which has a great effect on the accuracy of alignment. As the result, the positions of the source and drain can be defined accurately.
    Type: Grant
    Filed: July 24, 2006
    Date of Patent: January 18, 2011
    Assignee: Industrial Technology Research Institute
    Inventors: Liang-Ying Huang, Yi-Kai Wang, Tarng-Shiang Hu, Jia-Chong Ho
  • Publication number: 20110001221
    Abstract: A dielectric layer is provided. The dielectric layer includes a photo-sensitive polymer or a non-photo-sensitive polymer and an amorphous metal oxide disposed in the photo-sensitive polymer or a non-photo-sensitive polymer.
    Type: Application
    Filed: September 16, 2010
    Publication date: January 6, 2011
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Wei-Ling Lin, Pang LIN, Tarng-Shiang Hu, Liang-Xiang Chen
  • Patent number: 7851800
    Abstract: A TFT and an OLED device are provided. The TFT includes a substrate, a gate, a gate insulator, a source/drain layer, an isolated layer, and a channel layer. The gate is disposed on the substrate. The gate insulator is disposed on the substrate and covers the gate. The source/drain layer is disposed on the gate insulator, and exposes a portion of the gate insulator above the gate. The isolated layer is disposed on the source/drain layer and has an opening to expose a portion of the gate insulator and a portion of the source/drain layer above the gate. The channel layer is disposed in the opening of the isolated layer. Further, the channel layer is exposed by the opening and is electrically connected to the source/drain layer. On the other hand, the OLED device mainly includes a driving circuit and an organic electro-luminescent unit.
    Type: Grant
    Filed: December 30, 2008
    Date of Patent: December 14, 2010
    Assignee: Industrial Technology Research Institute
    Inventors: Tarng-Shiang Hu, Yi-Kai Wang, Jing-Yi Yan, Tsung-Hsien Lin, Jia-Chong Ho
  • Patent number: 7842946
    Abstract: Electronic devices with hybrid high-k dielectric and fabrication methods thereof. The electronic device includes a substrate. A first electrode is disposed on the substrate. Hybrid high-k multi-layers comprising a first dielectric layer and a second dielectric layer are disposed on the substrate, wherein the first dielectric layer and the second dielectric layer are solvable and substantially without interface therebetween. A second electrode is formed on the hybrid multi-layers.
    Type: Grant
    Filed: September 4, 2007
    Date of Patent: November 30, 2010
    Assignee: Industrial Technology Research Institute
    Inventors: Wei-Ling Lin, Jiing-Fa Wen, Wen-Hsi Lee, Tarng-Shiang Hu, Jiun-Jie Wang, Cheng-Chung Lee
  • Patent number: 7834357
    Abstract: A structure of a thin film transistor (TFT) is provided. A substrate has a first surface and a second surface opposite to each other, in which the first surface has a patterned mask layer. A patterned first electrode layer is disposed on the second surface of the substrate and has a gate portion and a capacitor electrode portion. A patterned second electrode layer is disposed on the second surface of the substrate and has a source and a drain, in which the patterned second electrode layer is self-aligned with the patterned first electrode layer by exposing the first surface of the substrate with the patterned mask layer as a mask. An insulating layer is disposed between the patterned first electrode layer and the patterned second electrode layer.
    Type: Grant
    Filed: October 11, 2007
    Date of Patent: November 16, 2010
    Assignee: Industrial Technology Research Institute
    Inventors: Yi-Kai Wang, Liang-Ying Huang, Tarng-Shiang Hu, Yu-Yuan Shen
  • Patent number: 7829398
    Abstract: A method for making a thin film transistor (TFT) is provided. A mask is first formed on the backside of a substrate, and is used to fabricate a gate, source, and drain of the transistor by backside exposure, such that the source and drain can be self-aligned with the gate pattern. In this way, an alignment shift due to expansion or contraction after performing a high temperature process on an insulating layer can be avoided. Further, since the backside mask previously formed on the substrate can be shifted with the expansion or contraction of the substrate, the process is simplified. Moreover, the source/drain can be accurately aligned with the gate, so that parasitic capacitance can be reduced and flickering of the panel can be avoided.
    Type: Grant
    Filed: October 11, 2007
    Date of Patent: November 9, 2010
    Assignee: Industrial Technology Research Institute
    Inventors: Yi-Kai Wang, Liang-Ying Huang, Tarng-Shiang Hu, Yu-Yuan Shen
  • Patent number: 7829137
    Abstract: A composition for forming a dielectric layer includes a liquid organometallic compound serving as a precursor with high dielectric constant, a photo-sensitive polymer or a non-photo-sensitive polymer and a solvent, wherein the liquid organometallic compound includes metal alkoxide, and the metal of the metal alkoxide includes Al Ti, Zr, Ta, Si, Ba, Ge and Hf. The dielectric layer formed by the composition includes the photo-sensitive polymer or the non-photo-sensitive polymer and an amorphous metal oxide formed therein.
    Type: Grant
    Filed: March 21, 2006
    Date of Patent: November 9, 2010
    Assignee: Industrial Technology Research Institute
    Inventors: Wei-Ling Lin, Pang Lin, Tarng-Shiang Hu, Liang-Xiang Chen
  • Patent number: 7820653
    Abstract: A photosensing soluble organic semiconductor material is disclosed, which includes a Diels-Alder adduct which is a polycyclic aromatic compound with a dienophile. The polycyclic aromatic compound is pentacene. And the dienophile is represented by the formula of O?S?N—R1, wherein R1 is SO2R2, SO3R2, SO2?, or SO3?; and wherein R2 is selected from the group consisting of alkyl, alkoxy, acyl, aryl, aralkyl, chloroalkyl, fluoroalkyl, and substituted aryl with 1-12 carbon atoms.
    Type: Grant
    Filed: October 26, 2006
    Date of Patent: October 26, 2010
    Assignee: Industrial Technology Research Institute
    Inventors: Tarng-Shiang Hu, Hsiang-Yuan Cheng, Jia-Chong Ho, Tzu-Wei Lee, Ming-Chou Chen, Jen-Shyang Ni
  • Publication number: 20100164837
    Abstract: An electronic device and a display panel thereof are provided. The electronic device includes a first display panel and a casing. The first display panel has a first displaying part and a second displaying part. The first display panel includes a first bending mechanism which is disposed between the first displaying part and the second displaying part to bend or spread the first display panel. The casing has a first surface and a second surface opposite to the first surface. The casing includes a rail mechanism which is disposed on the second surface. The second displaying part is slid on the rail mechanism to shift the first display panel relatively to the casing.
    Type: Application
    Filed: March 5, 2009
    Publication date: July 1, 2010
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chi-Jen Kao, Yi-Kai Wang, Yu-Rung Peng, Tsung-Hua Yang, Tarng-Shiang Hu
  • Patent number: 7741163
    Abstract: A method of fabricating a thin film transistor is provided. A gate is formed on a substrate. A gate insulator is formed on the substrate to cover the gate. A source/drain layer is formed on the gate insulator, and a portion of the gate insulator above the gate is exposed by the source/drain layer. An isolated layer is formed on the source/drain layer and has an opening to expose a portion of the gate insulator and a portion of the source/drain layer above the gate. A channel layer is formed in the opening of the isolated layer to be electrically connected to the source/drain layer, and the channel layer is exposed by the opening.
    Type: Grant
    Filed: September 19, 2006
    Date of Patent: June 22, 2010
    Assignee: Industrial Technology Research Institute
    Inventors: Tarng-Shiang Hu, Yi-Kai Wang, Jing-Yi Yan, Tsung-Hsien Lin, Jia-Chong Ho
  • Publication number: 20100096620
    Abstract: A method of fabricating an organic thin film transistor is provided. The method includes forming a source, a drain and a gate on a substrate and forming a dielectric layer to isolate the gate from the source and isolate the gate from the drain. An organic active material layer is formed on the substrate to fill a channel region between the source and the drain and cover the source and the drain. A barrier material layer is formed on the organic active material layer. Thereafter, the barrier material layer and the organic active material layer are patterned to form a barrier layer and an organic active layer and expose the source and the drain.
    Type: Application
    Filed: December 25, 2008
    Publication date: April 22, 2010
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chi-Jen Kao, Yu-Rung Peng, Tsung-Hua Yang, Yi-Kai Wang, Tarng-Shiang Hu
  • Patent number: 7638374
    Abstract: A method of fabricating a vertical thin film transistor (vertical TFT) is disclosed, wherein a shadow mask is used to fabricate the TFT device in vertical structure. First, a metal layer is formed, which serves as ribs and a gate layer. Next, a shadow mask is disposed on the gate layer. Afterwards, the shadow mask is used as a mask to form a source layer, an organic semiconductor layer and a drain layer. Thus, the process is simplified. Since no photolithography process is required, and therefore damage of the organic semiconductor layer is avoided and a vertical TFT with desired electrical characteristics may be obtained.
    Type: Grant
    Filed: August 6, 2009
    Date of Patent: December 29, 2009
    Assignee: Industrial Technology Research Institute
    Inventors: Yi-Kai Wang, Tsung-Hsien Lin, Tarng-Shiang Hu, Yu-Yuan Shen
  • Patent number: 7635608
    Abstract: A fabricating method of organic electronic device is provided. The method comprises: providing a flexible substrate; fabricating a plurality of organic elements on the flexible substrate; fabricating a patterned spacing layer on the flexible substrate; and arranging a cover substrate on the patterned spacing layer, and sealing the edges of the flexible substrate and the cover substrate with a sealant, wherein the patterned spacing layer is used to maintain a space between the flexible substrate and the cover substrate.
    Type: Grant
    Filed: October 30, 2006
    Date of Patent: December 22, 2009
    Assignee: Industrial Technology Research Institute
    Inventors: Tsung-Hsien Lin, Jia-Chong Ho, Tarng-Shiang Hu, Cheng-Chung Lee
  • Patent number: 7632705
    Abstract: A method of high precision printing for manufacturing organic thin film transistor, comprising the following steps of: forming a gate on a substrate; forming an insulator layer on the substrate; forming a conducting wire electrode film on the insulator layer; forming a organic interlayer; forming a organic semiconductor layer on the organic interlayer; forming a polymer layer for channel length on the organic semiconductor layer; forming a organic electrode film; and forming a protective layer. Moreover, a means for forming layers of above mentioned method is a high precision printing selected from the consisting of Inkject Printing, Screen Printing, Blade Coating, Roller Coating, Nanoimprinting, Micro Contact Printing, Flexographic printing, Table coating and Spin Coating, etc.
    Type: Grant
    Filed: May 4, 2005
    Date of Patent: December 15, 2009
    Assignee: Industrial Technology Research Institute
    Inventors: Jia-Chong Ho, Liang-Ying Huang, Tarng-Shiang Hu, Cheng-Chung Lee