Patents by Inventor Tarng-Shiang Hu
Tarng-Shiang Hu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20090298241Abstract: A method of fabricating a vertical thin film transistor (vertical TFT) is disclosed, wherein a shadow mask is used to fabricate the TFT device in vertical structure. First, a metal layer is formed, which serves as ribs and a gate layer. Next, a shadow mask is disposed on the gate layer. Afterwards, the shadow mask is used as a mask to form a source layer, an organic semiconductor layer and a drain layer. Thus, the process is simplified. Since no photolithography process is required, and therefore damage of the organic semiconductor layer is avoided and a vertical TFT with desired electrical characteristics may be obtained.Type: ApplicationFiled: August 6, 2009Publication date: December 3, 2009Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Yi-Kai Wang, Tsung-Hsien Lin, Tarng-Shiang Hu, Yu-Yuan Shen
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Patent number: 7588971Abstract: A method of fabricating a vertical thin film transistor (vertical TFT) is disclosed, wherein a shadow mask is used to fabricate the TFT device in vertical structure. First, a metal layer is formed, which serves as ribs and a gate layer. Next, a shadow mask is disposed on the gate layer. Afterwards, the shadow mask is used as a mask to form a source layer, an organic semiconductor layer and a drain layer. Thus, the process is simplified. Since no photolithography process is required, and therefore damage of the organic semiconductor layer is avoided and a vertical TFT with desired electrical characteristics may be obtained.Type: GrantFiled: July 17, 2007Date of Patent: September 15, 2009Assignee: Industrial Technology Research InstituteInventors: Yi-Kai Wang, Tsung-Hsien Lin, Tarng-Shiang Hu, Yu-Yuan Shen
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Patent number: 7575983Abstract: A method for fabricating a device with flexible substrate includes providing a rigid substrate. Then, a flexible substrate layer is directly formed on the rigid substrate, wherein the flexible substrate layer fully contacts the rigid substrate and a contact interface is formed. A device structure is formed on the flexible substrate layer. Alternatively, an interfacing layer can be formed on the rigid substrate and then the flexible substrate layer is directly formed on the interfacing layer. Thus, the flexible substrate layer can be stripped from the rigid substrate under a condition substantially without stress.Type: GrantFiled: October 19, 2005Date of Patent: August 18, 2009Assignee: Industrial Technology Research InstituteInventors: Tarng-Shiang Hu, Jing-Yi Yan, Jia-Chong Ho, Cheng-Chung Lee
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Publication number: 20090117686Abstract: A method of fabricating an organic semiconductor device includes following steps. A gate conductive layer is formed on a substrate, and then a gate dielectric layer is formed. Next, patterned metal layers are formed on the gate dielectric layer beside the gate conductive layer. An electrode modified layer is then formed on the surface and the sidewall of each patterned metal layer, and the patterned metal layers and the electrode modified layers formed thereon serve as a source and a drain. Thereafter, an organic semiconductor layer is formed on the source and the drain and on a portion of the gate dielectric layer exposed between the source and the drain to be an active layer.Type: ApplicationFiled: January 8, 2009Publication date: May 7, 2009Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Liang-Ying Huang, Tsung-Hsien Lin, Hsiang-Yuan Cheng, Tarng-Shiang Hu
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Publication number: 20090102375Abstract: A TFT and an OLED device are provided. The TFT includes a substrate, a gate, a gate insulator, a source/drain layer, an isolated layer, and a channel layer. The gate is disposed on the substrate. The gate insulator is disposed on the substrate and covers the gate. The source/drain layer is disposed on the gate insulator, and exposes a portion of the gate insulator above the gate. The isolated layer is disposed on the source/drain layer and has an opening to expose a portion of the gate insulator and a portion of the source/drain layer above the gate. The channel layer is disposed in the opening of the isolated layer. Further, the channel layer is exposed by the opening and is electrically connected to the source/drain layer. On the other hand, the OLED device mainly includes a driving circuit and an organic electro-luminescent unit.Type: ApplicationFiled: December 30, 2008Publication date: April 23, 2009Applicant: Industrial Technology Research InstituteInventors: Tarng-Shiang Hu, Yi-Kai Wang, Jing-Yi Yan, Tsung-Hsien Lin, Jia-Chong Ho
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Publication number: 20090087944Abstract: Electronic devices with hybrid high-k dielectric and fabrication methods thereof. The electronic device includes a substrate. A first electrode is disposed on the substrate. Hybrid high-k multi-layers comprising a first dielectric layer and a second dielectric layer are disposed on the substrate, wherein the first dielectric layer and the second dielectric layer are solvable and substantially without interface therebetween. A second electrode is formed on the hybrid multi-layers.Type: ApplicationFiled: December 11, 2008Publication date: April 2, 2009Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Wei-Ling Lin, Jiing-Fa Wen, Wen-Hsi Lee, Tarng-Shiang Hu, Jiun-Jie Wang, Cheng-Chung Lee
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Publication number: 20090075437Abstract: A method of TFT (Thin Film Transistor) manufacturing and a substrate structure are provided. The structure includes a substrate and a self-alignment mask. A self-alignment mask on a substrate is first manufactured and then the self-alignment mask may synchronously extend with the substrate during the thermal process. When an exposure light source is provided on the side without a TFT formed, the self-alignment mask can overcome the problem that when a plastic substrate extends, the positions of the source and drain to be formed on the plastic substrate are incorrect, which has a great effect on the accuracy of alignment. As the result, the positions of the source and drain can be defined accurately.Type: ApplicationFiled: November 26, 2008Publication date: March 19, 2009Applicant: INDUSTRIAL RESEARCH INSTITUTEInventors: Liang-Yin Huang, Yi-Kai Wang, Tarng-Shiang Hu, Jia-Chong Ho
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Publication number: 20090061560Abstract: A fabricating method of organic electronic device is provided. The method comprises: providing a flexible substrate; fabricating a plurality of organic elements on the flexible substrate; depositing a spacing material layer on the flexible substrate; patterning the spacing material layer to form a patterned spacing layer; and arranging a cover substrate on the patterned spacing layer, and sealing the edges of the flexible substrate and the cover substrate with a sealant, wherein the patterned spacing layer is used to maintain a space between the flexible substrate and the cover substrate.Type: ApplicationFiled: November 14, 2008Publication date: March 5, 2009Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Tsung-Hsien Lin, Jia-Chong Ho, Tarng-Shiang Hu, Cheng-Chung Lee
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Publication number: 20090061558Abstract: A fabricating method of organic electronic device is provided. The method comprises: providing a flexible substrate; fabricating a plurality of organic elements on the flexible substrate; depositing a patterned spacing layer on the flexible substrate with a spacing material deposition source and a mask; and arranging a cover substrate on the patterned spacing layer, and sealing the edges of the flexible substrate and the cover substrate with a sealant, wherein the patterned spacing layer is used to maintain a space between the flexible substrate and the cover substrate.Type: ApplicationFiled: November 14, 2008Publication date: March 5, 2009Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Tsung-Hsien Lin, Jia-Chong Ho, Tarng-Shiang Hu, Cheng-Chung Lee
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Patent number: 7495253Abstract: An organic thin-film transistor and a method for manufacturing the same are described. The method forms a gate layer on a substrate, an insulator layer on the substrate, forming a semiconductor layer on the insulator layer, and a strip for defining a channel length on the semiconductor layer. An electrode layer is screen printed on the semiconductor layer, and a passivation layer is coated on the electrode layer. The organic thin-film transistor manufactured by the method of the invention has a substrate, a gate layer formed on the substrate, an insulator layer formed on the substrate, a semiconductor layer formed on the insulator layer, a strip for defining a channel length formed on the semiconductor layer, an electrode layer screen-printed on the semiconductor layer, and a passivation layer coated on the electrode layer. Thereby, an organic thin-film transistor with a top-contact/bottom-gate structure is obtained.Type: GrantFiled: July 27, 2007Date of Patent: February 24, 2009Assignee: Industrial Technology Research InstituteInventors: Liang-Ying Huang, Jia-Chong Ho, Cheng-Chung Lee, Tarng-Shiang Hu, Wen-Kuei Huang, Wei-Ling Lin, Cheng-Chung Hsieh
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Publication number: 20090026678Abstract: Alignment precision enhancement of electronic component process on flexible substrate device and method thereof the same is proposed. The process step of a flexible substrate is put on a substrate holder, wherein the flexible substrate is fixed by a polymer tape. A plural of alignment marks is making for lithography process. An unstressed cut is separated the flexible substrate and substrate holder when the electronic component is made.Type: ApplicationFiled: September 30, 2008Publication date: January 29, 2009Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Jia-Chong Ho, Tarng-Shiang Hu, Hsiang-Yuan Cheng
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Patent number: 7444733Abstract: Alignment precision enhancement of electronic component process on flexible substrate device and method thereof the same is proposed. The process step of a flexible substrate is put on a substrate holder, wherein the flexible substrate is fixed by a polymer tape. A plural of alignment marks is making for lithography process. An unstressed cut is separated the flexible substrate and substrate holder when the electronic component is made.Type: GrantFiled: November 30, 2005Date of Patent: November 4, 2008Assignee: Industrial Technology Research InstituteInventors: Jia-Chong Ho, Tarng-Shiang Hu, Hsiang-Yuan Cheng
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Publication number: 20080157070Abstract: An organic semiconductor element having multi protection layers and process of making the same are provided. Firstly, forming a first protection layer on the thin film transistor. Next, forming a second protection layer which is thick enough to serve as the photo spacers on said first protection layer. The multi protection layers are then grown on said organic thin film transistor, so as to enable the second protection layer to have the additional function of the photo spacers by the patterning process. Thus the organic thin film transistor can be prevented from being damaged, and achieving the simplification of the manufacturing process and the reduction of the production cost.Type: ApplicationFiled: January 18, 2008Publication date: July 3, 2008Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Cheng-Chung Hsieh, Liang-Ying Huang, Tarng-Shiang Hu, Cheng-Chung Lee
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Publication number: 20080149922Abstract: Electronic devices with hybrid high-k dielectric and fabrication methods thereof. The electronic device includes a substrate. A first electrode is disposed on the substrate. Hybrid high-k multi-layers comprising a first dielectric layer and a second dielectric layer are disposed on the substrate, wherein the first dielectric layer and the second dielectric layer are solvable and substantially without interface therebetween. A second electrode is formed on the hybrid multi-layers.Type: ApplicationFiled: September 4, 2007Publication date: June 26, 2008Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Wei-Ling Lin, Jiing-Fa Wen, Wen-Hsi Lee, Tarng-Shiang Hu, Jiun-Jie Wang, Cheng-Chung Lee
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Publication number: 20080099843Abstract: A structure of a thin film transistor (TFT) is provided. A substrate has a first surface and a second surface opposite to each other, in which the first surface has a patterned mask layer. A patterned first electrode layer is disposed on the second surface of the substrate and has a gate portion and a capacitor electrode portion. A patterned second electrode layer is disposed on the second surface of the substrate and has a source and a drain, in which the patterned second electrode layer is self-aligned with the patterned first electrode layer by exposing the first surface of the substrate with the patterned mask layer as a mask. An insulating layer is disposed between the patterned first electrode layer and the patterned second electrode layer.Type: ApplicationFiled: October 11, 2007Publication date: May 1, 2008Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Yi-Kai Wang, Liang-Ying Huang, Tarng-Shiang Hu, Yu-Yuan Shen
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Publication number: 20080102567Abstract: A method for making a thin film transistor (TFT) is provided. A mask is first formed on the backside of a substrate, and is used to fabricate a gate, source, and drain of the transistor by backside exposure, such that the source and drain can be self-aligned with the gate pattern. In this way, an alignment shift due to expansion or contraction after performing a high temperature process on an insulating layer can be avoided. Further, since the backside mask previously formed on the substrate can be shifted with the expansion or contraction of the substrate, the process is simplified. Moreover, the source/drain can be accurately aligned with the gate, so that parasitic capacitance can be reduced and flickering of the panel can be avoided.Type: ApplicationFiled: October 11, 2007Publication date: May 1, 2008Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Yi-Kai Wang, Liang-Ying Huang, Tarng-Shiang Hu, Yu-Yuan Shen
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Patent number: 7344914Abstract: An organic semiconductor element having multi protection layers and process of making the same are provided. Firstly, forming a first protection layer on the thin film transistor. Next, forming a second protection layer which is thick enough to serve as the photo spacers on said first protection layer. The multi protection layers are then grown on said organic thin film transistor, so as to enable the second protection layer to have the additional function of the photo spacers by the patterning process. Thus the organic thin film transistor can be prevented from being damaged, and achieving the simplification of the manufacturing process and the reduction of the production cost.Type: GrantFiled: June 10, 2005Date of Patent: March 18, 2008Assignee: Industrial Technology Research InstituteInventors: Cheng-Chung Hsieh, Liang-Ying Huang, Tarng-Shiang Hu, Cheng-chung Lee
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Publication number: 20080035918Abstract: An organic thin-film transistor and a method for manufacturing the same are described. The method forms a gate layer on a substrate, an insulator layer on the substrate, forming a semiconductor layer on the insulator layer, and a strip for defining a channel length on the semiconductor layer. An electrode layer is screen printed on the semiconductor layer, and a passivation layer is coated on the electrode layer. The organic thin-film transistor manufactured by the method of the invention has a substrate, a gate layer formed on the substrate, an insulator layer formed on the substrate, a semiconductor layer formed on the insulator layer, a strip for defining a channel length formed on the semiconductor layer, an electrode layer screen-printed on the semiconductor layer, and a passivation layer coated on the electrode layer. Thereby, an organic thin-film transistor with a top-contact/bottom-gate structure is obtained.Type: ApplicationFiled: July 27, 2007Publication date: February 14, 2008Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Liang-Ying Huang, Jia-Chong Ho, Cheng-Chung Lee, Tarng-Shiang Hu, Wen-Kuei Huang, Wei-Ling Lin, Cheng-Chung Hsieh
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Publication number: 20080032440Abstract: An organic semiconductor device is provided. A conductive gate layer and a gate dielectric layer are formed on a substrate. Patterned metal layers are formed on the gate dielectric layer beside the conductive gate layer. An electrode modified layer is formed on a top surface and sidewall of each of the patterned metal layer. The patterned metal layers and the electrode modified layers formed thereon serve a source and a drain. An organic semiconductor layer is formed on the source and the drain.Type: ApplicationFiled: November 29, 2006Publication date: February 7, 2008Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Liang-Ying Huang, Tsung-Hsien Lin, Hsiang-Yuan Cheng, Tarng-Shiang Hu
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Publication number: 20080014686Abstract: A method of fabricating a vertical thin film transistor (vertical TFT) is disclosed, wherein a shadow mask is used to fabricate the TFT device in vertical structure. First, a metal layer is formed, which serves as ribs and a gate layer. Next, a shadow mask is disposed on the gate layer. Afterwards, the shadow mask is used as a mask to form a source layer, an organic semiconductor layer and a drain layer. Thus, the process is simplified. Since no photolithography process is required, and therefore damage of the organic semiconductor layer is avoided and a vertical TFT with desired electrical characteristics may be obtained.Type: ApplicationFiled: July 17, 2007Publication date: January 17, 2008Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Yi-Kai Wang, Tsung-Hsien Lin, Tarng-Shiang Hu, Yu-Yuan Shen