Patents by Inventor Taro Sugizaki
Taro Sugizaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10797093Abstract: According to some aspects, an imaging device is provided comprising a photoelectric conversion layer configured to receive light and to produce an electric charge in response to the received light, including a first filter region corresponding to a first pixel of the imaging device, the first filter region having a first thickness and a plurality of through holes formed therein, wherein the first filter region transmits light incident on the first filter region with a first peak transmission wavelength, and a second filter region corresponding to a second pixel of the imaging device, the second filter region having a second thickness greater than the first thickness and having a plurality of through holes formed therein, wherein the second filter region transmits light incident on the second filter region with a second peak transmission wavelength that is greater than the first peak transmission wavelength.Type: GrantFiled: December 12, 2017Date of Patent: October 6, 2020Assignee: Sony Semiconductor Solutions CorporationInventor: Taro Sugizaki
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Publication number: 20200203410Abstract: The present technology relates to a solid-state imaging device, an imaging apparatus, and an electronic apparatus, which can suppress a color mixture without lowering the sensitivity. In pixels (red pixels (R pixels), green pixels (G pixels), and blue pixels (B pixels)) other than W pixels and adjacent to the W pixels, light shielding films thicker than those of the W pixels are formed at positions adjacent to the W pixels. Furthermore, the shorter the wavelength, the thicker the light shielding film in the RGB pixels other than the W pixels. The present technology is applicable to the solid-state imaging device.Type: ApplicationFiled: March 2, 2020Publication date: June 25, 2020Applicant: Sony CorporationInventor: Taro Sugizaki
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Patent number: 10615203Abstract: The present technology relates to a solid-state imaging device, an imaging apparatus, and an electronic apparatus, which can suppress a color mixture without lowering the sensitivity. In pixels (red pixels (R pixels), green pixels (G pixels), and blue pixels (B pixels)) other than W pixels and adjacent to the W pixels, light shielding films thicker than those of the W pixels are formed at positions adjacent to the W pixels. Furthermore, the shorter the wavelength, the thicker the light shielding film in the RGB pixels other than the W pixels. The present technology is applicable to the solid-state imaging device.Type: GrantFiled: April 26, 2019Date of Patent: April 7, 2020Assignee: Sony CorporationInventor: Taro Sugizaki
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Publication number: 20200021782Abstract: The present technology relates to an imaging device capable of selectively taking out only a specific electromagnetic wavelength and generating a signal with an enhanced wavelength resolution, and an electronic apparatus. There are provided a first pixel including a metallic thin film filter configured to transmit a light in a first frequency band and a second pixel including a color filter configured to transmit a light in a second frequency band wider than the first frequency band. A signal in a third frequency band is generated from the respective signals of a plurality of first pixels each including a metallic thin film filter configured to transmit a light in the different first frequency bands. The present technology can be applied to a CMOS image sensor of backside irradiation type or surface irradiation type, for example.Type: ApplicationFiled: December 12, 2017Publication date: January 16, 2020Applicant: Sony Semiconductor Solutions CorporationInventor: Taro Sugizaki
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Publication number: 20190341413Abstract: The present technology relates to an image pickup element and an electronic device that can suppress a difference in sensitivity of light receiving units. The image pickup element includes a pixel array in which at least a first light receiving unit that receives light in a predetermined color and a second light receiving unit that receives light having a wavelength band of a band width narrower than a wavelength band of the predetermined color are arranged and, in a case where the pixel array is divided into four areas by a vertical line and a horizontal line, a position of the second light receiving unit in a first block, in which one or more of each of the first light receiving unit and the second light receiving unit are arranged, differs in each of the areas. The present technology can be applied to, for example, a CMOS image sensor.Type: ApplicationFiled: December 12, 2017Publication date: November 7, 2019Applicant: Sony Semiconductor Solutions CorporationInventor: Taro Sugizaki
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Publication number: 20190341412Abstract: According to some aspects, an imaging device is provided comprising a photoelectric conversion layer configured to receive light and to produce an electric charge in response to the received light, including a first filter region corresponding to a first pixel of the imaging device, the first filter region having a first thickness and a plurality of through holes formed therein, wherein the first filter region transmits light incident on the first filter region with a first peak transmission wavelength, and a second filter region corresponding to a second pixel of the imaging device, the second filter region having a second thickness greater than the first thickness and having a plurality of through holes formed therein, wherein the second filter region transmits light incident on the second filter region with a second peak transmission wavelength that is greater than the first peak transmission wavelength.Type: ApplicationFiled: December 12, 2017Publication date: November 7, 2019Applicant: Sony Semiconductor Solutions CorporationInventor: Taro Sugizaki
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Publication number: 20190252438Abstract: The present technology relates to a solid-state imaging device, an imaging apparatus, and an electronic apparatus, which can suppress a color mixture without lowering the sensitivity. In pixels (red pixels (R pixels), green pixels (G pixels), and blue pixels (B pixels)) other than W pixels and adjacent to the W pixels, light shielding films thicker than those of the W pixels are formed at positions adjacent to the W pixels. Furthermore, the shorter the wavelength, the thicker the light shielding film in the RGB pixels other than the W pixels. The present technology is applicable to the solid-state imaging device.Type: ApplicationFiled: April 26, 2019Publication date: August 15, 2019Applicant: Sony CorporationInventor: Taro Sugizaki
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Patent number: 10319764Abstract: The present technology relates to an image sensor and an electronic device capable of performing imaging in which mixed color is reduced.Type: GrantFiled: June 3, 2016Date of Patent: June 11, 2019Assignee: SONY CORPORATIONInventor: Taro Sugizaki
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Patent number: 10319761Abstract: The present technology relates to a solid-state imaging device, an imaging apparatus, and an electronic apparatus, which can suppress a color mixture without lowering the sensitivity. In pixels (red pixels (R pixels), green pixels (G pixels), and blue pixels (B pixels)) other than W pixels and adjacent to the W pixels, light shielding films thicker than those of the W pixels are formed at positions adjacent to the W pixels. Furthermore, the shorter the wavelength, the thicker the light shielding film in the RGB pixels other than the W pixels. The present technology is applicable to the solid-state imaging device.Type: GrantFiled: August 21, 2015Date of Patent: June 11, 2019Assignee: Sony CorporationInventor: Taro Sugizaki
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Solid-state image sensor, imaging control method, signal processing method, and electronic apparatus
Patent number: 10171750Abstract: The present technology relates to a solid-state image sensor, an imaging control method, a signal processing method, and an electronic apparatus that suppress the deterioration of image quality, which is caused by the difference of sensitivity between pixels. A solid-state image sensor includes: a pixel array unit including a plurality of pixels arranged, the plurality of pixels including a plurality of kinds of pixels, the plurality of kinds of pixels including a first pixel and a second pixel, the first pixel having the highest sensitivity, the second pixel having a sensitivity lower than the sensitivity of the first pixel; and a control unit that controls at least one of an analog gain and exposure time of/for the respective pixels depending on a ratio between the sensitivities of the first pixel and the second pixel. The present technology is applicable to a solid-state image sensor such as a CMOS image sensor.Type: GrantFiled: July 10, 2015Date of Patent: January 1, 2019Assignee: SONY CORPORATIONInventors: Taro Sugizaki, Go Yamanaka, Daisuke Yoshioka, Toru Nishi, Yousuke Horie, Takesi Kozasa, Keneki Go, Norihiro Ichimaru, Naoki Hosoi -
Publication number: 20180247964Abstract: The present technology relates to a solid-state imaging device, an imaging apparatus, and an electronic apparatus, which can suppress a color mixture without lowering the sensitivity. In pixels (red pixels (R pixels), green pixels (G pixels), and blue pixels (B pixels)) other than W pixels and adjacent to the W pixels, light shielding films thicker than those of the W pixels are formed at positions adjacent to the W pixels. Furthermore, the shorter the wavelength, the thicker the light shielding film in the RGB pixels other than the W pixels. The present technology is applicable to the solid-state imaging device.Type: ApplicationFiled: August 21, 2015Publication date: August 30, 2018Applicant: Sony CorporationInventor: Taro Sugizaki
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Publication number: 20180166488Abstract: The present technology relates to an image sensor and an electronic device capable of performing imaging in which mixed color is reduced.Type: ApplicationFiled: June 3, 2016Publication date: June 14, 2018Inventor: TARO SUGIZAKI
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Publication number: 20170278826Abstract: The present technology relates to a solid-state image capturing apparatus and an electronic device that can acquire a normal image and a narrow band image at the same time. The solid-state image capturing apparatus includes a plurality of substrates laminated in two or more layers, and two or more substrates of the plurality of substrates have pixels that perform photoelectric conversion. At least one substrate of the substrates having the pixels is a visible light sensor that receives visible light, and at least another substrate of the substrates having the pixels is a narrow band light sensor that includes narrow band filters being optical filters permeating light in a narrow wavelength band, and receives narrow band light in the narrow band.Type: ApplicationFiled: September 25, 2015Publication date: September 28, 2017Inventors: TARO SUGIZAKI, ISAO HIROTA
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SOLID-STATE IMAGE SENSOR, IMAGING CONTROL METHOD, SIGNAL PROCESSING METHOD, AND ELECTRONIC APPARATUS
Publication number: 20170201693Abstract: The present technology relates to a solid-state image sensor, an imaging control method, a signal processing method, and an electronic apparatus that suppress the deterioration of image quality, which is caused by the difference of sensitivity between pixels. A solid-state image sensor includes: a pixel array unit including a plurality of pixels arranged, the plurality of pixels including a plurality of kinds of pixels, the plurality of kinds of pixels including a first pixel and a second pixel, the first pixel having the highest sensitivity, the second pixel having a sensitivity lower than the sensitivity of the first pixel; and a control unit that controls at least one of an analog gain and exposure time of/for the respective pixels depending on a ratio between the sensitivities of the first pixel and the second pixel. The present technology is applicable to a solid-state image sensor such as a CMOS image sensor.Type: ApplicationFiled: July 10, 2015Publication date: July 13, 2017Inventors: TARO SUGIZAKI, GO YAMANAKA, DAISUKE YOSHIOKA, TORU NISHI, YOUSUKE HORIE, TAKESI KOZASA, KENEKI GO, NORIHIRO ICHIMARU, NAOKI HOSOI -
Patent number: 8080830Abstract: A semiconductor device includes: a bulk semiconductor substrate; a thyristor formed in the bulk semiconductor substrate; a gate electrode formed at the third region; and a well region. The thyristor included a first region of a first conduction type, a second region of a second conduction type opposite to the first conduction type, a third region of the first conduction type, and a fourth region of the second conduction type, junctioned in order. The well region of the second conduction type is formed in the bulk semiconductor substrate, the third region is formed in the well region. A first voltage is impressed on the first region side of the thyristor, a second voltage higher than the first voltage is impressed on the fourth region side of the thyristor, and a voltage higher than or equal to the first voltage is impressed on the well region.Type: GrantFiled: May 21, 2007Date of Patent: December 20, 2011Assignee: Sony CorporationInventor: Taro Sugizaki
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Publication number: 20090325373Abstract: The semiconductor memory device according to the present invention includes a charge storage layer 26 formed over a semiconductor substrate 10 and including a plurality of particles 16 as charge storage bodies in insulating films 12, 24, and a gate electrode 30 formed over the charge storage layer 26, in which the particles 16 are formed of metal oxide or metal nitride.Type: ApplicationFiled: September 9, 2009Publication date: December 31, 2009Applicant: JUJITSU LIMITEDInventor: Taro SUGIZAKI
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Patent number: 7602011Abstract: The semiconductor memory device according to the present invention includes a charge storage layer 26 formed over a semiconductor substrate 10 and including a plurality of particles 16 as charge storage bodies in insulating films 12, 24, and a gate electrode 30 formed over the charge storage layer 26, in which the particles 16 are formed of metal oxide or metal nitride.Type: GrantFiled: May 25, 2007Date of Patent: October 13, 2009Assignee: Fujitsu Microelectronics LimitedInventor: Taro Sugizaki
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Publication number: 20090065802Abstract: Disclosed herein is a semiconductor device including: an element forming region of a semiconductor substrate isolated by an element isolating region formed in the semiconductor substrate; an insulating film formed on the semiconductor substrate; an opening portion formed in the insulating film to include a region to be selectively epitaxially grown in the element forming region; and a semiconductor layer formed by selective epitaxial growth of the element forming region of the semiconductor substrate in the opening portion.Type: ApplicationFiled: September 5, 2008Publication date: March 12, 2009Applicant: SONY CORPORATIONInventor: Taro Sugizaki
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Patent number: 7443722Abstract: A semiconductor device includes a bulk semiconductor substrate, a plurality of storage elements, a bit line, a first voltage being applied to the first region side of the thyristor, and a voltage lower than the first voltage being applied to a word line. The plurality of storage elements formed on the bulk semiconductor substrate and each including a thyristor formed on the bulk semiconductor substrate and including a first region of a first conductor type, a second region of a second conduction type opposite to the first conduction type, a third region of the first conduction type and a fourth region of the second conduction type jointed together in order, a gate electrode formed on the third region, and a field effect transistor formed on the semiconductor substrate on which the thyristor is formed and connected to the fourth region of the thyristor.Type: GrantFiled: June 13, 2007Date of Patent: October 28, 2008Assignee: Sony CorporationInventor: Taro Sugizaki
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Patent number: 7365372Abstract: The present invention is to provide a semiconductor device including: a semiconductor layer that has a first-conductivity-type region, a second-conductivity-type region, a first-conductivity-type region, and a second-conductivity-type region that are adjacent to each other in that order; first and second electrodes that are connected to the first-conductivity-type region and the second-conductivity-type region, respectively, at both ends of the semiconductor layer; and a gate electrode that is coupled to the second-conductivity-type region or the first-conductivity-type region in an intermediate area of the semiconductor layer, the gate electrode being provided over a plurality of faces of a semiconductor layer portion serving as the second-conductivity-type region or the first-conductivity-type region in the intermediate area.Type: GrantFiled: July 10, 2006Date of Patent: April 29, 2008Assignee: Sony CorporationInventor: Taro Sugizaki