Patents by Inventor Tasuku Ono

Tasuku Ono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210367296
    Abstract: A sealing structure includes a gasket and an attachment wall. The gasket is arranged along an upper end side of a side wall of a battery case. The gasket includes a seal lip arranged on an upper end side of the gasket to be in contact with a cover for covering an opening side of the battery case. The attachment wall is fastened to the side wall of the battery case. The attachment wall includes an accommodation portion and a placement surface. The accommodation portion accommodates the gasket between the side wall and the attachment wall. The placement surface is arranged on an outer peripheral side of the attachment wall to be in tight contact with a lower end of an engagement portion arranged on an outer edge of the cover.
    Type: Application
    Filed: January 15, 2020
    Publication date: November 25, 2021
    Applicant: NOK CORPORATION
    Inventor: Tasuku ONO
  • Patent number: 11174945
    Abstract: A gasket improves sealing performance. A gasket to be placed in an annular groove includes an annular base to be placed in the groove, and a plurality of protrusions arranged at intervals on the base in a circumferential direction of the base. The protrusions protrude from the base to face side surfaces of the groove and have support surfaces with curvatures corresponding to curvatures of the side surfaces of the groove. Each protrusion has a length in the circumferential direction greater than an interval between facing ends of adjacent ones of the protrusions in the circumferential direction.
    Type: Grant
    Filed: June 7, 2019
    Date of Patent: November 16, 2021
    Assignee: NOK CORPORATION
    Inventor: Tasuku Ono
  • Publication number: 20210262571
    Abstract: A gasket is formed by extrusion and easily fastened into a groove which can be easily formed by presswork. A gasket is configured to seal a gap between a first member that has a sectionally curved groove and a second member. The gasket includes a rubber-like elastic base and at least two pairs of rubber-like elastic fins. The base can be inserted into the groove, and has a height allowing the base to be compressed when the first member and second member are coupled to each other. The fins protrude at different heights from the both side surfaces of the base, and can elastically deform in a direction opposite to an insertion direction when the base is inserted into the groove so that the fins contact the side walls of the groove. The base and the fins are integrally formed with each other as one unitary member by extrusion.
    Type: Application
    Filed: July 29, 2019
    Publication date: August 26, 2021
    Applicant: NOK CORPORATION
    Inventor: Tasuku ONO
  • Publication number: 20210226285
    Abstract: A sealing structure which can more simply and securely hold a gasket on an upper end of a side wall of a battery case as attached member is provided. The sealing structure includes a gasket arranged along an upper end side of a side wall of a battery case and an attachment wall fastened to the side wall of the battery case. The gasket includes a gasket main body and a bulging sealing portion. The gasket main body has an upper end arranged higher than the upper end of the side wall. The bulging sealing portion is arranged on the exterior side of the upper end side of the gasket main body, and tightly contacts an inner peripheral surface of an engagement portion arranged on an outer edge of a cover for covering an opening side of the battery case. The attachment wall includes an accommodation portion and an outer peripheral surface. The accommodation portion accommodates a lower side of the gasket main body between the side wall and the attachment wall.
    Type: Application
    Filed: January 15, 2020
    Publication date: July 22, 2021
    Applicant: NOK CORPORATION
    Inventor: Tasuku ONO
  • Publication number: 20210226284
    Abstract: A sealing structure which can more simply and securely hold a gasket on an upper end of a side wall of a battery case as attached member is provided. A sealing structure includes a gasket and an attachment wall. The gasket has a shape of straddling an upper end of a side wall of a battery case. The gasket on the top surface side is configured to be in tight contact with a cover for covering an opening side of the battery case. The attachment wall is fastened to the side wall of the battery case, and has a placement surface arranged to be in contact with a lower end of an engagement portion arranged on an outer edge of the cover and an lower end of the gasket.
    Type: Application
    Filed: January 15, 2020
    Publication date: July 22, 2021
    Applicant: NOK CORPORATION
    Inventor: Tasuku ONO
  • Publication number: 20200408304
    Abstract: A gasket configured to be attached to a support body includes: a frame-shaped attachment plate, a side wall part, a flange part, and a gasket body. The frame-shaped attachment plate is fastened to the support body. The side wall part extends along the peripheral direction of the attachment plate. The flange part is arranged along the peripheral direction of the side wall part to define insertion space between the flange part and the attachment plate. The gasket body is formed of a rubber-like elastic material by extrusion to have a fixed sectional shape along its entire length, and engages the attachment plate along its entire length without bonded. The gasket body includes a first seal part, a second seal part, and an insertion protrusion. The first seal part contacts the attachment plate. The second seal part is arranged opposite to the first seal part to contact a supported body. The insertion protrusion is inserted into the insertion space.
    Type: Application
    Filed: September 20, 2019
    Publication date: December 31, 2020
    Inventor: Tasuku ONO
  • Publication number: 20200018398
    Abstract: A gasket improves sealing performance. A gasket to be placed in an annular groove includes an annular base to be placed in the groove, and a plurality of protrusions arranged at intervals on the base in a circumferential direction of the base. The protrusions protrude from the base to face side surfaces of the groove and have support surfaces with curvatures corresponding to curvatures of the side surfaces of the groove. Each protrusion has a length in the circumferential direction greater than an interval between facing ends of adjacent ones of the protrusions in the circumferential direction.
    Type: Application
    Filed: June 7, 2019
    Publication date: January 16, 2020
    Applicant: NOK CORPORATION
    Inventor: Tasuku ONO
  • Patent number: 9722067
    Abstract: A semiconductor device includes a first nitride semiconductor layer, a source electrode on the first nitride semiconductor layer, a drain electrode on the first nitride semiconductor layer, a gate electrode on the first nitride semiconductor layer and between the source electrode and the drain electrode, a gate field plate electrode that is separated from the first nitride semiconductor layer, and includes one end in direct contact with the gate electrode, and the other end positioned between the gate electrode and the drain electrode, a first interlayer insulating film that is separated from the gate electrode and is between the gate field plate electrode and the first nitride semiconductor layer, and a second interlayer insulating film that is between the gate electrode and the first interlayer insulating film and has a dielectric constant higher than a dielectric constant of the first interlayer insulating film.
    Type: Grant
    Filed: March 7, 2016
    Date of Patent: August 1, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tasuku Ono, Takashi Onizawa, Yoshikazu Suzuki
  • Publication number: 20170200818
    Abstract: A semiconductor device includes a first nitride semiconductor layer, a second nitride semiconductor layer on the first nitride semiconductor layer and having a larger band gap than that of the first nitride semiconductor layer, a gate electrode on the second nitride semiconductor layer, drain and source electrodes on the second nitride semiconductor layer with the gate electrode interposed therebetween, interlayer insulating films on the second nitride semiconductor layer in a layer shape, and field plates including a first field plate at a greater distance from the second nitride semiconductor layer than the gate electrode and closer to the drain electrode than the gate electrode, and a second field plate at a larger distance from the second nitride semiconductor layer than the first field plate and nearer to drain electrode than the first field plate. The first and second field plates extend inwardly of the same interlayer insulating film.
    Type: Application
    Filed: August 8, 2016
    Publication date: July 13, 2017
    Inventors: Yoshikazu SUZUKI, Tasuku ONO
  • Publication number: 20170077284
    Abstract: A semiconductor device includes a first nitride semiconductor layer, a source electrode on the first nitride semiconductor layer, a drain electrode on the first nitride semiconductor layer, a gate electrode on the first nitride semiconductor layer and between the source electrode and the drain electrode, a gate field plate electrode that is separated from the first nitride semiconductor layer, and includes one end in direct contact with the gate electrode, and the other end positioned between the gate electrode and the drain electrode, a first interlayer insulating film that is separated from the gate electrode and is between the gate field plate electrode and the first nitride semiconductor layer, and a second interlayer insulating film that is between the gate electrode and the first interlayer insulating film and has a dielectric constant higher than a dielectric constant of the first interlayer insulating film.
    Type: Application
    Filed: March 7, 2016
    Publication date: March 16, 2017
    Inventors: Tasuku ONO, Takashi ONIZAWA, Yoshikazu SUZUKI
  • Patent number: 9412825
    Abstract: A semiconductor device includes a GaN-based semiconductor layer, a source electrode on the GaN-based semiconductor layer, a drain electrode on the GaN-based semiconductor layer, and a gate electrode formed on the GaN-based semiconductor layer between the source electrode and the drain electrode. A first layer is in contact with the GaN-based semiconductor layer between the gate electrode and the drain electrode.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: August 9, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takaaki Yasumoto, Naoko Yanase, Kazuhide Abe, Takeshi Uchihara, Yasunobu Saito, Toshiyuki Naka, Akira Yoshioka, Tasuku Ono, Tetsuya Ohno, Hidetoshi Fujimoto, Shingo Masuko, Masaru Furukawa, Yasunari Yagi, Miki Yumoto, Atsuko Iida, Yukako Murakami, Takako Motai
  • Patent number: 9165922
    Abstract: According to an embodiment, a semiconductor device includes a conductive substrate, a Schottky barrier diode, and a field-effect transistor. The Schottky barrier diode is mounted on the conductive substrate and includes an anode electrode and a cathode electrode. The anode electrode is electrically connected to the conductive substrate. The field-effect transistor is mounted on the conductive substrate and includes a source electrode, a drain electrode, and a gate electrode. The source electrode of the field-effect transistor is electrically connected to the cathode electrode of the Schottky barrier diode. The gate electrode of the field-effect transistor is electrically connected to the anode electrode of the Schottky barrier diode.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: October 20, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akira Yoshioka, Yasunobu Saito, Hidetoshi Fujimoto, Takeshi Uchihara, Naoko Yanase, Toshiyuki Naka, Tetsuya Ohno, Tasuku Ono
  • Publication number: 20150263152
    Abstract: A semiconductor device includes a GaN-based semiconductor layer, a source electrode on the GaN-based semiconductor layer, a drain electrode on the GaN-based semiconductor layer, and a gate electrode formed on the GaN-based semiconductor layer between the source electrode and the drain electrode. A first layer is in contact with the GaN-based semiconductor layer between the gate electrode and the drain electrode.
    Type: Application
    Filed: August 29, 2014
    Publication date: September 17, 2015
    Inventors: Takaaki YASUMOTO, Naoko YANASE, Kazuhide ABE, Takeshi UCHIHARA, Yasunobu SAITO, Toshiyuki NAKA, Akira YOSHIOKA, Tasuku ONO, Tetsuya OHNO, Hidetoshi FUJIMOTO, Shingo MASUKO, Masaru FURUKAWA, Yasunari YAGI, Miki YUMOTO, Atsuko IIDA, Yukako MURAKAMI, Takako MOTAI
  • Publication number: 20150263103
    Abstract: A semiconductor device according to an embodiment includes a first semiconductor layer including a first nitride semiconductor, a second semiconductor layer on the first semiconductor layer including a second nitride semiconductor, a source electrode, a drain electrode, a first gate electrode provided on the second semiconductor layer between the source electrode and the drain electrode having a schottky junction, a second gate electrode provided above the second semiconductor layer intervening an insulating film, provided between the source electrode and the first gate electrode, electrically connected with the first gate electrode, and a third gate electrode provided above the second semiconductor layer intervening an insulating film, provided between the drain electrode and the first gate electrode, electrically connected with the first gate electrode.
    Type: Application
    Filed: March 17, 2014
    Publication date: September 17, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yasunobu Saito, Hidetoshi Fujimoto, Akira Yoshioka, Takeshi Uchihara, Takaaki Yasumoto, Naoko Yanase, Tasuku Ono
  • Publication number: 20150263101
    Abstract: In one embodiment, a semiconductor device includes a semiconductor chip including a nitride semiconductor layer, and including a control electrode, a first electrode and a second electrode provided on the nitride semiconductor layer. The device further includes a support including a substrate, and including a control terminal, a first terminal and a second terminal provided on the substrate. The semiconductor chip is provided on the support such that the control electrode, the first electrode and the second electrode face the support. The control electrode, the first electrode and the second electrode of the semiconductor chip are electrically connected to the control terminal, the first terminal and the second terminal of the support, respectively.
    Type: Application
    Filed: September 10, 2014
    Publication date: September 17, 2015
    Inventors: Shingo Masuko, Takaaki Yasumoto, Naoko Yanase, Miki Yumoto, Masahito Mimura, Yasunobu Saito, Akira Yoshioka, Hidetoshi Fujimoto, Takeshi Uchihara, Tetsuya Ohno, Toshiyuki Naka, Tasuku Ono
  • Publication number: 20150263630
    Abstract: In one embodiment, a power supply circuit includes a first circuit including one or more first switching devices, and a first controller configured to control the first switching devices, the first circuit being configured to output a first voltage. The power supply circuit further includes a second circuit including one or more second switching devices which include a normally-on device, and a second controller configured to control the second switching devices, the second circuit being configured to output a second voltage generated from the first voltage. The second controller transmits a first signal for allowing the first circuit to output the first voltage, based on a value of a voltage or a current at a first node in the second circuit. The first controller allows the first circuit to output the first voltage by controlling the first switching devices in accordance with the first signal.
    Type: Application
    Filed: September 10, 2014
    Publication date: September 17, 2015
    Inventors: Toshiyuki Naka, Yasunobu Saito, Hidetoshi Fujimoto, Akira Yoshioka, Tetsuya Ohno, Takeshi Uchihara, Takaaki Yasumoto, Naoko Yanase, Shingo Masuko, Tasuku Ono
  • Publication number: 20150263700
    Abstract: According to one embodiment, a semiconductor device includes a GaN-based semiconductor layer, a resonator that uses a first portion of the GaN-based semiconductor layer as a piezoelectric layer to resonate, and a transistor that uses a second portion of the GaN-based semiconductor layer as a channel layer.
    Type: Application
    Filed: September 2, 2014
    Publication date: September 17, 2015
    Inventors: Takaaki YASUMOTO, Naoko YANASE, Kazuhide ABE, Takeshi UCHIHARA, Yasunobu SAITO, Toshiyuki NAKA, Akira YOSHIOKA, Tasuku ONO, Tetsuya OHNO, Hidetoshi FUJIMOTO, Shingo MASUKO, Masaru FURUKAWA, Yasunari YAGI, Miki YUMOTO, Atsuko IIDA, Yukako MURAKAMI, Yoshikazu SUZUKI
  • Publication number: 20150263001
    Abstract: A semiconductor device includes a first semiconductor layer and a second semiconductor layer formed on the first semiconductor layer. A first control electrode is on the first semiconductor layer with a first insulating layer between the first control electrode and the first semiconductor layer. A second control electrode is on the first semiconductor layer with a second insulating layer between the second control electrode and the first semiconductor layer, a distance between the first control electrode and the first semiconductor layer is less than a distance between the second control electrode. A wiring electrically connects the first control electrode and the second control electrode.
    Type: Application
    Filed: August 29, 2014
    Publication date: September 17, 2015
    Inventors: Yasunobu SAITO, Hidetoshi FUJIMOTO, Akira YOSHIOKA, Takeshi UCHIHARA, Toshiyuki NAKA, Tasuku ONO
  • Patent number: 9054171
    Abstract: In one embodiment, a semiconductor device includes a first semiconductor layer of a first conductivity type or an intrinsic type. The device further includes a second semiconductor layer of the first conductivity type or the intrinsic type disposed above the first semiconductor layer. The device further includes a third semiconductor layer of a second conductivity type including a first upper portion in contact with the first semiconductor layer, a second upper portion located at a lower position than the first upper portion, a first side portion located between the first upper portion and the second upper portion, and a second side portion located at a lower position than the first side portion.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: June 9, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuya Ohno, Yasunobu Saito, Hidetoshi Fujimoto, Akira Yoshioka, Takeshi Uchihara, Toshiyuki Naka, Takaaki Yasumoto, Naoko Yanase, Shingo Masuko, Tasuku Ono
  • Publication number: 20150076506
    Abstract: This disclosure provides a semiconductor device which includes a GaN-based semiconductor layer having a surface with an angle of not less than 0 degree and not more than 5 degrees with respect to an m-plane or an a-plane, a first electrode provided above the surface and having a first end, and a second electrode provided above the surface to space apart from the first electrode, having a second end facing the first end, and a direction of a segment connecting an arbitrary point of the first end and an arbitrary point of the second end is different from a c-axis direction of the GaN-based semiconductor layer.
    Type: Application
    Filed: March 17, 2014
    Publication date: March 19, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Takaaki Yasumoto, Naoko Yanase, Kazuhide Abe, Takeshi Uchihara, Yasunobu Saito, Toshiyuki Naka, Akira Yoshioka, Tasuku Ono, Tetsuya Ohno, Hidetoshi Fujimoto, Shingo Masuko, Masaru Furukawa, Yasunari Yagi, Miki Yumoto, Atsuko Iida