Abstract: In a communication control device in which an antenna electrode having an antenna connected thereto, a power supply circuit, and a communication circuit are mounted on a mounting board, the antenna electrode is disposed at one corner portion on a principal surface of the mounting board, the communication circuit is disposed on a side of a first side of the principal surface that shares the corner portion, and the power supply circuit is disposed on a side of a second side facing the first side. Further, a first signal path connecting the antenna electrode and the communication circuit extends along the first side, and a second signal path connecting the antenna electrode and the power supply circuit extends along a third side that shares the corner portion and is perpendicular to the first side.

Abstract: To achieve a reduction of noise in a wireless system of an electronic device for communication. The electronic device for communication includes: a bottom lid; a loop antenna that forms an electromagnetic field; a communication circuit coupled to the loop antenna; a battery pack that is a metallic part; a magnetic sheet arranged between the loop antenna and the metallic part, the magnetic sheet including a protruding portion that protrudes outside an outer peripheral portion of the loop antenna; a wiring substrate arranged over the battery pack and having an IC and the like mounted thereon; and a lid with a display arranged over the wiring substrate, in which, with the outer peripheral portion of the loop antenna as a base point, a protruding amount from the base point of the protruding portion of the magnetic sheet is twice or more a wiring width of the loop antenna.

Abstract: A semiconductor device has a wiring board having a wiring, a semiconductor chip that is mounted on the wiring board, and an electric conductor reference plane provided in the inside of the wiring board, in which in top view. The wiring includes a first region that overlaps the electric conductor reference plane and a second region that is the whole region except for the first region. A conductor chip is mounted above the second region.

Abstract: A semiconductor device includes an interposer, and a semiconductor chip mounted on the interposer. In a plan view, the interposer includes a first region overlapping the semiconductor chip, and a second region excluding the first region. The interposer includes at least one wiring formed astride the first region and the second region. The cross-sectional area of the wiring in the first region and the cross-sectional area of the wiring in the second region are different from each other.

Abstract: The electronic device includes the substrate, the electronic component mounted on a main surface of the substrate, a plurality of external terminals formed on a back surface of the substrate, and a plurality of interconnects formed on the back surface of the substrate, wherein the plurality of interconnects includes a first interconnect disposed so as to overlap with an outer edge of the electronic component in a plan view. A pitch between a first external terminal and a second external terminal, adjacent to each other in one direction with the first interconnect located therebetween, is wider than a pitch between a third external terminal and a fourth external terminal, adjacent to each other in the same direction without the first interconnect located therebetween.

Abstract: A semiconductor device has a wiring board having a wiring, a semiconductor chip that is mounted on the wiring board, and an electric conductor reference plane provided in the inside of the wiring board, in which in top view. The wiring includes a first region that overlaps the electric conductor reference plane and a second region that is the whole region except for the first region. A conductor chip is mounted above the second region.

Abstract: A semiconductor device includes an interposer, and a semiconductor chip mounted on the interposer. In a plan view, the interposer includes a first region overlapping the semiconductor chip, and a second region excluding the first region. The interposer includes at least one wiring formed astride the first region and the second region. The cross-sectional area of the wiring in the first region and the cross-sectional area of the wiring in the second region are different from each other.