Patents by Inventor Tatsuro Sawatari

Tatsuro Sawatari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10681820
    Abstract: A circuit board includes: a metal core base material including a first main surface, a second main surface on an opposite side of the first main surface, a side surface, and a projection that projects from the side surface; an outer cover including a first insulation layer that covers the first main surface, a second insulation layer that covers the second main surface, and a third insulation layer that covers the side surface; a first wiring layer provided in the first main surface with the first insulation layer interposed between the first wiring layer and the first main surface; a second wiring layer provided in the second main surface with the second insulation layer interposed between the second wiring layer and the second main surface; and a sealing portion that is made of an insulation material embedded in the outer cover and covers an end surface of the projection.
    Type: Grant
    Filed: March 4, 2019
    Date of Patent: June 9, 2020
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Tatsuro Sawatari, Norio Sekiguchi
  • Publication number: 20190274220
    Abstract: A circuit board includes: a metal core base material including a first main surface, a second main surface on an opposite side of the first main surface, a side surface, and a projection that projects from the side surface; an outer cover including a first insulation layer that covers the first main surface, a second insulation layer that covers the second main surface, and a third insulation layer that covers the side surface; a first wiring layer provided in the first main surface with the first insulation layer interposed between the first wiring layer and the first main surface; a second wiring layer provided in the second main surface with the second insulation layer interposed between the second wiring layer and the second main surface; and a sealing portion that is made of an insulation material embedded in the outer cover and covers an end surface of the projection.
    Type: Application
    Filed: March 4, 2019
    Publication date: September 5, 2019
    Inventors: TATSURO SAWATARI, NORIO SEKIGUCHI
  • Patent number: 9818780
    Abstract: In a camera module, a planar part, which is for mitigating deformation of the surface of a second insulating portion on which an imaging device is mounted, is embedded in the second insulating portion of a substrate so as to face the imaging device mounted on the surface (top surface) of the second insulating portion.
    Type: Grant
    Filed: January 14, 2014
    Date of Patent: November 14, 2017
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Masashi Miyazaki, Yuichi Sugiyama, Tatsuro Sawatari, Hideki Yokota, Yutaka Hata
  • Patent number: 9363897
    Abstract: Provided is a substrate with built-in electronic component including a component storage layer and two buildup layers. The component storage layer includes an electronic component and a cover portion having an insulating property. The electronic component includes a terminal surface and a main body. The cover portion includes a first surface formed to be flush with the terminal surface, covers the main body of the electronic component, and has a first linear expansion coefficient. The two buildup layers each include an insulating layer and a via portion. The insulating layer is adjacent to the cover portion and has a second linear expansion coefficient larger than the first linear expansion coefficient. The via portion is provided in the insulating layer and connected to the terminal surface. The insulating layer of one of the two buildup layers is formed to be in contact with the terminal surface and the first surface.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: June 7, 2016
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Yuichi Sugiyama, Tatsuro Sawatari, Yusuke Inoue, Masashi Miyazaki
  • Patent number: 9301407
    Abstract: The method of manufacturing a substrate includes: forming a penetrating hole in a base layer; inserting a metal dummy part in the penetrating hole; forming an insulating portion made of synthetic resin to fill a ring-shaped gap between the penetrating hole and the dummy part; forming lower insulating layers, covering the bottom surface of the dummy part, that are made of synthetic resin on the bottom surface of the base layer to be continuous with the insulating portion; forming upper insulating layers, covering the top surface of the dummy part, that are made of synthetic resin on the top surface of the base layer to be continuous with the insulating portion; forming an exposing hole by routing in the upper insulating layers to expose the top surface of the dummy part; and forming a cavity by removing the dummy part exposed through the exposing hole by etching.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: March 29, 2016
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Masashi Miyazaki, Yuichi Sugiyama, Tatsuro Sawatari, Hideki Yokota, Yutaka Hata
  • Patent number: 9253386
    Abstract: A camera module, in which a recessed portion that has a greater depth than the thickness of an imaging device is disposed on the surface (top surface) of an embedded-component substrate. An imaging device is bonded to a bottom of the recessed portion such that an opening is present between the surface (top surface) of the imaging device and the surface (top surface) of the embedded-component substrate. Connection pads on the imaging device are connected to conductor pads disposed on the surface (top surface) of the embedded-component substrate by bonding wires that go through the opening.
    Type: Grant
    Filed: January 14, 2014
    Date of Patent: February 2, 2016
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Masashi Miyazaki, Yuichi Sugiyama, Tatsuro Sawatari, Hideki Yokota, Yutaka Hata
  • Patent number: 9101075
    Abstract: There is provided a substrate with built-in component, including a metal core layer having a cavity for storing a component; a wiring layer that is laminated on the core layer and has a plurality of vias for an interlayer connection, the vias being formed at regions opposing to the cavity; and an electronic component including a plurality of terminals electrically connected to the plurality of vias, and a component body that is stored in the cavity and has a support surface for supporting the plurality of terminals, the plurality of terminals being disposed eccentrically from a center of the support surface to a first direction, and the component body being disposed eccentrically from a center of the cavity to a second direction opposite to the first direction.
    Type: Grant
    Filed: December 9, 2013
    Date of Patent: August 4, 2015
    Assignee: Taiyo Yuden Co., Ltd
    Inventors: Masaki Naganuma, Kazuaki Ida, Tatsuro Sawatari, Hiroshi Nakamura
  • Patent number: 9101050
    Abstract: A circuit module includes a circuit substrate, a mount component, a sealing body, and a shield. The circuit substrate includes a mount surface. The mount component is mounted on the mount surface. The sealing body is formed on the mount surface, covers the mount component and has a trench formed from a main surface of the sealing body to the mount surface. The trench includes side walls configured of a first side wall at a mount surface side and a second side wall at a main surface side. A straight line connecting the first point and the second point has a second slope gentler than the first slope against the mount surface. The shield covers the sealing body and has an inner shield section formed within the trench and an outer shield section disposed on the main surface and the inner shield.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: August 4, 2015
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Masaya Shimamura, Kenzo Kitazaki, Eiji Mugiya, Tatsuro Sawatari, Tetsuo Saji, Hiroshi Nakamura
  • Patent number: 9078370
    Abstract: Provided is a substrate with a built-in electronic component that can minimize an occurrence of a deformation such as warping or distortion of the substrate with a built-in electronic component, which is caused by a difference in rigidity between a region of low rigidity and a region of high rigidity that are formed in a core layer thereof. In the substrate with a built-in electronic component, electronic components 12 are respectively housed in a plurality of housing portions 11a1 that are formed in a core layer 11a, and in the core layer 11a, a plurality of openings 11a2 filled with an insulator 11k are formed.
    Type: Grant
    Filed: August 20, 2012
    Date of Patent: July 7, 2015
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Yuichi Sugiyama, Tatsuro Sawatari, Yusuke Inoue, Masashi Miyazaki, Yoshiki Hamada, Toshiyuki Kagawa
  • Patent number: 9055671
    Abstract: A substrate with built-in electronic component includes: a core layer that includes a core material and a cavity formed in the core material and containing an insulating material; an insulating layer that includes a ground wiring and a signal wiring and is formed on the core layer; and a plurality of electronic components that each include a first terminal and a second terminal and are stored in the cavity, the plurality of electronic components each having one end portion and the other end portion, the first terminal being formed at the one end portion and connected to the ground wiring, the second terminal being formed at the other end portion and connected to the signal wiring, the plurality of electronic components having at least one of arrangements in which the first terminals face each other and in which the second terminals face each other.
    Type: Grant
    Filed: August 15, 2014
    Date of Patent: June 9, 2015
    Assignee: Taiyo Yuden Co., Ltd
    Inventors: Tatsuro Sawatari, Yuichi Sugiyama
  • Patent number: 9007782
    Abstract: In a first conductive layer and a third conductive layer that are respectively closest to a core layer having a storage portion that penetrates therethrough, four first penetrating holes and four first penetrating holes are formed so as to overlap part of an opening edge of the storage portion that is projected onto the first conductive layer and the third conductive layer, respectively.
    Type: Grant
    Filed: December 10, 2014
    Date of Patent: April 14, 2015
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Tatsuro Sawatari, Yuichi Sugiyama, Hiroshi Nakamura, Masaki Naganuma, Tetsuo Saji
  • Publication number: 20150098203
    Abstract: In a first conductive layer and a third conductive layer that are respectively closest to a core layer having a storage portion that penetrates therethrough, four first penetrating holes and four first penetrating holes are formed so as to overlap part of an opening edge of the storage portion that is projected onto the first conductive layer and the third conductive layer, respectively.
    Type: Application
    Filed: December 10, 2014
    Publication date: April 9, 2015
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Tatsuro SAWATARI, Yuichi SUGIYAMA, Hiroshi NAKAMURA, Masaki NAGANUMA, Tetsuo SAJI
  • Patent number: 8988885
    Abstract: An electronic circuit module includes a substrate with built-in component, a mount component mounted on the substrate with built-in component, a sealing portion covering the mount component, and a shield made of a conductive synthetic resin covering the sealing portion. The substrate with built-in component has a core layer made of a metal, an outer cover made of an insulating synthetic resin, and a first protrusion. The core layer has corners and side faces. The outer cover covers the corners and the side faces, and has a first surface. The first protrusion has a first end face exposed at the outer cover and a second surface adjacent to the first surface, and is formed away from the corners of the side faces to protrude outwardly. The sealing portion covers the mount component. The shield covers the sealing portion, and has a third surface bonded to the first surface and the second surface.
    Type: Grant
    Filed: November 6, 2013
    Date of Patent: March 24, 2015
    Assignee: Taiyo Yuden Co., Ltd
    Inventors: Tatsuro Sawatari, Masashi Miyazaki, Yoshiki Hamada, Yuichi Sugiyama, Kazuaki Ida
  • Publication number: 20150070862
    Abstract: There is provided a substrate with built-in component, including a metal core layer having a cavity for storing a component; a wiring layer that is laminated on the core layer and has a plurality of vias for an interlayer connection, the vias being formed at regions opposing to the cavity; and an electronic component including a plurality of terminals electrically connected to the plurality of vias, and a component body that is stored in the cavity and has a support surface for supporting the plurality of terminals, the plurality of terminals being disposed eccentrically from a center of the support surface to a first direction, and the component body being disposed eccentrically from a center of the cavity to a second direction opposite to the first direction.
    Type: Application
    Filed: December 9, 2013
    Publication date: March 12, 2015
    Applicant: Taiyo Yuden Co., Ltd.
    Inventors: Masaki NAGANUMA, Kazuaki IDA, Tatsuro SAWATARI, Hiroshi NAKAMURA
  • Publication number: 20150068795
    Abstract: A substrate with built-in electronic component includes an electronic component, a first wiring layer, a second wiring layer, a via, and a core base-material. The first wiring layer has a first wiring portion. The second wiring layer has a second wiring portion. The via is configured to electrically connect the first wiring portion and the second wiring portion. The core base-material has a metal layer, at least one first storage portion, and a second storage portion, the metal layer being disposed between the first wiring layer and the second wiring layer, the at least one first storage portion being formed in the metal layer, the at least one first storage portion storing the electronic component, the second storage portion being formed on an outside of the first storage portion integrally with the first storage portion, the second storage portion storing the via.
    Type: Application
    Filed: December 11, 2013
    Publication date: March 12, 2015
    Applicant: Taiyo Yuden Co., Ltd.
    Inventors: Kazuaki IDA, Masashi MIYAZAKI, Tatsuro SAWATARI, Hiroshi NAKAMURA, Masaki NAGANUMA
  • Patent number: 8964407
    Abstract: A substrate with built-in electronic component includes: a core layer that includes a core material and a cavity formed in the core material and containing an insulating material; an insulating layer that includes a ground wiring and a signal wiring and is formed on the core layer; and a plurality of electronic components that each include a first terminal and a second terminal and are stored in the cavity, the plurality of electronic components each having one end portion and the other end portion, the first terminal being formed at the one end portion and connected to the ground wiring, the second terminal being formed at the other end portion and connected to the signal wiring, the plurality of electronic components having at least one of arrangements in which the first terminals face each other and in which the second terminals face each other.
    Type: Grant
    Filed: December 9, 2013
    Date of Patent: February 24, 2015
    Assignee: Taiyo Yuden Co., Ltd
    Inventors: Tatsuro Sawatari, Yuichi Sugiyama
  • Publication number: 20150049439
    Abstract: A circuit module includes a circuit substrate, a mount component, a sealing body, and a shield. The circuit substrate includes a mount surface. The mount component is mounted on the mount surface. The sealing body is formed on the mount surface, covers the mount component and has a trench formed from a main surface of the sealing body to the mount surface. The trench includes side walls configured of a first side wall at a mount surface side and a second side wall at a main surface side. A straight line connecting the first point and the second point has a second slope gentler than the first slope against the mount surface. The shield covers the sealing body and has an inner shield section formed within the trench and an outer shield section disposed on the main surface and the inner shield.
    Type: Application
    Filed: November 26, 2013
    Publication date: February 19, 2015
    Applicant: Taiyo Yuden Co., Ltd.
    Inventors: Masaya SHIMAMURA, Kenzo KITAZAKI, Eiji MUGIYA, Tatsuro SAWATARI, Tetsuo SAJI, Hiroshi NAKAMURA
  • Publication number: 20150010694
    Abstract: The method of manufacturing a substrate includes: forming a penetrating hole in a base layer; inserting a metal dummy part in the penetrating hole; forming an insulating portion made of synthetic resin to fill a ring-shaped gap between the penetrating hole and the dummy part; forming lower insulating layers, covering the bottom surface of the dummy part, that are made of synthetic resin on the bottom surface of the base layer to be continuous with the insulating portion; forming upper insulating layers, covering the top surface of the dummy part, that are made of synthetic resin on the top surface of the base layer to be continuous with the insulating portion; forming an exposing hole by routing in the upper insulating layers to expose the top surface of the dummy part; and forming a cavity by removing the dummy part exposed through the exposing hole by etching.
    Type: Application
    Filed: June 26, 2014
    Publication date: January 8, 2015
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Masashi MIYAZAKI, Yuichi SUGIYAMA, Tatsuro SAWATARI, Hideki YOKOTA, Yutaka HATA
  • Patent number: 8923009
    Abstract: In a first conductive layer and a third conductive layer that are respectively closest to a core layer having a storage portion that penetrates therethrough, four first penetrating holes and four first penetrating holes are formed so as to overlap part of an opening edge of the storage portion that is projected onto the first conductive layer and the third conductive layer, respectively.
    Type: Grant
    Filed: June 4, 2013
    Date of Patent: December 30, 2014
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Tatsuro Sawatari, Yuichi Sugiyama, Hiroshi Nakamura, Masaki Naganuma, Tetsuo Saji
  • Publication number: 20140355232
    Abstract: A substrate with built-in electronic component includes: a core layer that includes a core material and a cavity formed in the core material and containing an insulating material; an insulating layer that includes a ground wiring and a signal wiring and is formed on the core layer; and a plurality of electronic components that each include a first terminal and a second terminal and are stored in the cavity, the plurality of electronic components each having one end portion and the other end portion, the first terminal being formed at the one end portion and connected to the ground wiring, the second terminal being formed at the other end portion and connected to the signal wiring, the plurality of electronic components having at least one of arrangements in which the first terminals face each other and in which the second terminals face each other.
    Type: Application
    Filed: August 15, 2014
    Publication date: December 4, 2014
    Inventors: Tatsuro SAWATARI, Yuichi SUGIYAMA