Patents by Inventor Tatsuro Sawatari

Tatsuro Sawatari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080006928
    Abstract: A composite multi-layer substrate comprising a flat plate-like core member formed of a material having an excellent electric conductivity, an excellent heat conductivity, and a high rigidity, a front resin layer and a rear resin layer covering at least the front and rear surfaces of the core member, and a bottomless hole formed in the core member through the front and rear sides of the core member, wherein an electronic component is installed in the bottomless hole, whereby since the strength of the composite multi-layer substrate can be assured by the rigidity of the core member, conventional prior art glass cloth can be eliminated, deterioration in the electric characteristics caused by ion migration can be avoided and will result in reduced production cost.
    Type: Application
    Filed: August 29, 2007
    Publication date: January 10, 2008
    Applicant: TAIYO YUDEN CO., LTD.
    Inventors: Masashi Miyazaki, Mitsuhiro Takayama, Tatsuro Sawatari
  • Patent number: 7278205
    Abstract: A multilayer printed wiring board (PWB) including via holes with satisfactory quality without defective shapes like swelling or recession on the end faces is provided. The multilayer PWB includes a build-up board of plural insulation layers as the main structure. In each of the insulation layers, via holes (columnar conductors) for electrically connecting between conductor circuits on the base layer or adjacent layers are formed. The via holes are formed by patterning metal foil with conductivity. The height “H” of the via holes (dimension in the thickness direction of the via hole forming layer) depends on the thickness “D” of the original metal foil only. Accordingly, the via holes can be formed without carrying out filling with conductive paste or electrolytic plating. Thus, multilayer PWB having via holes with satisfactory quality without defective shapes like swelling or recession on the end faces can be manufactured.
    Type: Grant
    Filed: August 7, 2003
    Date of Patent: October 9, 2007
    Assignee: Taiyo Yuden Co., Ltd.
    Inventors: Masashi Miyazaki, Mitsuhiro Takayama, Tatsuro Sawatari, Takatoshi Murota
  • Publication number: 20070029109
    Abstract: A multilayer printed wiring board (PWB) including via holes with satisfactory quality without defective shapes like swelling or recession on the end faces is provided. The multilayer PWB includes a build-up board of plural insulation layers as the main structure. In each of the insulation layers, via holes (columnar conductors) for electrically connecting between conductor circuits on the base layer or adjacent layers are formed. The via holes are formed by patterning metal foil with conductivity. The height “H” of the via holes (dimension in the thickness direction of the via hole forming layer) depends on the thickness “D” of the original metal foil only. Accordingly, the via holes can be formed without carrying out filling with conductive paste or electrolytic plating. Thus, multilayer PWB having via holes with satisfactory quality without defective shapes like swelling or recession on the end faces can be manufactured.
    Type: Application
    Filed: October 13, 2006
    Publication date: February 8, 2007
    Inventors: Masashi Miyazaki, Mitsuhiro Takayama, Tatsuro Sawatari, Takatoshi Murota
  • Publication number: 20060255440
    Abstract: A composite multi-layer substrate comprising a flat plate-like core member formed of a material having an excellent electric conductivity, an excellent heat conductivity, and a high rigidity, a front resin layer and a rear resin layer covering at least the front and rear surfaces of the core member, and a bottomless hole formed in the core member through the front and rear sides of the core member, wherein an electronic component is installed in the bottomless hole, whereby since the strength of the composite multi-layer substrate can be assured by the rigidity of the core member, conventional prior art glass cloth can be eliminated, deterioration in the electric characteristics caused by ion migration can be avoided and will result in reduced production cost.
    Type: Application
    Filed: May 27, 2003
    Publication date: November 16, 2006
    Applicant: TAIYO YUDEN CO., LTD
    Inventors: Masashi Miyazaki, Mitsuhiro Takayama, Tatsuro Sawatari
  • Publication number: 20060016620
    Abstract: A multilayer printed wiring board (PWB) including via holes with satisfactory quality without defective shapes like swelling or recession on the end faces is provided. The multilayer PWB includes a build-up board of plural insulation layers as the main structure. In each of the insulation layers, via holes (columnar conductors) for electrically connecting between conductor circuits on the base layer or adjacent layers are formed. The via holes are formed by patterning metal foil with conductivity. The height “H” of the via holes (dimension in the thickness direction of the via hole forming layer) depends on the thickness “D” of the original metal foil only. Accordingly, the via holes can be formed without carrying out filling with conductive paste or electrolytic plating. Thus, multilayer PWB having via holes with satisfactory quality without defective shapes like swelling or recession on the end faces can be manufactured.
    Type: Application
    Filed: August 7, 2003
    Publication date: January 26, 2006
    Inventors: Masashi Miyazaki, Mitsuhiro Takayama, Tatsuro Sawatari, Takashi Murota
  • Publication number: 20050255303
    Abstract: Components having different heights are installed in a multilayer substrate using a metal core layer formed by bonding a plurality of metal layers. The metal core layer includes through-holes and a spot-faced portion. Passive components and an active component are disposed in the through-holes and the spot-faced portion, respectively. These components are connected to conductive patterns formed on wiring layers, with connecting vias therebetween. Contact faces of each component with the connecting vias are controlled so as to be disposed at the same level with the metal layers.
    Type: Application
    Filed: April 25, 2005
    Publication date: November 17, 2005
    Inventors: Tatsuro Sawatari, Masashi Miyazaki