Abstract: A high frequency amplifier includes an asymmetrical Doherty amplifier having a carrier amplifier, a peak amplifier, a branch circuit, and a phase adjusting circuit, a driver amplifier, and a base member mounting a first circuit board mounting the driver amplifier, the carrier amplifier, and the peak amplifier and a second circuit board mounting the circuits. The branch circuit divides a path of a RF signal into input paths of the peak and carrier amplifiers. The driver amplifier, the carrier amplifier, and the peak amplifier have rear surfaces in contact with the base member. The electrical length from the output terminal of the driver amplifier to the input terminal of the peak amplifier, when converted based on a phase of the signal, is from (2n+1)×???/4 to (2n+1)×?+?/4, where n is an integer greater than or equal to zero.

Abstract: A high frequency amplifier includes an asymmetrical Doherty amplifier having a carrier amplifier, a peak amplifier, a branch circuit, and a phase adjusting circuit, a driver amplifier, and a base member mounting a first circuit board mounting the driver amplifier, the carrier amplifier, and the peak amplifier and a second circuit board mounting the circuits. The branch circuit divides a path of a RF signal into input paths of the peak and carrier amplifiers. The driver amplifier, the carrier amplifier, and the peak amplifier have rear surfaces in contact with the base member. The electrical length from the output terminal of the driver amplifier to the input terminal of the peak amplifier, when converted based on a phase of the signal, is from (2n+1)×???/4 to (2n+1)×?+?/4, where n is an integer greater than or equal to zero.

Abstract: A method of manufacturing a high-frequency device includes mounting a first chip having a first pillar on an upper surface thereof on a metal base, forming an insulator layer covering the first chip on the metal base, exposing an upper surface of the first pillar from the insulator layer, and forming a first wiring connected to the first pillar on the insulator layer and transmitting a high-frequency signal.

Abstract: A semiconductor device includes a metal plate having a base portion and a terminal portion separated from the base portion, a resin layer provided between the base portion and the terminal portion and so as to surround the metal plate in a planar direction, and at which an upper and a lower surface of each of the base portion and the terminal portion are exposed, a semiconductor chip mounted on the base portion, a first electrically insulating layer provided on the metal plate and the resin layer so as to cover the semiconductor chip, and one or more wires provided on the first electrically insulating layer and including at least one wire configured to electrically connect the semiconductor chip and the terminal portion to each other.

Abstract: A high-frequency device includes a metal base, a dielectric substrate mounted on the metal base, an insulator layer provided on the metal base, covering the dielectric substrate, and having a dielectric constant smaller than that of the dielectric substrate, and a first line that overlaps the dielectric substrate as seen from a thickness direction of the insulator layer and is provided on an upper surface of the insulator layer to form a first microstrip line.

Abstract: An amplifier circuit includes a first amplifier that amplifies a high frequency signal, and a load circuit that changes a load impedance of the first amplifier without being controlled by an external circuit so that a saturation power at a first temperature is higher than a saturation power at a second temperature lower than the first temperature, and an efficiency at the first temperature is lower than an efficiency at the second temperature.

Abstract: A high frequency amplifier includes an asymmetric Doherty amplifier configured to amplify a high frequency signal having a wavelength A, the high frequency signal being input, and the asymmetric Doherty amplifier including a carrier amplifier and a peak amplifier, the peak amplifier being configured to start an amplifying operation when an output of the carrier amplifier reaches a saturation region and having a saturation output different from a saturation output of the carrier amplifier, a driver amplifier configured to drive the asymmetric Doherty amplifier, a branch circuit configured to branch the high frequency signal amplified by the driver amplifier into an input path on a peak amplifier side and an input path on a carrier amplifier side, a phase adjustment circuit configured to delay either a phase of a signal input to the peak amplifier or a phase of a signal input to the carrier amplifier, the phase adjustment circuit being provided on either the input path on the peak amplifier side or the input pa

Abstract: A high-frequency amplifier includes a driver amplifier configured to amplify an input high-frequency signal, a Doherty amplifier, including a carrier amplifier and a peak amplifier, and configured to further amplify a signal output from the driver amplifier, a first multilayer substrate, a second multilayer substrate laminated to overlap the first multilayer substrate, and a base member mounted with the first multilayer substrate and the second multilayer substrate, wherein the driver amplifier is mounted on the second multilayer substrate, the carrier amplifier and the peak amplifier are mounted on the first multilayer substrate, the driver amplifier, the carrier amplifier, and the peak amplifier have a front surface forming a predetermined circuit, and a back surface located on an opposite side from the front surface, respectively, the front surface of the driver amplifier opposes the first multilayer substrate, and the back surface of the driver amplifier is separated from the first multilayer substrate, t

Abstract: Included are: a first power source 3 configured to output a voltage required for a first gate bias voltage for turning a power amplifier 2 to an ON state; a second power source 4 configured to output a voltage required for a second gate bias voltage for turning the power amplifier 2 to an OFF state; a changeover switch 5 connected between the first power source 3 and the power amplifier 2 and configured to supply either the first gate bias voltage or the second gate bias voltage to the power amplifier 2 by switching a state between the first power source 3 and the power amplifier 2 to either an open state or a short-circuit state on the basis of a control signal related to on-off control of the power amplifier 2; and a resistance value varying unit 15 connected between the second power source 4 and the power amplifier 2 and configured such that a resistance value thereof is variable.

Abstract: A multistage amplifier includes: N amplifiers (N?2), a (k+1)th amplifier cascaded to a kth amplifier (1?k?N?1), and each amplifier being configured to amplify a multicarrier signal; and an extraction circuit including an input and an output, the input being connected to an output of a jth amplifier (1?j?N?1), and the output providing a compensation signal to an input of a (j+1)th amplifier or an output of the (j+1)th amplifier. The extraction circuit includes a filter circuit connected to the output of the jth amplifier that extracts a distortion frequency component of n times a differential frequency f2?f1 (n?1), a phase shifter cascaded to the filter circuit that shifts a phase of the component, and a gain adjustment circuit cascaded to the phase shifter that adjusts an amplitude of the component and generates the compensation signal.

Abstract: A high frequency amplifier includes an asymmetrical Doherty amplifier having a carrier amplifier, a peak amplifier, a branch circuit, and a phase adjusting circuit, a driver amplifier, and a base member mounting a first circuit board mounting the driver amplifier, the carrier amplifier, and the peak amplifier and a second circuit board mounting the circuits. The branch circuit divides a path of a RF signal into input paths of the peak and carrier amplifiers. The driver amplifier, the carrier amplifier, and the peak amplifier have rear surfaces in contact with the base member. The electrical length from the output terminal of the driver amplifier to the input terminal of the peak amplifier, when converted based on a phase of the signal, is from (2n+1)×???/4 to (2n+1)×?+?/4, where n is an integer greater than or equal to zero.

Abstract: A semiconductor device includes an insulating substrate having a first surface, a semiconductor chip that is embedded in the insulating substrate and has a second surface exposed in the first surface, and a heat dissipation layer that is in contact with the first surface and the second surface and has a plated layer.

Abstract: Included are: a first power source 3 configured to output a voltage required for a first gate bias voltage for turning a power amplifier 2 to an ON state; a second power source 4 configured to output a voltage required for a second gate bias voltage for turning the power amplifier 2 to an OFF state; a changeover switch 5 connected between the first power source 3 and the power amplifier 2 and configured to supply either the first gate bias voltage or the second gate bias voltage to the power amplifier 2 by switching a state between the first power source 3 and the power amplifier 2 to either an open state or a short-circuit state on the basis of a control signal related to on-off control of the power amplifier 2; and a resistance value varying unit 15 connected between the second power source 4 and the power amplifier 2 and configured such that a resistance value thereof is variable.

Abstract: Included are: a first power source 3 configured to output a voltage required for a first gate bias voltage for turning a power amplifier 2 to an ON state; a second power source 4 configured to output a voltage required for a second gate bias voltage for turning the power amplifier 2 to an OFF state; a changeover switch 5 connected between the first power source 3 and the power amplifier 2 and configured to supply either the first gate bias voltage or the second gate bias voltage to the power amplifier 2 by switching a state between the first power source 3 and the power amplifier 2 to either an open state or a short-circuit state on the basis of a control signal related to on-off control of the power amplifier 2; and a resistance value varying unit 15 connected between the second power source 4 and the power amplifier 2 and configured such that a resistance value thereof is variable.

Abstract: A multistage amplifier includes: N amplifiers (N?2), a (k+1)th amplifier cascaded to a kth amplifier (1?k?N?1), and each amplifier being configured to amplify a multicarrier signal; and an extraction circuit including an input and an output, the input being connected to an output of a jth amplifier (1?j?N?1), and the output providing a compensation signal to an input of a (j+1)th amplifier or an output of the (j+1)th amplifier. The extraction circuit includes a filter circuit connected to the output of the jth amplifier that extracts a distortion frequency component of n times a differential frequency f2?f1 (n?1), a phase shifter cascaded to the filter circuit that shifts a phase of the component, and a gain adjustment circuit cascaded to the phase shifter that adjusts an amplitude of the component and generates the compensation signal.

Abstract: Included are: a first power source 3 configured to output a voltage required for a first gate bias voltage for turning a power amplifier 2 to an ON state; a second power source 4 configured to output a voltage required for a second gate bias voltage for turning the power amplifier 2 to an OFF state; a changeover switch 5 connected between the first power source 3 and the power amplifier 2 and configured to supply either the first gate bias voltage or the second gate bias voltage to the power amplifier 2 by switching a state between the first power source 3 and the power amplifier 2 to either an open state or a short-circuit state on the basis of a control signal related to on-off control of the power amplifier 2; and a resistance value varying unit 15 connected between the second power source 4 and the power amplifier 2 and configured such that a resistance value thereof is variable.

Abstract: The present invention relates to a field-effect transistor which is improved such that the linearity of mutual conductance gm is flattened over a wider range of gate bias. This field-effect transistor is a MESFET comprising a channel layer and a cap layer in Schottky-contact with a gate electrode. In particular, between the channel layer and the cap layer, one or more auxiliary layers having a doping concentration lower than that of the channel layer and higher than that of the cap layer are provided. The doping concentration of one or more auxiliary layers is set such that the doping profile of a laminated structure constituted by the channel layer, one or more auxiliary layers, and cap layer exponentially lowers from the channel layer toward the cap layer. According to this configuration, the depletion layer can effectively be controlled over a wider range of gate bias, the long gate effect and the like are suppressed, and the linearity of mutual conductance gm is improved.

Abstract: A power amplifying module has a package formed by welding a package bottom plate being a package substrate of a generally flat plate shape with a cap being a metal package cap of a generally rectangular box shape. A wiring substrate of a generally flat plate shape is placed on the package bottom plate and this wiring substrate is covered by the cap. There are two through holes formed in the wiring substrate and two heat spreaders of a generally flat plate shape are positioned in portions exposed through the through holes on the package bottom plate. Semiconductor devices sealed with a resin or the like are set by soldering or the like on respective surfaces of these heat spreaders.

Abstract: In an electronic component, an electronic circuit board having an electronic element mounted on the major surface is mounted on a metal frame. The electronic circuit board is covered with a metal lid fitted on the metal frame and contained in a metal package constituted by the metal frame and the metal lid. At least at one notched portion is formed at least at one end of the electronic circuit board. A positioning projection formed on the metal frame engages with the notched portion. The mechanical precision and electrical characteristics are improved, so that an electronic component particularly excellent in high-frequency characteristics, which can be manufactured in simple manufacturing process, can be obtained.

Abstract: A power amplifying module has at least one heat spreader mounted on a package substrate and exposed through a through hole provided in a wiring substrate, and at least one semiconductor chip forming a power amplifying circuit is mounted in a bare chip state on a surface of the at least one heat spreader as electrically connected to an electronic circuit pattern on the wiring substrate. Each of the package substrate and at least one heat spreader is made of a material having a thermal conductivity larger than that of a material making the wiring substrate. The module thus formed can emit the heat generated by the power amplifying module to the outside at high efficiency, thus achieving the power amplifying module with high performance and high reliability.