Patents by Inventor Tatsuya Shimoda

Tatsuya Shimoda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10340388
    Abstract: It is an object of the invention to provide a thin film transistor and a method for producing the same, which will easily achieve self-aligned formation of a source/drain region without through processes under a vacuum or a low pressure or with no use of expensive equipment.
    Type: Grant
    Filed: April 25, 2018
    Date of Patent: July 2, 2019
    Assignees: Japan Advanced Institute of Science and Technology, Sumitomo Seika Chemicals Co., Ltd.
    Inventors: Satoshi Inoue, Tatsuya Shimoda, Nobutaka Fujimoto, Kiyoshi Nishioka, Shuichi Karashima
  • Patent number: 10322975
    Abstract: The present invention provides a method for producing a dispersion of fine ceramic particles, the method comprising: adding fine ceramic particles having a mean particle size of less than 1 ?m to a dispersion medium selected from the group consisting of a lower alcohol and water; and dispersing the fine ceramic particles in the dispersion medium using a rotor-stator homogenizer. The present invention enables the production of a highly homogeneous and stable dispersion of a nanosized ceramic powder, which is prone to aggregation and the homogeneous dispersion of which is difficult to form, by conducting a simple, uncomplicated operation.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: June 18, 2019
    Assignee: KYOTO UNIVERSITY
    Inventors: Tatsuya Hinoki, Kazuya Shimoda
  • Publication number: 20190164719
    Abstract: Provided is a tip capable of repeatedly regenerating a single-atom termination structure in which a distal end is formed of only one atom. A tip (1) having a single-atom termination structure includes: a thin line member (2) made of a first metal material; a protruding portion (4) made of a second metal material, which is formed at least in a distal end portion (2a) of the thin line member (2), and has a distal end terminated with only one atom; and a supply portion (5) made of the second metal material to be supplied to the protruding portion (4), which is formed in the vicinity of the distal end portion (2a) of the thin line member (2).
    Type: Application
    Filed: November 28, 2018
    Publication date: May 30, 2019
    Inventors: Chuhei OSHIMA, Masahiko TOMITORI, Anto YASAKA, Tatsuya SHIMODA
  • Publication number: 20190088501
    Abstract: A laminate by using a paste or solution containing aliphatic polycarbonates having an etching mask function is provided. A method of producing a laminate of the present invention includes a pattern forming step of forming a pattern 80 of a first oxide precursor layer in which a compound of metal to be oxidized into a metal oxide is dispersed in a solution containing a binder (possibly including inevitable impurities) made of aliphatic polycarbonates on an oxide layer 44 or on the second oxide precursor layer to be oxidized into the oxide layer 44; an etching step of, after the pattern forming step, etching the oxide layer 44 or the second oxide precursor layer that is not protected by the pattern 80; and a heating step of, after the etching step, heating the oxide layer 44 or the second oxide precursor layer, and the first oxide precursor layer to a temperature at which the binder is decomposed or higher.
    Type: Application
    Filed: November 21, 2016
    Publication date: March 21, 2019
    Inventors: Satoshi INOUE, Tatsuya SHIMODA, Kazuhiro FUKADA, Kiyoshi NISHIOKA
  • Publication number: 20190041744
    Abstract: [Problem] Provided is a composite member which can contribute to simple formation and/or increased quality of fine wiring. [Solution] A composite member 100 according to one embodiment of the present invention includes a base material, an aliphatic polycarbonate-containing layer with multiple island-shaped portions arranged on the base material, and a metal ink, wherein at least a surface of the aliphatic polycarbonate-containing layer with multiple island-shaped portions has a contact angle of 50° or more between pure water and the surface when exposed to ultraviolet light including a wavelength of 180 nm or more and 370 nm or less for 15 minutes, and the metal ink is arranged on the base material at at least a portion of a region sandwiched by the precursor layers.
    Type: Application
    Filed: July 21, 2016
    Publication date: February 7, 2019
    Inventors: Satoshi INOUE, Tatsuya SHIMODA, Kazuhiro FUKADA, Kiyoshi NISHIOKA, Masahiro SUZUKI
  • Publication number: 20180315861
    Abstract: It is an object of the invention to provide a thin film transistor and a method for producing the same, which will easily achieve self-aligned formation of a source/drain region without through processes under a vacuum or a low pressure or with no use of expensive equipment.
    Type: Application
    Filed: April 25, 2018
    Publication date: November 1, 2018
    Inventors: Satoshi INOUE, Tatsuya SHIMODA, Nobutaka FUJIMOTO, Kiyoshi NISHIOKA, Shuichi KARASHIMA
  • Publication number: 20180248109
    Abstract: The present invention comprises: a step of applying a liquid composition for forming a PZT ferroelectric film; a step of drying the film applied with the liquid composition; a step of irradiating UV rays onto the dried film at a temperature of 150 to 200° C. in an oxygen-containing atmosphere; and after the application step, the drying step, and the UV irradiation step once, or more times, a step of firing for crystallizing a precursor film of the UV-irradiated ferroelectric film by raising a temperature with a rate of 0.5° C./second or higher in an oxygen-containing atmosphere or by raising a temperature with a rate of 0.2° C./second or higher in a non-oxygen containing atmosphere, followed by keeping the temperature at 400 to 500° C. An amount of liquid composition is set such that thickness of the ferroelectric film be 150 nm or more for each application and ozone is supplied during UV irradiation.
    Type: Application
    Filed: August 26, 2016
    Publication date: August 30, 2018
    Inventors: Yuki Tagashira, Reijiro Shimura, Yuzuru Takamura, Jinwang Li, Tatsuya Shimoda, Toshiaki Watanabe, Nobuyuki Soyama
  • Publication number: 20180248047
    Abstract: It is an object of the invention to provide a thin film transistor and a method for producing the same, which will easily achieve self-aligned formation of a source/drain region without through processes under a vacuum or a low pressure or with no use of expensive equipment.
    Type: Application
    Filed: April 25, 2018
    Publication date: August 30, 2018
    Inventors: Satoshi INOUE, Tatsuya SHIMODA, Nobutaka FUJIMOTA, Kiyoshi NISHIOKA, Shuichi KARASHIMA
  • Publication number: 20180248201
    Abstract: An oxide all-solid-state battery excellent in lithium ion conductivity and joint strength between an anode active material layer and solid electrolyte layer thereof. In the oxide all-solid-state battery, the solid electrolyte layer is a layer mainly containing a garnet-type oxide solid electrolyte sintered body represented by the following formula (1): (Lix-3y-z, Ey, Hz)L?M?O?; a solid electrolyte interface layer is disposed between the anode active material layer and the solid electrolyte layer; the solid electrolyte interface layer contains at least a Si element and an O element; and a laminate containing at least the anode active material layer, the solid electrolyte interface layer and the solid electrolyte layer has peaks at positions where 2?=32.3°±0.5°, 37.6°±0.5°, 43.8°±0.5°, and 57.7°±0.5° in a XRD spectrum obtained by XRD measurement using CuK? irradiation.
    Type: Application
    Filed: February 23, 2018
    Publication date: August 30, 2018
    Applicants: JAPAN ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY, TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Tatsuya SHIMODA, Takashi MASUDA, Toshiya SAITO, Shingo OHTA
  • Patent number: 9985137
    Abstract: It is an object of the invention to provide a thin film transistor and a method for producing the same, which will easily achieve self-aligned formation of a source/drain region without through processes under a vacuum or a low pressure or with no use of expensive equipment. An exemplary method for producing a thin film transistor according to the invention includes an aliphatic polycarbonate layer forming step of forming an aliphatic polycarbonate layer 50 that covers a gate electrode layer 40 disposed above a semiconductor layer 20 with a gate insulator 30 being interposed between the gate electrode layer 40 and the semiconductor layer 20, and also covers the semiconductor layer 20, and has a dopant causing the semiconductor layer 20 to become an n-type or p-type semiconductor layer, and a heating step of heating at a temperature causing introduction of the dopant into the semiconductor layer 20 and decomposition of the aliphatic polycarbonate layer 50.
    Type: Grant
    Filed: December 16, 2014
    Date of Patent: May 29, 2018
    Assignees: Japan Advanced Institute of Science and Technology, Sumitomo Seika Chemicals Co., Ltd.
    Inventors: Satoshi Inoue, Tatsuya Shimoda, Nobutaka Fujimoto, Kiyoshi Nishioka, Shuichi Karashima
  • Publication number: 20180096853
    Abstract: The etching mask 80 for screen printing according to one embodiment of the present invention includes aliphatic polycarbonate. Further, the method of producing an oxide layer (the channel 44) according to one embodiment of the present invention includes: an etching-mask forming step of forming a pattern of the etching mask 80 including aliphatic polycarbonate; a contact step of, after the etching-mask forming step, contacting the oxide layer with a solution for dissolving a portion of the oxide layer (the channel 44) which is not protected by the etching mask 80; and a heating step of, after the contact step, heating the oxide layer (the channel 44) and the etching mask 80 to or above a temperature at which the etching mask 80 is decomposed.
    Type: Application
    Filed: March 14, 2016
    Publication date: April 5, 2018
    Inventors: Satoshi INOUE, Tatsuya SHIMODA, Kazuhiro FUKADA, Kiyoshi NISHIOKA, Nobutaka FUJIMOTO, Masahiro SUZUKI
  • Patent number: 9929188
    Abstract: According to the present invention, a method of producing a functional device includes the imprinting step and the functional solid material layer formation step. In the imprinting step, a functional solid material precursor layer obtained from a functional solid material precursor solution as a start material is imprinted so that a first temperature of a heat source for supplying heat to the functional solid material precursor layer is higher than a second temperature of the functional solid material precursor layer in at least part of a time period while a mold for forming an imprinted structure is pressed against the functional solid material precursor layer. In the functional solid material layer formation step, after the imprinting step, the functional solid material precursor layer is heat treated at a third temperature higher than the first temperature in an atmosphere containing oxygen to form a functional solid material layer from the functional solid material precursor layer.
    Type: Grant
    Filed: November 7, 2012
    Date of Patent: March 27, 2018
    Assignee: Japan Science and Technology Agency
    Inventors: Tatsuya Shimoda, Toshihiko Kaneda
  • Patent number: 9876067
    Abstract: The invention provides a dielectric layer having high relative permittivity with low leakage current and excellent flatness. A dielectric layer 30a according to the invention is made of multilayer oxide including a first oxide layer 31 made of oxide consisting of bismuth (Bi) and niobium (Nb) or oxide consisting of bismuth (Bi), zinc (Zn), and niobium (Nb) (possibly including inevitable impurities) and a second oxide layer 32 made of oxide of one type (possibly including inevitable impurities) selected from the group of oxide consisting of lanthanum (La) and tantalum (Ta), oxide consisting of lanthanum (La) and zirconium (Zr), and oxide consisting of strontium (Sr) and tantalum (Ta).
    Type: Grant
    Filed: March 12, 2014
    Date of Patent: January 23, 2018
    Assignee: JAPAN SCIENCE AND TECHNOLOGY AGENCY
    Inventors: Tatsuya Shimoda, Eisuke Tokumitsu, Masatoshi Onoue, Takaaki Miyasako
  • Publication number: 20170355613
    Abstract: [Problem] Provided is an oxide dielectric having superior properties, and a solid state electronic device (for example, a high pass filter, a patch antenna, a capacitor, a semiconductor device, or a microelectromechanical system) including the oxide dielectric. [Solution] The oxide layer 30 according to the present invention includes an oxide (possibly including inevitable impurities) consisting essentially of bismuth (Bi) and niobium (Nb) and having a crystal phase of the pyrochlore-type crystal structure, in which the number of atoms of the above niobium (Nb) is 1.3 or more and 1.7 or less when the number of atoms of the above bismuth (Bi) is assumed to be 1.
    Type: Application
    Filed: December 24, 2014
    Publication date: December 14, 2017
    Inventors: Tatsuya SHIMODA, Satoshi INOUE, Tomoki ARIGA
  • Patent number: 9842916
    Abstract: The invention provides an oxide semiconductor layer that has less cracks and is excellent in electrical property and stability, as well as a semiconductor element and an electronic device each including the oxide semiconductor layer. The invention provides an exemplary method of producing an oxide semiconductor layer, and the method includes the precursor layer forming step of forming, on or above a substrate, a layered oxide semiconductor precursor including a compound of metal to be oxidized into an oxide semiconductor dispersed in a solution including a binder made of aliphatic polycarbonate, and the annealing step of heating the precursor layer at a first temperature achieving decomposition of 90 wt % or more of the binder, and then annealing the precursor layer at a temperature equal to or higher than a second temperature (denoted by X) that is higher than the first temperature, achieves bonding between the metal and oxygen, and has an exothermic peak value in differential thermal analysis (DTA).
    Type: Grant
    Filed: December 13, 2016
    Date of Patent: December 12, 2017
    Assignees: JAPAN ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY, SUMITOMO SEIKA CHEMICALS CO., LTD.
    Inventors: Satoshi Inoue, Tatsuya Shimoda, Tomoki Kawakita, Nobutaka Fujimoto, Kiyoshi Nishioka
  • Publication number: 20170335461
    Abstract: An aliphatic polycarbonate, an oxide precursor, and an oxide layer are provided, which are capable of controlling stringiness, when a thin film that can be employed for an electronic device or a semiconductor element is formed by a printing method. In an oxide precursor of the present invention, a compound of metal to be oxidized into a metal oxide is dispersed in a solution containing a binder (possibly including inevitable impurities) made of aliphatic polycarbonates, and an aliphatic polycarbonate having a molecular weight of 6000 or more and 400000 or less constitutes 80% by mass or more of all the aliphatic polycarbonates.
    Type: Application
    Filed: October 5, 2015
    Publication date: November 23, 2017
    Inventors: Tatsuya SHIMODA, Satoshi INOUE, Kazuhiro FUKADA, Kiyoshi NISHIOKA, Nobutaka FUJIMOTO, Masahiro SUZUKI
  • Patent number: 9688014
    Abstract: A transfer system (1) for transferring a fine transfer pattern (M1) formed in a mold (M) to a to-be-molded material (D) provided on a substrate (W) includes a positioning device (3) configured to position the substrate (W) relative to the mold (M) and to bond the mold (M) and the substrate (W) together after the positioning, and a transfer device (5) provided separately from the positioning device (3) and configured to receive the mold (M) and the substrate (W) positioned and bonded together by the positioning device (3), and to cure the to-be-molded material (D) while pressing the mold (M) and the substrate (W) thereby to perform transfer.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: June 27, 2017
    Assignee: TOSHIBA KIKAI KABUSHIKI KAISHA
    Inventors: Tatsuya Shimoda, Mitsunori Kokubo, Yuki Sugiura
  • Publication number: 20170162324
    Abstract: There are provided an oxide dielectric having excellent properties and a solid state electronic device (e.g., a capacitor, a semiconductor device, or a small electromechanical system) having such an oxide dielectric. An oxide layer 30 includes an oxide dielectric (possibly including inevitable impurities) including bismuth (Bi) and niobium (Nb) and having a first crystal phase of a pyrochlore-type crystal structure and a second crystal phase of a ?-BiNbO4-type crystal structure. The oxide layer 30 has a controlled content of the first crystal phase and a controlled content of the second crystal phase, in which the first crystal phase has a dielectric constant that decreases with increasing temperature of the oxide layer 30 in a temperature range of 25° C. or more and 120° C. or less, and the second crystal phase has a dielectric constant that increases with increasing temperature of the oxide layer 30 in the temperature range.
    Type: Application
    Filed: July 10, 2015
    Publication date: June 8, 2017
    Applicant: Japan Advanced Institute of Science and Technology
    Inventors: Tatsuya SHIMODA, Satoshi INOUE, Tomoki ARIGA
  • Patent number: 9653306
    Abstract: The present invention is directed to a method for forming a crystalline cobalt silicide film, comprising the steps of: applying to a surface made of silicon a composition obtained by mixing a compound represented by the following formula (1A) or (1B): SinX2n+2??(1A) SimX2m??(1B) wherein each X in the formulas (1A) and (1B) is a hydrogen atom or a halogen atom, n is an integer of 1 to 10, and m is an integer of 3 to 10, or a polymer thereof with a zero-valent cobalt complex to form a coating film; heating the coated film at 550 to 900° C. so as to form a two-layer film which is composed of a first layer made of a crystalline cobalt silicide on the surface made of silicon and a second layer containing silicon atoms, oxygen atoms, carbon atoms and cobalt atoms on the first layer; and removing the second layer of the two-layer film.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: May 16, 2017
    Assignees: JAPAN SCIENCE AND TECHNOLOGY AGENCY, JSR CORPORATION
    Inventors: Tatsuya Shimoda, Yasuo Matsuki, Ryo Kawajiri
  • Publication number: 20170133517
    Abstract: A thin film transistor 100 according to the invention includes a gate electrode 20, a channel 44, and a gate insulating layer 34 provided between the gate electrode 20 and the channel 44 and made of oxide (possibly containing inevitable impurities, this applies to oxide hereinafter) containing lanthanum and zirconium. The channel 44 is made of channel oxide including first oxide containing indium, zinc, and zirconium (Zr) having an atomic ratio of 0.015 or more and 0.075 or less relative to indium assumed to be 1 in atomic ratio, second oxide containing indium and zirconium (Zr) having an atomic ratio of 0.055 or more and 0.16 or less relative to the indium (In) assumed to be 1 in atomic ratio, or third oxide containing indium and lanthanum having an atomic ratio of 0.055 or more and 0.16 or less relative to the indium (In) assumed to be 1 in atomic ratio.
    Type: Application
    Filed: November 15, 2016
    Publication date: May 11, 2017
    Inventors: Tatsuya SHIMODA, Satoshi INOUE, Tue Trong PHAN, Takaaki MIYASAKO, Jinwang Li