Abstract: By bringing a tip of an AFM into contact with the surface of a GaAs substrate or an AlGaAs substrate, for example, applying a negative bias to the tip, and applying a positive bias to the GaAs substrate or the AlGaAs substrate, a donut-shaped oxide film is formed. Then, the oxide film is removed. As a result, a ring-shaped groove is formed in the surface of the GaAs substrate or the AlGaAs substrate. The oxide film can be removed by chemical etching, ultrasonic cleaning with water, a treatment with atomic hydrogen in a vacuum, or the like. Thereafter, a semiconductor film (InAs film or InGaAs film, for example) is epitaxially grown in the groove. Then, a capping layer which covers the semiconductor film and the GaAs substrate or the AlGaAs substrate is formed.

Abstract: A single-photon generator includes an exciton generation part including therein a quantum dot, an excitation part for generating an exciton in the exciton generator part, a recombination control part for controlling recombination timing of the exciton in the exciton generation part, and an optical window provided in the exciton generation part so as to pass a single photon formed as a result of recombination of the exciton, wherein the recombination control part causes, in the exciton generation part, recombination of the excitons at longer intervals than a recombination lifetime of a exciton molecule.

Abstract: By bringing a tip of an AFM into contact with the surface of a GaAs substrate or an AlGaAs substrate, for example, applying a negative bias to the tip, and applying a positive bias to the GaAs substrate or the AlGaAs substrate, a donut-shaped oxide film is formed. Then, the oxide film is removed. As a result, a ring-shaped groove is formed in the surface of the GaAs substrate or the AlGaAs substrate. The oxide film can be removed by chemical etching, ultrasonic cleaning with water, a treatment with atomic hydrogen in a vacuum, or the like. Thereafter, a semiconductor film (InAs film or InGaAs film, for example) is epitaxially grown in the groove. Then, a capping layer which covers the semiconductor film and the GaAs substrate or the AlGaAs substrate is formed.

Abstract: A semiconductor device has: an isolation region formed on a semiconductor substrate and defining a continuous active region including a select transistor region and a direct tunnel element region; a gate insulating film formed on a channel region of the select transistor region; a tunnel insulating film formed on a partial area of the direct tunnel element region and having a thickness different from a thickness of the gate insulating film; a continuous floating gate electrode formed above the gate insulating film and the tunnel insulating film; an inter-electrode insulating film formed on a surface of the floating gate electrode; a control gate electrode facing the floating gate electrode via the inter-electrode insulating film; and a pair of source/drain regions formed on both sides of the channel region of the select transistor region and not overlapping the tunnel insulating film.

Abstract: A direct-tunneling semiconductor memory device includes a device isolation structure formed on a semiconductor substrate, including a device isolation trench and a device isolation insulation film filling the device isolation trench, a dielectric film covering both sidewall surfaces and a top surface of a floating gate electrode formed on the semiconductor substrate, a conductive part provided on the sidewall surfaces of the floating gate electrode via the dielectric film, the conductor part constituting a part of a control gate electrode, and first and second diffusion regions formed at respective lateral sides of the floating gate electrode, wherein the first and second diffusion regions are formed on a surface of the device isolation groove with offset from a region right underneath the floating gate electrode, the conductive part is formed in the device region with offset from the device isolation trench.

Abstract: A direct-tunneling semiconductor memory device includes a device isolation structure formed on a semiconductor substrate, including a device isolation trench and a device isolation insulation film filling the device isolation trench, a dielectric film covering both sidewall surfaces and a top surface of a floating gate electrode formed on the semiconductor substrate, a conductive part provided on the sidewall surfaces of the floating gate electrode via the dielectric film, the conductor part constituting a part of a control gate electrode, and first and second diffusion regions formed at respective lateral sides of the floating gate electrode, wherein the first and second diffusion regions are formed on a surface of the device isolation groove with offset from a region right underneath the floating gate electrode, the conductive part is formed in the device region with offset from the device isolation trench.

Abstract: In a photoelectric conversion element which generates electrical signals upon the incidence of light, a superlattice structure having a metal layer or metal silicide layer and a polysilicon layer is formed on a silicon substrate, the photoelectric conversion element has a three-terminal structure in which the metal layer or metal silicide layer at the upper edge of the superlattice structure is the first terminal, the lower edge of the superlattice structure is the second terminal, and the silicon substrate is the third terminal. In this photoelectric conversion element, for example, a superlattice structure, in which metal layers (or metal silicide layers) of thickness approximately several nm and polysilicon layers which are at least thicker than this are formed in alternation in a multilayer structure, is formed on a silicon semiconductor substrate.

Abstract: A semiconductor device has: an isolation region formed on a semiconductor substrate and defining a continuous active region including a select transistor region and a direct tunnel element region; a gate insulating film formed on a channel region of the select transistor region; a tunnel insulating film formed on a partial area of the direct tunnel element region and having a thickness different from a thickness of the gate insulating film; a continuous floating gate electrode formed above the gate insulating film and the tunnel insulating film; an inter-electrode insulating film formed on a surface of the floating gate electrode; a control gate electrode facing the floating gate electrode via the inter-electrode insulating film; and a pair of source/drain regions formed on both sides of the channel region of the select transistor region and not overlapping the tunnel insulating film.

Abstract: Provided is an optical semiconductor device, which includes a GaAs substrate (or a semiconductor substrate) 20; an n-type contact layer (or a doping layer) 21 formed on one surface 20a of the GaAs substrate 20; an active layer 25 formed on top of the n-type contact layer 21 and including at least one quantum dot 23; a p-type contact layer (or a contact layer) 26 formed on top of the active layer 25 and being of an opposite conduction type to the n-type contact layer 21; an insulating layer 29 formed on top of the p-type contact layer 26 and including a first opening 29a whose size is such that a contact region CR of the p-type contact layer 26 lies within the first opening 29a; a p-side electrode layer 33c formed on top of the contact region CR of the p-type contact layer 26 and on top of the insulating layer 29 and including a second opening 33a lying within the first opening 29a; and a n-side electrode layer (or a second electrode layer) 37 formed on the other surface 20b of the GaAs substrate 20.

Abstract: A semiconductor device has: an isolation region formed on a semiconductor substrate and defining a continuous active region including a select transistor region and a direct tunnel element region; a gate insulating film formed on a channel region of the select transistor region; a tunnel insulating film formed on a partial area of the direct tunnel element region and having a thickness different from a thickness of the gate insulating film; a continuous floating gate electrode formed above the gate insulating film and the tunnel insulating film; an inter-electrode insulating film formed on a surface of the floating gate electrode; a control gate electrode facing the floating gate electrode via the inter-electrode insulating film; and a pair of source/drain regions formed on both sides of the channel region of the select transistor region and not overlapping the tunnel insulating film.

Abstract: A direct-tunneling semiconductor memory device includes a device isolation structure formed on a semiconductor substrate, including a device isolation trench and a device isolation insulation film filling the device isolation trench, a dielectric film covering both sidewall surfaces and a top surface of a floating gate electrode formed on the semiconductor substrate, a conductive part provided on the sidewall surfaces of the floating gate electrode via the dielectric film, the conductor part constituting a part of a control gate electrode, and first and second diffusion regions formed at respective lateral sides of the floating gate electrode, wherein the first and second diffusion regions are formed on a surface of the device isolation groove with offset from a region right underneath the floating gate electrode, the conductive part is formed in the device region with offset from the device isolation trench.

Abstract: A single-photon generator includes a single-photon generating device generating a single-photon pulse having a wavelength on the shorter wavelength side than a communication wavelength band, and a single-photon wavelength conversion device performing wavelength conversion of the single-photon pulse into a single-photon pulse of the communication wavelength band, using pump pulse light for single-photon wavelength conversion.

Abstract: A single-photon generating device is configured to have a solid substrate including abase portion, and a pillar portion which is formed on the surface side of the base portion with a localized level existent in the vicinity of the tip of the base portion. The above pillar portion is formed to have a larger cross section on the base portion side than the cross section on the tip side, so that the light generated from the localized level is reflected on the surface, propagated inside the pillar portion, and output from the back face side of the base portion.

Abstract: A private key delivery system and a private key delivery method are disclosed. The private key delivery system includes a transmitter, a receiver, and an optical transmission line connecting the transmitter and the receiver. The transmitter includes a single photon generating unit for simultaneously generating two or more single photons having different wavelengths using a quantum dot structure that has quantum dots of various sizes, an optical splitter for splitting the single photons by wavelengths, a phase modulating unit for modulating each of the single photons split by the wavelengths with private key information, and an optical multiplexer for multiplexing the modulated single photons of the different wavelength and for transmitting the multiplexed single photons to the optical transmission line. The multiplexed single photons are received by the receiver, and the private key information is taken out from the received single photons.

Abstract: By bringing a tip of an AFM into contact with the surface of a GaAs substrate or an AlGaAs substrate, for example, applying a negative bias to the tip, and applying a positive bias to the GaAs substrate or the AlGaAs substrate, a donut-shaped oxide film is formed. Then, the oxide film is removed. As a result, a ring-shaped groove is formed in the surface of the GaAs substrate or the AlGaAs substrate. The oxide film can be removed by chemical etching, ultrasonic cleaning with water, a treatment with atomic hydrogen in a vacuum, or the like. Thereafter, a semiconductor film (InAs film or InGaAs film, for example) is epitaxially grown in the groove. Then, a capping layer which covers the semiconductor film and the GaAs substrate or the AlGaAs substrate is formed.

Abstract: A direct-tunneling semiconductor memory device includes a device isolation structure formed on a semiconductor substrate, including a device isolation trench and a device isolation insulation film filling the device isolation trench, a dielectric film covering both sidewall surfaces and a top surface of a floating gate electrode formed on the semiconductor substrate, a conductive part provided on the sidewall surfaces of the floating gate electrode via the dielectric film, the conductor part constituting a part of a control gate electrode, and first and second diffusion regions formed at respective lateral sides of the floating gate electrode, wherein the first and second diffusion regions are formed on a surface of the device isolation groove with offset from a region right underneath the floating gate electrode, the conductive part is formed in the device region with offset from the device isolation trench.

Abstract: The present invention provides, for example, a target detecting device comprising a target capturer, means for releasing the target capturer, light irradiating means and light detecting means, the target capturer at least partially containing a region interactive with an electrically conductive member, being capable of capturing a target, and being capable of emitting light upon irradiation with light in the case of not interacting with the electrically conductive member, the means for releasing the target capturer serving to release the target capturer from the electrically conductive member by ceasing the interaction between the target capturer and the electrically conductive member, the light irradiating means serving to apply light to the electrically conductive member, and the light detecting means serving to detect light emitted by the target capturer upon irradiation of light applied by the light irradiating means.

Abstract: A molecule-releasing apparatus includes a releasing unit configured to release molecules, wherein the releasing unit comprises at least one conductive member and releases molecules electrically interacting with the conductive member to which a potential is applied, from the conductive member by changing the potential so as to remove the interaction. In a moleculue-releasing method, molecules electrically attracted to two or more conductive members are released by electrical repulsion from the conductive members at different times. The molecule-releasing apparatus and molecule-releasing method are capable of efficiently releasing or transferring various useful molecules such as DNA molecules, into targets such as cells and can be safely applied for use in gene therapy and other applications.

Abstract: A semiconductor device has: an isolation region formed on a semiconductor substrate and defining a continuous active region including a select transistor region and a direct tunnel element region; a gate insulating film formed on a channel region of the select transistor region; a tunnel insulating film formed on a partial area of the direct tunnel element region and having a thickness different from a thickness of the gate insulating film; a continuous floating gate electrode formed above the gate insulating film and the tunnel insulating film; an inter-electrode insulating film formed on a surface of the floating gate electrode; a control gate electrode facing the floating gate electrode via the inter-electrode insulating film; and a pair of source/drain regions formed on both sides of the channel region of the select transistor region and not overlapping the tunnel insulating film.

Abstract: A tunneling insulating film is formed on the partial surface area of a semiconductor substrate. A floating gate electrode is formed on the tunneling insulating film. A gate insulating film covers the side wall of the floating gate electrode and a partial surface area of the semiconductor substrate on both sides of the floating gate electrode. A first control gate electrode is disposed on the gate insulating film over the side wall of the floating gate electrode and over a partial surface area of the semiconductor substrate on both sides of the floating gate electrode. A pair of impurity doped regions is formed in a surface layer of the semiconductor substrate on both sides of a gate structure including the floating gate structure and first control gate structure.