Abstract: Systems and techniques are provided for conserving resources when performing motion estimation. An example process can include determining, based on an input image and a reference image, motion vectors identifying motion between the input image and the reference image; determining whether the motion indicated by the motion vectors is below a first threshold; based on a determination that the motion indicated by the motion vectors is below the first threshold, refraining from determining a local motion between the input image and the reference image; determining a transform matrix based on the motion vectors and without using a local motion between the input image and the reference image; and adjusting the input image based on the transform matrix.

Abstract: Techniques and systems are provided for machine-learning based image stabilization. In some examples, a system obtains a sequence of frames captured by an image capture device during a period of time, and collects motion sensor measurements calculated by a motion sensor associated with the image capture device based on movement of the image capture device during the period of time. The system generates, using a deep learning network and the motion sensor measurements, parameters for counteracting motions in one or more frames in the sequence of frames, the motions resulting from the movement of the image capture device during the period of time. The system then adjusts the one or more frames in the sequence of frames according to the parameters to generate one or more adjusted frames having a reduction in at least some of the motions in the one or more frames.

Abstract: Techniques and systems are provided for machine-learning based image stabilization. In some examples, a system obtains a sequence of frames captured by an image capture device during a period of time, and collects motion sensor measurements calculated by a motion sensor associated with the image capture device based on movement of the image capture device during the period of time. The system generates, using a deep learning network and the motion sensor measurements, parameters for counteracting motions in one or more frames in the sequence of frames, the motions resulting from the movement of the image capture device during the period of time. The system then adjusts the one or more frames in the sequence of frames according to the parameters to generate one or more adjusted frames having a reduction in at least some of the motions in the one or more frames.

Abstract: Techniques and systems are provided for machine-learning based image stabilization. In some examples, a system obtains a sequence of frames captured by an image capture device during a period of time, and collects motion sensor measurements calculated by a motion sensor associated with the image capture device based on movement of the image capture device during the period of time. The system generates, using a deep learning network and the motion sensor measurements, parameters for counteracting motions in one or more frames in the sequence of frames, the motions resulting from the movement of the image capture device during the period of time. The system then adjusts the one or more frames in the sequence of frames according to the parameters to generate one or more adjusted frames having a reduction in at least some of the motions in the one or more frames.

Abstract: Various aspects include methods for managing memory subsystems on a computing device. Various aspect methods may include determining a period of time to force a memory subsystem on the computing device into a low power mode, inhibiting memory access requests to the memory subsystem during the determined period of time, forcing the memory subsystem into the low power mode for the determined period of time, and executing the memory access requests to the memory subsystem inhibited during the determined period of time in response to expiration of the determined period of time.

Abstract: Techniques and systems are provided for machine-learning based image stabilization. In some examples, a system obtains a sequence of frames captured by an image capture device during a period of time, and collects motion sensor measurements calculated by a motion sensor associated with the image capture device based on movement of the image capture device during the period of time. The system generates, using a deep learning network and the motion sensor measurements, parameters for counteracting motions in one or more frames in the sequence of frames, the motions resulting from the movement of the image capture device during the period of time. The system then adjusts the one or more frames in the sequence of frames according to the parameters to generate one or more adjusted frames having a reduction in at least some of the motions in the one or more frames.

Abstract: This disclosure describes techniques for reducing power consumption of a display device. According to these techniques, a display device is configured to determine whether an image to be displayed by the display device has become static. In response to identifying such a static image, the display device may operate in a static image mode. According to the static image mode, the display device may read a current frame of image data, modify the current frame of image data to generate a modified frame of image data with a reduced size, and store the modified image data in memory. The display device may read the modified image data from memory to present the static image, which may reduce power consumption of the display device.

Abstract: Various aspects include methods for managing memory subsystems on a computing device. Various aspect methods may include determining a period of time to force a memory subsystem on the computing device into a low power mode, inhibiting memory access requests to the memory subsystem during the determined period of time, forcing the memory subsystem into the low power mode for the determined period of time, and executing the memory access requests to the memory subsystem inhibited during the determined period of time in response to expiration of the determined period of time.

Abstract: Various aspects include methods for managing memory subsystems on a computing device. Various aspect methods may include determining a period of time to force a memory subsystem on the computing device into a low power mode, inhibiting memory access requests to the memory subsystem during the determined period of time, forcing the memory subsystem into the low power mode for the determined period of time, and executing the memory access requests to the memory subsystem inhibited during the determined period of time in response to expiration of the determined period of time.

Abstract: Various aspects include methods for managing memory subsystems on a computing device. Various aspect methods may include determining a period of time to force a memory subsystem on the computing device into a low power mode, inhibiting memory access requests to the memory subsystem during the determined period of time, forcing the memory subsystem into the low power mode for the determined period of time, and executing the memory access requests to the memory subsystem inhibited during the determined period of time in response to expiration of the determined period of time.

Abstract: An integrated circuit is provided with a low-power island including embedded memory power domains that may selectively couple to either an active-mode power supply voltage supplied on a first power rail or to a sleep-mode power supply voltage supplied on a second power rail.

Abstract: An integrated circuit is provided with a low-power island including embedded memory power domains that may selectively couple to either an active-mode power supply voltage supplied on a first power rail or to a sleep-mode power supply voltage supplied on a second power rail.

Abstract: A dynamic bypass capacitance is provided for a power rail. The dynamic bypass capacitance equals a first bypass capacitance during an idle mode for a digital core powered by the power rail. During an active mode for the digital core, the dynamic bypass capacitance equals a second bypass capacitance that is greater than the first bypass capacitance.

Abstract: Systems and methods for real-time control of a bus operating point in a portable computing device (“PCD”) are presented. An indication of an event occurring in a bus interface is used as an indicator of a mismatch between a resource request and a data throughput level that can be supported by the bus. A suitable mechanism for identifying the mismatch provides a cost effective and non-invasive solution that is generally applicable for all usage situations.

Abstract: This disclosure describes techniques for reducing power consumption of a display device. According to these techniques, a display device is configured to determine whether an image to be displayed by the display device has become static. In response to identifying such a static image, the display device may operate in a static image mode. According to the static image mode, the display device may read a current frame of image data, modify the current frame of image data to generate a modified frame of image data with a reduced size, and store the modified image data in memory. The display device may read the modified image data from memory to present the static image, which may reduce power consumption of the display device.

Abstract: A method for clock modeling in a simulation tool is described. An internal time (I) may be defined that governs the simulator tool's clock period. An external time (E) may be defined. The internal time may have a smaller resolution than the external time. A calibration period (C) may be defined for the clock. The calibration period may be smaller than 0.5E and greater than I. The largest inaccuracy of any clock edge may be monitored, and the clock may be calibrated if the largest inaccuracy is greater than (C?1).

Abstract: An apparatus for simulating digital systems is described. The apparatus includes a processor and memory in electronic communication with the processor. Instructions that are executable by the processor are stored in the memory. A simulation tool is started. The simulation tool is capable of simulating a plurality of components. A clock phase is adjusted to be turned off for at least one of the components. A digital system is simulated that includes the at least one component. The simulation does not simulate the clock phase for the at least one component.

Abstract: A main die and a stacked die are included in the same component package. A transmission gate (370) is implemented on the main die, and can be enabled to receive leakage current in a connection (318) between the main die and the stacked die, and to conduct the leakage current to a bonding pad (344) that is accessible external to the package. Thus, the connectivity between the main die and the stacked die can be tested after the dies are packaged. The transmission gate is disabled during high-speed testing and normal operation. The package can also include a multiplexer (364) that is enabled during high-speed testing to input and output test signals at the package level. A direction signal is used to indicate whether test signals are being input to or output from the main die.

Abstract: An apparatus for simulating digital systems is described. The apparatus includes a processor and memory in electronic communication with the processor. Instructions that are executable by the processor are stored in the memory. A simulation tool is started. The simulation tool is capable of simulating a plurality of components. A clock phase is adjusted to be turned off for at least one of the components. A digital system is simulated that includes the at least one component. The simulation does not simulate the clock phase for the at least one component.

Abstract: A method for clock modeling in a simulation tool is described. An internal time (I) may be defined that governs the simulator tool's clock period. An external time (E) may be defined. The internal time may have a smaller resolution than the external time. A calibration period (C) may be defined for the clock. The calibration period may be smaller than 0.5E and greater than I. The largest inaccuracy of any clock edge may be monitored, and the clock may be calibrated if the largest inaccuracy is greater than (C?1).