Abstract: A multidie semiconductor device (MDSCD) package includes a generally planar interposer comprising a substrate with a central receptacle, upper surface conductors, and outer connectors on the lower surface of the interposer. Conductive vias connect upper surface conductors with outer connectors. One or more semiconductor devices may be mounted in the receptacle and one or more other semiconductor devices mounted above and/or below the interposer and attached thereto. The package may be configured to have a footprint not significantly larger than the footprint of the largest device and/or a thickness not significantly greater than the combined thickness of included devices. Methods for assembling and encapsulating packages from multidie wafers and multi-interposer sheets or strips are disclosed. Methods for combining a plurality of packages into a single stacked package are disclosed.

Abstract: Various aspects of the invention provide temporary interfaces for microelectronic components, microelectronic component test systems, and methods of testing microelectronic components. One of the disclosed temporary interfaces employs a substrate having a plurality of terminals and a switch layer carrying a plurality of actuatable liquid switches. These switches may be adapted to conform to a surface of a component terminal to electrically connect the component terminal to a terminal of the substrate. Another adaptation provides a microelectronic component test system including a microelectronic component including a plurality of terminals. A body is juxtaposed with, but spaced from, the microelectronic component. The body carries a plurality of conduits and a conformable conductor is associated with each conduit. Each of these conformable conductors comprises a volume of electrically conductive liquid and the associated conduit.

Abstract: A multidie semiconductor device (MDSCD) package includes a generally planar interposer comprising a substrate with a central receptacle, upper surface conductors, and outer connectors on the lower surface of the interposer. Conductive vias connect upper surface conductors with outer connectors. One or more semiconductor devices may be mounted in the receptacle and one or more other semiconductor devices mounted above and/or below the interposer and attached thereto. The package may be configured to have a footprint not significantly larger than the footprint of the largest device and/or a thickness not significantly greater than the combined thickness of included devices. Methods for assembling and encapsulating packages from multidie wafers and multi-interposer sheets or strips are disclosed. Methods for combining a plurality of packages into a single stacked package are disclosed.

Abstract: An interposer includes a substantially planar substrate with a slot formed therethrough. The slot includes a laterally recessed area formed in only a portion of a periphery thereof, which is positioned so as to expose at least a portion of an active surface of the semiconductor die located between a bond pad and an outer periphery of the semiconductor die. The laterally recessed area facilitates access to the bond pad by apparatus for forming, positioning, or securing intermediate conductive elements. The slot may be formed by forming a first, thin elongated slot through the interposer substrate, then widening a portion thereof. Alternatively, a first, small circular hole may be formed through the interposer substrate, then an elongated slot having a width that exceeds the diameter of the small circular hole may be formed through the substrate at a location which is continuous with the small circular hole.

Abstract: An interposer including a substantially planar substrate element with a slot formed therethrough. The slot, through which bond pads of a semiconductor die are exposed upon assembly of the interposer with the semiconductor die, includes a laterally recessed area formed in only a portion of a periphery thereof. The laterally recessed area is positioned so as to expose at least a portion of an active surface of the semiconductor die located between a bond pad located adjacent an outer periphery of the semiconductor die and the outer periphery. The laterally recessed area facilitates access to the bond pad by apparatus for forming, positioning, or securing intermediate conductive elements. Semiconductor device assemblies and packages that include the interposer are also disclosed, as are methods for assembling semiconductor device components with the interposer and methods for packaging such assemblies.