Abstract: A machining and positioning system for aerospace irregular parts and a discrete intelligent production line therefor are provided, which relates to the field of aerospace irregular part machining. In view of the problem that complex repeated positioning and poor positioning stability is required during the transportation and processing of aerospace irregular parts, a self-positioning device, a clamping device, and a support device are used to form a follow-up clamping and positioning system for the irregular part casing, reducing complex repeated positioning. The support block of the support device can fit to the inner wall of the casing, collect the support force using piezoelectric plates, and feedback and adjust the thrust of the support block based on the magnitude of the cutting radial force, maintaining stable support of the support block for the casing and meeting production needs.

Abstract: Disclosed is a biped robot and multi-configuration robot capable of being spliced autonomously, and a control method of the multi-configuration robot. The biped robot comprises a torso, arms, legs, a tolerance docking sleeve, and a torso docking device. The arms are correspondingly arranged at the left and right sides of the torso, and two legs are arranged at the lower side of the torso. The tolerance docking sleeve is movably arranged at the rear side of the torso through a base, and the torso docking device is fixed to the front side of the torso. Single biped robots in the present disclosure can form a multi-configuration legged combined body in a self-organization and reconstruction mode so as to achieve bipedal, quadrupedal, hexapodal and other multi-legged configurations. The motion stability and the load capacity of the legged robot are improved through the splicing combination of the modular legged robots.

Abstract: In a method for processing requests to join an interactive group, a first virtual character and a first virtual object are displayed in a virtual environment. The first virtual object represents the interactive group, and a first user account manages the interactive group. A first request to join the interactive group is displayed. The first request to join the interactive group is initiated by the first virtual character. When the first request to join the interactive group is accepted, the first virtual object being entered by the first virtual character is displayed. Apparatus and non-transitory computer-readable storage medium counterpart embodiments are also contemplated.

Abstract: The display substrate includes a shift register arranged on a base substrate, the shift register includes multiple stages of driving circuits, the driving circuit includes a first/second input circuit, a first/second output circuit and a control circuit; the first output circuit is configured to provide a first scanning driving signal to the first driving signal output terminal under the control of a potential of a first node and a potential of a second node; the first input circuit is configured to input a signal to the third node under the control of the clock signal; the second input circuit is configured to input a signal provided by the power line to the second node under the control of the potential of the third node; the control circuit is configured to control the potential of the third node and the potential of the first node.

Abstract: The present disclosure provides an isolation integrated circuit, a carrier frequency control circuit and a modulation signal generation method. The isolation integrated circuit includes a carrier frequency generation circuit, a carrier frequency control circuit and a modulation circuit. The carrier frequency generation circuit generates a carrier frequency signal. The carrier frequency control circuit detects enabling periods and disabling periods of an input signal, controls the carrier frequency generation circuit to output the carrier frequency signal during the enabling periods, and controls the carrier frequency generation circuit to stop outputting the carrier frequency signal in the output periods of timing pulses during the disabling periods. The timing pulses are generated in response to detection of entering the disabling periods.

Abstract: A semiconductor device includes a MEOL structure and a BEOL structure. The BEOL structure is formed over the MEOL structure and includes a first dielectric layer, a spacer and a conductive portion. The first dielectric layer has a lateral surface and a recess, wherein the recess is recessed with respect to the lateral surface. The spacer is formed the lateral surface and covers an opening of the recess. The conductive portion is formed adjacent to the spacer.

Abstract: The application provides a signal delay setting circuit, an isolation integrated circuit and a power conversion circuitry. The isolation integrated circuit receives a first power voltage, receives a first input signal and a second input signal via two signal input terminals respectively, and outputs an output signal generated according to the first input signal and the second input signal. When the first power voltage is within a predetermined voltage range, the signal delay setting circuit generates a voltage difference across the two signal input terminals and calculates a delay time according to the voltage difference. When the first power voltage is greater than an upper limit of the predetermined voltage range, the signal delay setting circuit delays the first input signal or the second input signal according to the delay time to control the duty ratio of the output signal.

Abstract: The present disclosure provides a signal delay setting circuit, an isolation integrated circuit and a power conversion circuitry. The isolation integrated circuit includes a primary side circuit, an isolation circuit and a secondary side circuit. The primary side circuit generates a primary side signal according to a first input signal and a second input signal. The isolation circuit converts the primary side signal into a secondary side signal. The secondary side circuit receives the secondary side signal through the isolation circuit, to generate an output signal. The signal delay setting circuit is coupled to the secondary side circuit, calculates a delay time according to a voltage difference between an alternative terminal and a secondary side ground terminal of the isolation integrated circuit, and delays the secondary side signal according to the delay time, to control the duty ratio of the output signal.

Abstract: The subject pertains to systems, methods, and devices to provide improved teamwork guidelines for collaborators in geographic simulation experiments, whereby the collaborators can be led to participate in the geographic simulation tasks according to the teamwork guideline and be instructed to implement the simulation tasks to achieve their goals. The invention can automatically recommend appropriate geographic simulation schemes for specific geographic problems and communicate simulation task information and dependencies. Novel guide cards can instruct teamwork in geographic simulation experiments. Thus, the cards can advantageously instruct, promote, or guide teamwork in geographic simulation experiments and enhance the efficiency of geographic problem-solving.

Abstract: A semiconductor structure includes a substrate, a conductive region, a first insulation layer, a second insulation layer, a gate structure, a low-k spacer, a gate contact, and a conductive region contact. The low-k spacer is formed between a sidewall of the gate structure and the first insulation layer. The gate contact is landed on a top surface of the gate structure. A proximity distance between a sidewall of the gate contact and the conductive region contact along a top surface of the second insulation layer is in a range of from about 4 nm to about 7 nm. A method for manufacturing a semiconductor structure is also provided.

Abstract: Disclosed are an array cutting knife-type cotton topping machine and a control method thereof. The cotton topping machine includes cameras, controllers, a tacho-generator and a plurality of groups of topping assemblies arranged in a left-right direction; the cameras and the tacho-generator are connected to the controllers; and a plurality of topping devices staggered left and right are arranged for each planting row. In the present disclosure, by densely arranging low-cost topping devices and determining which topping devices are switched to an operating state for topping according to visually determined top bud positions, the potential problems in the prior art of the damage to other parts of the plant or the unnecessary intertwining of branches and leaves are avoided.

Abstract: A method for manufacturing an interconnect structure includes: forming a first dielectric layer; forming a mask; patterning the first dielectric layer through the mask to form a trench, an inner surface of the trench having two first portions opposite to each other along an X direction, two second portions opposite to each other along a Y direction, and a bottom portion; forming a second dielectric layer over the mask and the patterned first dielectric layer, and along an inner surface of the trench; etching the second dielectric layer by directing an etchant in a predetermined direction such that a first part of the second dielectric layer on the two first portions and the bottom portion is removed, and a second part of the second dielectric layer on the second portions of the trench remains and is formed into two reinforcing spacers; and forming a trench-filling element.

Abstract: A page buffer circuit of a memory device includes a first sensing branch including a first pre-charge path and a low-voltage latch, and a second sensing branch including a second pre-charge path and a sensing latch. The first sensing branch and the second sensing branch are parallel coupled to a sensing node of the page buffer circuit.

Abstract: A semiconductor device and method of manufacturing the same are provided. The semiconductor device includes a substrate, a first conductive line, a first conductive via, a second conductive line, and a first barrier layer. The first conductive line is disposed on the substrate. The first conductive via is disposed on the first conductive line. The second conductive line is disposed on the first conductive line. The first barrier layer is disposed between the first conductive via and the second conductive line.

Abstract: A semiconductor memory device includes a substrate and a capacitor. The capacitor is disposed on the substrate, and the capacitor includes a bottom electrode layer, a capacitor dielectric layer and a top electrode layer sequentially stacked from bottom to top and an aluminum-containing insulation layer. The aluminum-containing insulation layer includes aluminum titanium nitride or aluminum oxynitride, and is in direct contact with the capacitor dielectric layer and disposed between the bottom electrode layer and the top electrode layer. Therefore, the semiconductor memory device may effectively improve the leakage current.

Abstract: An intelligent production line for turning tool bit cavities and an application method are provided, which solve the problem that a production line in the prior art has low working efficiency. The intelligent production line has the beneficial effects of a compact arrangement structure, higher safety and improved working efficiency. The intelligent production line for turning tool bit cavities includes a robot. Material tables and at least one machining center are arranged around the robot. A transfer station used for transferring materials is arranged between the machining center and the robot. A protective fence is arranged between a position above the material tables and the robot, and between the transfer station and the robot. The robot is provided with a mechanical arm including a base plate. The base plate is provided with at least one clamping jaw and fixed with a laser detecting unit for detecting the materials.

Abstract: A method for fabricating an integrated circuit device is provided. The method includes depositing a first dielectric layer; depositing a second dielectric layer over the first dielectric layer; etching a trench opening in the second dielectric layer, wherein the trench opening exposes a first sidewall of the second dielectric layer and a second sidewall of the second dielectric layer, the first sidewall of the second dielectric layer extends substantially along a first direction, and the second sidewall of the second dielectric layer extends substantially along a second direction different from the first direction in a top view; forming a via etch stop layer on the first sidewall of the second dielectric layer, wherein the second sidewall of the second dielectric layer is free from coverage by the via etch stop layer; forming a conductive line in the trench opening; and forming a conductive via over the conductive line.

Abstract: The integrated circuit structure includes a substrate and a memory cell over the substrate. The memory cell includes a channel layer, a first doped region, a second doped region, a first ferroelectric layer, and a first gate layer. The first doped region is at a first side of the channel layer and doped with a first dopant being of a first conductivity type. The second doped region is at a second side of the channel layer opposing the first side and doped with a second dopant being of a second conductivity type different from the first conductivity type. The ferroelectric layer is over the channel layer and between the first and second doped regions. The gate layer is over the ferroelectric layer.

Abstract: The present invention discloses a flexible sensor detection system for medical care and health, including: an information collection module, which uses a wearable device as a carrier, where flexible sensors are respectively arranged on the wearable device; an information transmission module, configured to wirelessly transmit collected information to an information processing and feedback module; and the information processing and feedback module, configured to perform grading treatment on received data information and feed back a health condition corresponding to the data information to the information transmission module, where the information transmission module compares feedback health condition data with a preset health threshold to determine whether to give an alarm. A heart rate ECG band, a breathing band, a shell temperature band, a blood flow rate band, a blood glucose band, a blood oxygen band, and a deep temperature band of the present invention are provided with the built-in flexible sensors.

Abstract: In a method of manufacturing a semiconductor device, a mask pattern is formed over a target layer to be etched, and the target layer is etched by using the mask pattern as an etching mask. The etching is performed by using an electron cyclotron resonance (ECR) plasma etching apparatus, the ECR plasma etching apparatus includes one or more coils, and a plasma condition of the ECR plasma etching is changed during the etching the target layer by changing an input current to the one or more coils.