Patents by Inventor Teppei Isobe

Teppei Isobe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170229068
    Abstract: A semiconductor integrated circuit and corresponding display panel and electronic apparatus. A pixel element includes a self-luminous element and a drive transistor connected to a power supply line. In an emission period of the self-luminous element, an active voltage and an intermediate voltage are sequentially applied between the power supply line and a potential line with a pulse-shaped waveform such that a predetermined luminance duration is obtained in the emission period. In a non-emission period of the self-luminous element, an off-state voltage is applied between the power supply line and the potential line so as to maintain the self-luminous element in a non-emission state.
    Type: Application
    Filed: April 20, 2017
    Publication date: August 10, 2017
    Inventors: Hiroshi Hasegawa, Teppei Isobe
  • Patent number: 9646538
    Abstract: Disclosed herein is a light emitting period setting method for a display panel wherein the peak luminance level is varied through control of a total light emitting period length which is the sum total of period lengths of light emitting periods arranged in a one-field period, including a step of setting period lengths of N light emitting periods, which are arranged in a one-field period, in response to the total light emitting period length such that the period lengths of the light emitting periods continue to keep a fixed ratio thereamong, N being equal to or higher than 3.
    Type: Grant
    Filed: March 9, 2016
    Date of Patent: May 9, 2017
    Assignee: Sony Corporation
    Inventors: Hiroshi Hasegawa, Teppei Isobe, Hironobu Abe
  • Patent number: 9640115
    Abstract: A semiconductor integrated circuit and corresponding display panel and electronic apparatus. A pixel element includes a self-luminous element and a drive transistor connected to a power supply line. In an emission period of the self-luminous element, an active voltage and an intermediate voltage are sequentially applied between the power supply line and a potential line with a pulse-shaped waveform such that a predetermined luminance duration is obtained in the emission period. In a non-emission period of the self-luminous element, an off-state voltage is applied between the power supply line and the potential line so as to maintain the self-luminous element in a non-emission state.
    Type: Grant
    Filed: June 20, 2016
    Date of Patent: May 2, 2017
    Assignee: Sony Corporation
    Inventors: Hiroshi Hasegawa, Teppei Isobe
  • Patent number: 9626911
    Abstract: Disclosed herein is a light emitting period setting method for a display panel wherein the peak luminance level is varied through control of a total light emitting period length which is the sum total of period lengths of light emitting periods arranged in a one-field period, including a step of setting period lengths of N light emitting periods, which are arranged in a one-field period, in response to the total light emitting period length such that the period lengths of the light emitting periods continue to keep a fixed ratio thereamong, N being equal to or higher than 3.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: April 18, 2017
    Assignee: Sony Corporation
    Inventors: Hiroshi Hasegawa, Teppei Isobe, Hironobu Abe
  • Publication number: 20170069272
    Abstract: Disclosed herein is a light emitting period setting method for a display panel wherein the peak luminance level is varied through control of a total light emitting period length which is the sum total of period lengths of light emitting periods arranged in a one-field period, including a step of setting period lengths of N light emitting periods, which are arranged in a one-field period, in response to the total light emitting period length such that the period lengths of the light emitting periods continue to keep a fixed ratio thereamong, N being equal to or higher than 3.
    Type: Application
    Filed: November 18, 2016
    Publication date: March 9, 2017
    Inventors: Hiroshi Hasegawa, Teppei Isobe, Hironobu Abe
  • Publication number: 20170047012
    Abstract: A display device according to the disclosure includes: a display section having a plurality of unit pixels; and a driving section that, in a first drive mode, performs write driving and thereafter performs light emission driving in a plurality of light-emitting periods on each of the unit pixels. One of predetermined number of light-emitting periods out of the plurality of light-emitting periods other than a first light-emitting period is longer than the first light-emitting period, and another one of the predetermined number of light-emitting periods is shorter than the first light-emitting period.
    Type: Application
    Filed: February 10, 2015
    Publication date: February 16, 2017
    Inventors: Koichi MAEYAMA, Teppei ISOBE
  • Publication number: 20160321998
    Abstract: Disclosed herein is a light emitting period setting method for a display panel wherein the peak luminance level is varied through control of a total light emitting period length which is the sum total of period lengths of light emitting periods arranged in a one-field period, including a step of setting period lengths of N light emitting periods, which are arranged in a one-field period, in response to the total light emitting period length such that the period lengths of the light emitting periods continue to keep a fixed ratio thereamong, N being equal to or higher than 3.
    Type: Application
    Filed: July 14, 2016
    Publication date: November 3, 2016
    Inventors: Hiroshi Hasegawa, Teppei Isobe, Hironobu Abe
  • Publication number: 20160307514
    Abstract: A semiconductor integrated circuit and corresponding display panel and electronic apparatus. A pixel element includes a self-luminous element and a drive transistor connected to a power supply line. In an emission period of the self-luminous element, an active voltage and an intermediate voltage are sequentially applied between the power supply line and a potential line with a pulse-shaped waveform such that a predetermined luminance duration is obtained in the emission period. In a non-emission period of the self-luminous element, an off-state voltage is applied between the power supply line and the potential line so as to maintain the self-luminous element in a non-emission state.
    Type: Application
    Filed: June 20, 2016
    Publication date: October 20, 2016
    Inventors: Hiroshi Hasegawa, Teppei Isobe
  • Patent number: 9406255
    Abstract: Disclosed herein is a lighting period setting method for a display panel which permits control of the peak luminance level by controlling the total lighting period length which is the sum of all lighting periods per field period, the lighting period setting method including the steps of, calculating the average luminance level across the screen based on input image data, determining light emission mode based on the calculated average luminance level, and setting the number, arrangement and lengths of lighting periods per field period according to the setting conditions defined for the determined light emission mode so as to provide the peak luminance level which is set according to the input image data.
    Type: Grant
    Filed: January 14, 2013
    Date of Patent: August 2, 2016
    Assignee: JOLED Inc.
    Inventors: Teppei Isobe, Hiroshi Hasegawa, Hironobu Abe
  • Publication number: 20160189637
    Abstract: Disclosed herein is a light emitting period setting method for a display panel wherein the peak luminance level is varied through control of a total light emitting period length which is the sum total of period lengths of light emitting periods arranged in a one-field period, including a step of setting period lengths of N light emitting periods, which are arranged in a one-field period, in response to the total light emitting period length such that the period lengths of the light emitting periods continue to keep a fixed ratio thereamong, N being equal to or higher than 3.
    Type: Application
    Filed: March 9, 2016
    Publication date: June 30, 2016
    Applicant: Sony Corporation
    Inventors: Hiroshi Hasegawa, Teppei Isobe, Hironobu Abe
  • Patent number: 9378679
    Abstract: A semiconductor integrated circuit and corresponding display panel and electronic apparatus. A pixel element includes a self-luminous element and a drive transistor connected to a power supply line. In an emission period of the self-luminous element, an active voltage and an intermediate voltage are sequentially applied between the power supply line and a potential line with a pulse-shaped waveform such that a predetermined luminance duration is obtained in the emission period. In a non-emission period of the self-luminous element, an off-state voltage is applied between the power supply line and the potential line so as to maintain the self-luminous element in a non-emission state.
    Type: Grant
    Filed: April 8, 2014
    Date of Patent: June 28, 2016
    Assignee: Sony Corporation
    Inventors: Hiroshi Hasegawa, Teppei Isobe
  • Patent number: 9361857
    Abstract: Disclosed herein is a light emitting period setting method for a display panel wherein the peak luminance level is varied through control of a total light emitting period length which is the sum total of period lengths of light emitting periods arranged in a one-field period, including a step of setting period lengths of N light emitting periods, which are arranged in a one-field period, in response to the total light emitting period length such that the period lengths of the light emitting periods continue to keep a fixed ratio thereamong, N being equal to or higher than 3.
    Type: Grant
    Filed: June 26, 2014
    Date of Patent: June 7, 2016
    Assignee: SONY CORPORATION
    Inventors: Hiroshi Hasegawa, Teppei Isobe, Hironobu Abe
  • Patent number: 9299291
    Abstract: A display unit includes: a display section including a plurality of unit pixels; and a drive section configured to perform a first drive, a second drive, and a third drive on each of the unit pixels in this order, in which each of the first drive and the second drive includes an initialization drive, a writing drive of a pixel voltage, and a light emission drive based on the pixel voltage written by the writing drive, a part of a series of the initialization drive, the writing drive, and the light emission drive differs between the first drive and the second drive, and the third drive includes a light emission drive based on the pixel voltage written by the writing drive in the second drive.
    Type: Grant
    Filed: November 14, 2014
    Date of Patent: March 29, 2016
    Assignee: JOLED Inc.
    Inventors: Koichi Maeyama, Teppei Isobe, Yohei Funatsu, Daisuke Miki
  • Publication number: 20150243225
    Abstract: A display device includes: a display section that has pixels; and a driving section that drives the display section on the basis of luminance information including a plurality of sub-luminance information pieces. The driving section drives the pixels in a time-division manner on the basis of each sub-luminance information piece during a single display period or a plurality of display periods which is set in each sub-luminance information piece. One or both of a timing of start of each display period and the number of the display periods are changeable.
    Type: Application
    Filed: February 5, 2015
    Publication date: August 27, 2015
    Inventors: Koichi Maeyama, Teppei Isobe
  • Publication number: 20150187277
    Abstract: A display unit includes: a display section including a plurality of unit pixels; and a drive section configured to perform a first drive, a second drive, and a third drive on each of the unit pixels in this order, in which each of the first drive and the second drive includes an initialization drive, a writing drive of a pixel voltage, and a light emission drive based on the pixel voltage written by the writing drive, a part of a series of the initialization drive, the writing drive, and the light emission drive differs between the first drive and the second drive, and the third drive includes a light emission drive based on the pixel voltage written by the writing drive in the second drive.
    Type: Application
    Filed: November 14, 2014
    Publication date: July 2, 2015
    Inventors: Koichi Maeyama, Teppei Isobe, Yohei Funatsu, Daisuke Miki
  • Patent number: 9066093
    Abstract: A display panel module includes: a pixel array section in which a sub-pixel formed by a self-luminous element of a current-driven type and a pixel circuit configured to drive and control the self-luminous element is arranged in a form of a matrix; a signal line driving section configured to drive a signal line; a writing control line driving section configured to control writing of a potential appearing in the signal line to the sub-pixel; and a power supply controlling section configured to control supply of driving power to the sub-pixel and stop of the supply of the driving power; wherein when either of a two-dimensional image and a three-dimensional image is displayed, the signal line driving section, the writing control line driving section, and the power supply controlling section operate in common driving timing set such that display periods of adjacent frames do not overlap each other.
    Type: Grant
    Filed: July 21, 2009
    Date of Patent: June 23, 2015
    Assignee: Sony Corporation
    Inventors: Hiroshi Hasegawa, Teppei Isobe
  • Patent number: 8970563
    Abstract: A display panel module includes: a pixel array section in which a sub-pixel formed by a self-luminous element of a current-driven type and a pixel circuit configured to drive and control the self-luminous element is arranged in a form of a matrix; a signal line driving section configured to drive a signal line; a writing control line driving section configured to control writing of a potential appearing in the signal line to the sub-pixel on a basis of a first scan clock; and a power supply controlling section configured to control supply of driving power to the sub-pixel and stop of the supply of the driving power, the power supply controlling section controlling timing of the supply of the driving power defining a lighting period of the self-luminous element on a basis of a second scan clock having a higher speed than the first scan clock.
    Type: Grant
    Filed: July 21, 2009
    Date of Patent: March 3, 2015
    Assignee: Sony Corporation
    Inventors: Hiroshi Hasegawa, Teppei Isobe
  • Patent number: 8941633
    Abstract: A semiconductor integrated circuit and corresponding display panel and electronic apparatus. A pixel element includes a self-luminous element and a drive transistor connected to a power supply line. In an emission period of the self-luminous element, an active voltage and an intermediate voltage are sequentially applied between the power supply line and a potential line with a pulse-shaped waveform such that a predetermined luminance duration is obtained in the emission period. In a non-emission period of the self-luminous element, an off-state voltage is applied between the power supply line and the potential line so as to maintain the self-luminous element in a non-emission state.
    Type: Grant
    Filed: July 30, 2014
    Date of Patent: January 27, 2015
    Assignee: Sony Corporation
    Inventors: Hiroshi Hasegawa, Teppei Isobe
  • Publication number: 20140333605
    Abstract: A semiconductor integrated circuit and corresponding display panel and electronic apparatus. A pixel element includes a self-luminous element and a drive transistor connected to a power supply line. In an emission period of the self-luminous element, an active voltage and an intermediate voltage are sequentially applied between the power supply line and a potential line with a pulse-shaped waveform such that a predetermined luminance duration is obtained in the emission period. In a non-emission period of the self-luminous element, an off-state voltage is applied between the power supply line and the potential line so as to maintain the self-luminous element in a non-emission state.
    Type: Application
    Filed: July 30, 2014
    Publication date: November 13, 2014
    Applicant: SONY CORPORATION
    Inventors: Hiroshi Hasegawa, Teppei Isobe
  • Publication number: 20140307009
    Abstract: Disclosed herein is a light emitting period setting method for a display panel wherein the peak luminance level is varied through control of a total light emitting period length which is the sum total of period lengths of light emitting periods arranged in a one-field period, including a step of setting period lengths of N light emitting periods, which are arranged in a one-field period, in response to the total light emitting period length such that the period lengths of the light emitting periods continue to keep a fixed ratio thereamong, N being equal to or higher than 3.
    Type: Application
    Filed: June 26, 2014
    Publication date: October 16, 2014
    Applicant: SONY CORPORATION
    Inventors: Hiroshi Hasegawa, Teppei Isobe, Hironobu Abe