Patents by Inventor Teppei Isobe

Teppei Isobe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8817012
    Abstract: Disclosed herein is a light emitting period setting method for a display panel wherein the peak luminance level is varied through control of a total light emitting period length which is the sum total of period lengths of light emitting periods arranged in a one-field period, including a step of setting period lengths of N light emitting periods, which are arranged in a one-field period, in response to the total light emitting period length such that the period lengths of the light emitting periods continue to keep a fixed ratio thereamong, N being equal to or higher than 3.
    Type: Grant
    Filed: January 27, 2009
    Date of Patent: August 26, 2014
    Assignee: Sony Corporation
    Inventors: Hiroshi Hasegawa, Teppei Isobe, Hironobu Abe
  • Publication number: 20140218419
    Abstract: A semiconductor integrated circuit and corresponding display panel and electronic apparatus. A pixel element includes a self-luminous element and a drive transistor connected to a power supply line. In an emission period of the self-luminous element, an active voltage and an intermediate voltage are sequentially applied between the power supply line and a potential line with a pulse-shaped waveform such that a predetermined luminance duration is obtained in the emission period. In a non-emission period of the self-luminous element, an off-state voltage is applied between the power supply line and the potential line so as to maintain the self-luminous element in a non-emission state.
    Type: Application
    Filed: April 8, 2014
    Publication date: August 7, 2014
    Applicant: Sony Corporation
    Inventors: Hiroshi Hasegawa, Teppei Isobe
  • Patent number: 8730221
    Abstract: A semiconductor integrated circuit and corresponding display panel and electronic apparatus. A pixel element includes a self-luminous element and a drive transistor connected to a power supply line. In an emission period of the self-luminous element, an active voltage and an intermediate voltage are sequentially applied between the power supply line and a potential line with a pulse-shaped waveform such that a predetermined luminance duration is obtained in the emission period. In a non-emission period of the self-luminous element, an off-state voltage is applied between the power supply line and the potential line so as to maintain the self-luminous element in a non-emission state.
    Type: Grant
    Filed: October 16, 2013
    Date of Patent: May 20, 2014
    Assignee: Sony Corporation
    Inventors: Hiroshi Hasegawa, Teppei Isobe
  • Publication number: 20140055509
    Abstract: A semiconductor integrated circuit and corresponding display panel and electronic apparatus. A pixel element includes a self-luminous element and a drive transistor connected to a power supply line. In an emission period of the self-luminous element, an active voltage and an intermediate voltage are sequentially applied between the power supply line and a potential line with a pulse-shaped waveform such that a predetermined luminance duration is obtained in the emission period. In a non-emission period of the self-luminous element, an off-state voltage is applied between the power supply line and the potential line so as to maintain the self-luminous element in a non-emission state.
    Type: Application
    Filed: October 16, 2013
    Publication date: February 27, 2014
    Applicant: SONY CORPORATION
    Inventors: Hiroshi Hasegawa, Teppei Isobe
  • Patent number: 8610697
    Abstract: Disclosed herein is a semiconductor integrated circuit including a power supply line drive circuit configured to drive power supply lines connected to pixels that are arranged in a matrix on a self-luminous display panel.
    Type: Grant
    Filed: September 4, 2009
    Date of Patent: December 17, 2013
    Assignee: Sony Corporation
    Inventors: Hiroshi Hasegawa, Teppei Isobe
  • Patent number: 8570314
    Abstract: An emissive type display device includes: a pixel array section having pixels ready for an active matrix driving system; a circuit for setting a peak luminance level of each display frame; and a driving circuit for variably controlling a total application period length of a driving voltage applied to a power supply line connected to each pixel and amplitude of the driving voltage so as to obtain a set peak luminance level, when the set peak luminance level is lower than a set value, the driving circuit dividing the driving voltage into a plurality of times of pulse waveform, and variably controlling the amplitude of the driving voltage at each output time according to the peak luminance level such that the amplitude of the driving voltage at least one output time is lower than a maximum driving voltage in a non-emission period.
    Type: Grant
    Filed: November 18, 2009
    Date of Patent: October 29, 2013
    Assignee: Sony Corporation
    Inventors: Hiroshi Hasegawa, Teppei Isobe
  • Patent number: 8537182
    Abstract: Disclosed herein is a light emitting period setting method for a display panel wherein the peak luminance level is varied through control of a total light emitting period length which is the sum total of period lengths of light emitting periods arranged in a one-field period, including a step of setting period lengths of N light emitting periods, which are arranged in a one-field period, in response to the total light emitting period length such that the period lengths of the light emitting periods continue to keep a fixed ratio thereamong, N being equal to or higher than 3.
    Type: Grant
    Filed: March 14, 2012
    Date of Patent: September 17, 2013
    Assignee: Sony Corporation
    Inventors: Hiroshi Hasegawa, Teppei Isobe, Hironobu Abe
  • Patent number: 8441503
    Abstract: Disclosed herein is a lighting period setting method for a display panel which permits control of the peak luminance level by controlling the total lighting period length which is the sum of all lighting periods per field period, the lighting period setting method including the steps of, calculating the average luminance level across the screen based on input image data, determining light emission mode based on the calculated average luminance level, and setting the number, arrangement and lengths of lighting periods per field period according to the setting conditions defined for the determined light emission mode so as to provide the peak luminance level which is set according to the input image data.
    Type: Grant
    Filed: February 10, 2009
    Date of Patent: May 14, 2013
    Assignee: Sony Corporation
    Inventors: Teppei Isobe, Hiroshi Hasegawa, Hironobu Abe
  • Publication number: 20120169802
    Abstract: Disclosed herein is a light emitting period setting method for a display panel wherein the peak luminance level is varied through control of a total light emitting period length which is the sum total of period lengths of light emitting periods arranged in a one-field period, including a step of setting period lengths of N light emitting periods, which are arranged in a one-field period, in response to the total light emitting period length such that the period lengths of the light emitting periods continue to keep a fixed ratio thereamong, N being equal to or higher than 3.
    Type: Application
    Filed: March 14, 2012
    Publication date: July 5, 2012
    Applicant: Sony Corporation
    Inventors: Hiroshi Hasegawa, Teppei Isobe, Hironobu Abe
  • Publication number: 20100149167
    Abstract: An emissive type display device includes: a pixel array section having pixels ready for an active matrix driving system; a circuit for setting a peak luminance level of each display frame; and a driving circuit for variably controlling a total application period length of a driving voltage applied to a power supply line connected to each pixel and amplitude of the driving voltage so as to obtain a set peak luminance level, when the set peak luminance level is lower than a set value, the driving circuit dividing the driving voltage into a plurality of times of pulse waveform, and variably controlling the amplitude of the driving voltage at each output time according to the peak luminance level such that the amplitude of the driving voltage at least one output time is lower than a maximum driving voltage in a non-emission period.
    Type: Application
    Filed: November 18, 2009
    Publication date: June 17, 2010
    Applicant: Sony Corporation
    Inventors: Hiroshi Hasegawa, Teppei Isobe
  • Publication number: 20100091207
    Abstract: A three-dimensional image system includes: a display device including a pixel array section, a driving circuit section, and a display end timing extracting section; a transmitting section; and wearable means including a receiving section, a pair of shutter mechanisms, and a shutter driving section.
    Type: Application
    Filed: September 4, 2009
    Publication date: April 15, 2010
    Applicant: Sony Corporation
    Inventors: Hiroshi Hasegawa, Teppei Isobe
  • Publication number: 20100085341
    Abstract: Disclosed herein is a semiconductor integrated circuit including a power supply line drive circuit configured to drive power supply lines connected to pixels that are arranged in a matrix on a self-luminous display panel.
    Type: Application
    Filed: September 4, 2009
    Publication date: April 8, 2010
    Applicant: Sony Corporation
    Inventors: Hiroshi Hasegawa, Teppei Isobe
  • Publication number: 20100033462
    Abstract: A display panel module includes: a pixel array section in which a sub-pixel formed by a self-luminous element of a current-driven type and a pixel circuit configured to drive and control the self-luminous element is arranged in a form of a matrix; a signal line driving section configured to drive a signal line; a writing control line driving section configured to control writing of a potential appearing in the signal line to the sub-pixel; and a power supply controlling section configured to control supply of driving power to the sub-pixel and stop of the supply of the driving power; wherein when either of a two-dimensional image and a three-dimensional image is displayed, the signal line driving section, the writing control line driving section, and the power supply controlling section operate in common driving timing set such that display periods of adjacent frames do not overlap each other.
    Type: Application
    Filed: July 21, 2009
    Publication date: February 11, 2010
    Applicant: Sony Corporation
    Inventors: Hiroshi Hasegawa, Teppei Isobe
  • Publication number: 20100033461
    Abstract: A display panel module includes: a pixel array section in which a sub-pixel formed by a self-luminous element of a current-driven type and a pixel circuit configured to drive and control the self-luminous element is arranged in a form of a matrix; a signal line driving section configured to drive a signal line; a writing control line driving section configured to control writing of a potential appearing in the signal line to the sub-pixel on a basis of a first scan clock; and a power supply controlling section configured to control supply of driving power to the sub-pixel and stop of the supply of the driving power, the power supply controlling section controlling timing of the supply of the driving power defining a lighting period of the self-luminous element on a basis of a second scan clock having a higher speed than the first scan clock.
    Type: Application
    Filed: July 21, 2009
    Publication date: February 11, 2010
    Applicant: Sony Corporation
    Inventors: Hiroshi Hasegawa, Teppei Isobe
  • Publication number: 20090207193
    Abstract: Disclosed herein is a lighting period setting method for a display panel which permits control of the peak luminance level by controlling the total lighting period length which is the sum of all lighting periods per field period, the lighting period setting method including the steps of, calculating the average luminance level across the screen based on input image data, determining light emission mode based on the calculated average luminance level, and setting the number, arrangement and lengths of lighting periods per field period according to the setting conditions defined for the determined light emission mode so as to provide the peak luminance level which is set according to the input image data.
    Type: Application
    Filed: February 10, 2009
    Publication date: August 20, 2009
    Applicant: Sony Corporation
    Inventors: Teppei Isobe, Hiroshi Hasegawa, Hironobu Abe
  • Publication number: 20090201286
    Abstract: Disclosed herein is a light emitting period setting method for a display panel wherein the peak luminance level is varied through control of a total light emitting period length which is the sum total of period lengths of light emitting periods arranged in a one-field period, including a step of setting period lengths of N light emitting periods, which are arranged in a one-field period, in response to the total light emitting period length such that the period lengths of the light emitting periods continue to keep a fixed ratio thereamong, N being equal to or higher than 3.
    Type: Application
    Filed: January 27, 2009
    Publication date: August 13, 2009
    Applicant: Sony Corporation
    Inventors: Hiroshi Hasegawa, Teppei Isobe, Hironobu Abe