Patents by Inventor Terrel L. Morris
Terrel L. Morris has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6452789Abstract: The inventive system uses a backplane to interconnect a plurality of modular cell boards. Each cell board comprises a plurality of processors, a processor controller chip, a memory subsystem, and a power subsystem. The processor controller chip manages communications between components on the cell board. A mechanical subassembly provides support for the cell board, as well as ventilation passages for cooling. Controller chips are connected to one side of the backplane, while the cell boards are connected to the other side. The controller chips manage cell board to cell board communications, and communications between the backplane and the computer system. The cell boards are arranged in back to back pairs, with the outer most cell boards having their components extend beyond the height of the backplane. This allows for an increase of spacing between the front to front interface of adjacent cell boards.Type: GrantFiled: April 29, 2000Date of Patent: September 17, 2002Assignee: Hewlett-Packard CompanyInventors: Lisa Heid Pallotti, Eric C. Peterson, Christian L Belady, Terrel L. Morris, Michael C. Day
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Publication number: 20020075650Abstract: An assembly comprising an integrated cooling system/liquid containment system/EMI shield/pump housing/heat sink is built atop a multi-chip module. The attached devices are cooled by a spray of fluid, effecting a phase change from liquid to gas at the point of evaporation. Condensing liquid accumulates at the base of the fins and is collected by a pump for redistribution. The pump is coupled to a fan blade, which in turn is operated by a motor. A seal is formed between the multi-chip module and the integrated housing. The assembly is designed such that this seal need not be broken to service the motor, thus minimizing the amount of vapors from the working fluid lost into the atmosphere. Case fins and fan blades are arranged for improved efficiency.Type: ApplicationFiled: February 15, 2002Publication date: June 20, 2002Inventors: Terrel L. Morris, Christian L. Belady
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Patent number: 6377458Abstract: An assembly comprising an integrated cooling system/liquid containment system/EMI shield/pump housing/heat sink is built atop a multi-chip module. The attached devices are cooled by a spray of fluid, effecting a phase change from liquid to gas at the point of evaporation. Condensing liquid accumulates at the base of the fins and is collected by a pump for redistribution. The pump is coupled to a fan blade, which in turn is operated by a motor. A seal is formed between the multi-chip module and the integrated housing. The assembly is designed such that this seal need not be broken to service the motor, thus minimizing the amount of vapors from the working fluid lost into the atmosphere. Case fins and fan blades are arranged for improved efficiency.Type: GrantFiled: July 31, 2000Date of Patent: April 23, 2002Assignee: Hewlett-Packard CompanyInventors: Terrel L. Morris, Christian L Belady
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Patent number: 6316944Abstract: The invention accurately determines propagation delay for a sawtooth pattern. Through measurement, the actual delays added per bend in the sawtooth pattern are determined and the values are then used in a CAD tool. The invention can add a known amount of propagation delay to a wire length by routing net wires close together without using a large amount of board space.Type: GrantFiled: April 29, 2000Date of Patent: November 13, 2001Assignee: Hewlett Packard CompanyInventors: Christopher M. Barnette, Terrel L. Morris, Douglas B. Fail, Marvin D. Ross
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Patent number: 6312973Abstract: A semiconductor device assembly according to the present invention may comprise a semiconductor die having at least one contact pad thereon and a package substrate having at least one lead pad thereon. The package substrate is sized to receive the semiconductor die so that the contact pad on the semiconductor die is substantially aligned with the lead pad on the package substrate when the semiconductor die is positioned on the package substrate. A coil spring is positioned between the contact pad on the semiconductor die and the lead pad on the package substrate so that the axis of the coil spring is substantially parallel to the contact pad contained on the semiconductor die and the lead pad contained on the package substrate.Type: GrantFiled: March 21, 2001Date of Patent: November 6, 2001Assignee: Hewlett-Packard CompanyInventors: Terrel L. Morris, David M. Chastain
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Patent number: 6313523Abstract: A semiconductor device assembly according to the present invention may comprise a semiconductor die having at least one contact pad thereon and a package substrate having at least one lead pad thereon. The package substrate is sized to receive the semiconductor die so that the contact pad on the semiconductor die is substantially aligned with the lead pad on the package substrate when the semiconductor die is positioned on the package substrate. A coil spring is positioned between the contact pad on the semiconductor die and the lead pad on the package substrate so that the axis of the coil spring is substantially parallel to the contact pad contained on the semiconductor die and the lead pad contained on the package substrate.Type: GrantFiled: October 28, 1999Date of Patent: November 6, 2001Assignee: Hewlett-Packard CompanyInventors: Terrel L. Morris, David M. Chastain
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Patent number: 6309262Abstract: A connector with multiple redundant contact points is disclosed. The multiple redundant contacts are provided by a bifurcated contact with a joining member at the tip of the contact.Type: GrantFiled: October 21, 1999Date of Patent: October 30, 2001Assignee: Hewlett-Packard CompanyInventor: Terrel L. Morris
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Publication number: 20010032388Abstract: The present invention relates to the production of an improved via for attaching electrical connection pins to printed circuit boards. The inventive via provides a connection having robust mechanical attachment and minimal capacitance effects. The via provides a wide diameter for accepting an electrical connection pin and a reduced diameter along other portions of the length of the via for reduced capacitance and reduced electrical discontinuity.Type: ApplicationFiled: June 20, 2001Publication date: October 25, 2001Inventor: Terrel L. Morris
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Patent number: 6280201Abstract: A connector for electrically and mechanically connecting two circuit boards at a substantially 90-degree angle. The 90-degree connector may include surface mount devices, connections for mechanically attaching to circuit boards, surface mount pads or pins for electrically connecting to the circuit boards. A printed circuit board connector constructed from materials with characteristics closely matching backplane and daughter card, minimizes reflections at interface and provides optimal signal performance. Connectors are manufactured using a process substantially similar to current printed circuit board processes allowing easy manufacturing. The connector may be manufactured from laminated printed circuit boards in a planar or cylindrical configuration.Type: GrantFiled: January 21, 2000Date of Patent: August 28, 2001Assignee: Hewlett-Packard CompanyInventor: Terrel L. Morris
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Publication number: 20010010946Abstract: A semiconductor device assembly according to the present invention may comprise a semiconductor die having at least one contact pad thereon and a package substrate having at least one lead pad thereon. The package substrate is sized to receive the semiconductor die so that the contact pad on the semiconductor die is substantially aligned with the lead pad on the package substrate when the semiconductor die is positioned on the package substrate. A coil spring is positioned between the contact pad on the semiconductor die and the lead pad on the package substrate so that the axis of the coil spring is substantially parallel to the contact pad contained on the semiconductor die and the lead pad contained on the package substrate.Type: ApplicationFiled: March 21, 2001Publication date: August 2, 2001Inventors: Terrel L. Morris, David M. Chastain
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Publication number: 20010001592Abstract: A low-cost EMI shield that fits around an integrated circuit package to absorb electromagnetic energy and dissipate it as heat. The shield is not ohmically conductive so it may contact electrically active conductors without affecting the operation of the circuit. EMI is prevented from being radiated by and around an integrated circuit package by a perimeter of material that is lossy to high-frequency electromagnetic currents. This perimeter is fitted around an integrated circuit package such that the gap between a heat sink or other top conductor and the printed circuit board is completely closed by the lossy material. This provides not only a line-of-sight obstruction to RF currents, but also provides a lossy return path to close the circuit loop for currents on the skin of the heat sink. Since the material is lossy, rather than purely conductive, it can be used with a less than perfect ground attachment.Type: ApplicationFiled: January 3, 2001Publication date: May 24, 2001Inventor: Terrel L. Morris
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Patent number: 6183316Abstract: A connector with multiple redundant contact points is disclosed. The multiple contacts are formed by a main contact point on a main beam and an auxiliary contact point connected to the main beam by a secondary beam in the shape of a loop or spring.Type: GrantFiled: October 21, 1999Date of Patent: February 6, 2001Assignee: Hewlett-Packard CompanyInventor: Terrel L. Morris
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Patent number: 6152790Abstract: A connector with multiple redundant contact points that can withstand surface imperfections during card insertion is disclosed. One implementation is a bifurcated contact with a joining member at the tip of the contact that can be added onto a single point connector designs.Type: GrantFiled: October 21, 1999Date of Patent: November 28, 2000Assignee: Hewlett-Packard CompanyInventor: Terrel L. Morris
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Patent number: 6061222Abstract: A method and apparatus for reducing noise in integrated circuit chips (ICs). The apparatus comprises on-die capacitance in conjunction with one or more resistive loss elements, which provide an AC termination for on-die power events. The on-die capacitance can be instantiated in metal layers alone, in gate oxides or in gate oxides combined with metal structures. The capacitance may be provided by the capacitive characteristics of adjacent metal layers of the power distribution structure of the IC. When the capacitance is provided in this manner, the resistive loss element corresponds to the linear resistance of thin lines on the metal layers of the power distribution structure. The resistive loss element may, alternatively, be comprised of a field effect transistor (FET) or a metal oxide semiconductor field effect transistor (MOSFET).Type: GrantFiled: August 28, 1998Date of Patent: May 9, 2000Assignee: Hewlett-Packard CompanyInventors: Terrel L. Morris, Harold W. Dozier
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Patent number: 6020749Abstract: A system and method of constructing and using a test module in situations where internal access to test points on a substrate are unavailable because devices mounted on the substrate block physical access. The test module is itself a solderable substrate and is imposed, for testing purposes, between the main substrate and the mounted devices. For double-sided or stacked main boards, two or more such modules can be used interposed between the mounted devices and the main substrate. Vias in the module serve to make contact with the test points and to carry the signals to the edge of the module where cups can be formed by cutting the edge vias in half.Type: GrantFiled: November 12, 1996Date of Patent: February 1, 2000Assignee: Hewlett-Packard CompanyInventors: Terrel L. Morris, Douglas S. Ondricek
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Patent number: 5883788Abstract: A backing plate facilitates electrical probing of VLSI IC signals in an array of signal via pads on the back side of a printed circuit board and which correspond to an LGA of socket pads on the front side of the printed circuit board. The backing plate is constructed of electrically non conductive mechanically stiff material that already has drilled therein a hole for each signal via pad that might be probed. Polyamide is a suitable material for such a backing plate. Special symbols, legends and suitable grid identification axes can be silk screened onto the side of the backing plate that remains visible when installed. The drilled insulative backing plate can be equipped with captive threaded studs, if desired. Alternatively, it may simply have holes to receive fasteners, or have captive female threaded fasteners in lieu of holes.Type: GrantFiled: October 31, 1996Date of Patent: March 16, 1999Assignee: Hewlett-Packard CompanyInventors: Douglas S. Ondricek, Terrel L. Morris, Eric C. Peterson
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Patent number: 5838550Abstract: A shortened ground path for the shield of a shielded modular connector (e.g., RJ-45, etc.) mounted against a bracket that is to be seated against a slot in a chassis is provided by a metallic grounding clip that slips over the bracket. The clip has edges that have been folded to slidably engage the bracket, and an orifice shaped to match the opening of the modular jack, so that the modular plug may pass through that orifice as it mates with the jack. The clip also has two opposing curved metal contacts along the perimeter of the orifice that engage and bear against the exposed shield portion of the modular plug as it mates with the modular jack. A pair of metal tabs engage the opening of the modular jack to align, or register, the orifice in the clip with the opening of the jack, and prevent the clip from easily sliding along the bracket once registration has been achieved.Type: GrantFiled: August 28, 1997Date of Patent: November 17, 1998Assignee: Hewlett-Packard CompanyInventors: Terrel L. Morris, Eric C. Peterson, Jeffrey N. Metcalf
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Patent number: 5708400Abstract: High speed power supply transients are suppressed in a system having fast edges and where a radial transmission line exists between the power supply and ground planes, by terminating the edges of the PCB in it characteristic impedance. In practice, this means approximating a continuous construct with many spaced instances of a discrete resistance. The dissipative terminations themselves are resistive, and if placed directly between the power supply and ground would needlessly dissipate a great deal of DC power. To prevent that they are AC coupled with a high quality coupling capacitor of sufficient capacitance to allow the resulting impedance to appear predominately resistive at and above the lowest frequency of interest, say, 100 MHz. Because of the confused nature of the reflection that may be generated at arbitrary locations within the interior of the PCB, there may well be "hot spots" within that interior that would benefit from the placement of a selected AC coupled load at or near such a spot.Type: GrantFiled: October 30, 1996Date of Patent: January 13, 1998Assignee: Hewlett-Packard CompanyInventor: Terrel L. Morris