Patents by Inventor Teruo Hirayama
Teruo Hirayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20140332869Abstract: A solid-state image pickup device 1 according to the present invention includes a semiconductor substrate 2 on which a pixel 20 composed of a photodiode 3 and a transistor is formed. The transistor comprising the pixel 20 is formed on the surface of the semiconductor substrate, a pn junction portion formed between high concentration regions of the photodiode 3 is provided within the semiconductor substrate 2 and a part of the pn junction portion of the photodiode 3 is extended to a lower portion of the transistor formed on the surface of the semiconductor substrate 2. According to the present invention, there is provided a solid-state image pickup device in which a pixel size can be microminiaturized without lowering a saturated electric charge amount (Qs) and sensitivity.Type: ApplicationFiled: June 5, 2014Publication date: November 13, 2014Inventors: Takayuki Ezaki, Teruo Hirayama
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Patent number: 8785983Abstract: A solid-state image pickup device 1 according to the present invention includes a semiconductor substrate 2 on which a pixel 20 composed of a photodiode 3 and a transistor is formed. The transistor comprising the pixel 20 is formed on the surface of the semiconductor substrate, a pn junction portion formed between high concentration regions of the photodiode 3 is provided within the semiconductor substrate 2 and a part of the pn junction portion of the photodiode 3 is extended to a lower portion of the transistor formed on the surface of the semiconductor substrate 2. According to the present invention, there is provided a solid-state image pickup device in which a pixel size can be microminiaturized without lowering a saturated electric charge amount (Qs) and sensitivity.Type: GrantFiled: April 29, 2013Date of Patent: July 22, 2014Assignee: Sony CorporationInventors: Takayuki Ezaki, Teruo Hirayama
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Publication number: 20130241024Abstract: A solid-state image pickup device 1 according to the present invention includes a semiconductor substrate 2 on which a pixel 20 composed of a photodiode 3 and a transistor is formed. The transistor comprising the pixel 20 is formed on the surface of the semiconductor substrate, a pn junction portion formed between high concentration regions of the photodiode 3 is provided within the semiconductor substrate 2 and a part of the pn junction portion of the photodiode 3 is extended to a lower portion of the transistor formed on the surface of the semiconductor substrate 2. According to the present invention, there is provided a solid-state image pickup device in which a pixel size can be microminiaturized without lowering a saturated electric charge amount (Qs) and sensitivity.Type: ApplicationFiled: April 29, 2013Publication date: September 19, 2013Applicant: SONY CORPORATIONInventors: Takayuki Ezaki, Teruo Hirayama
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Patent number: 8445944Abstract: A solid-state image pickup device 1 according to the present invention includes a semiconductor substrate 2 on which a pixel 20 composed of a photodiode 3 and a transistor is formed. The transistor comprising the pixel 20 is formed on the surface of the semiconductor substrate, a pn junction portion formed between high concentration regions of the photodiode 3 is provided within the semiconductor substrate 2 and a part of the pn junction portion of the photodiode 3 is extended to a lower portion of the transistor formed on the surface of the semiconductor substrate 2. According to the present invention, there is provided a solid-state image pickup device in which a pixel size can be microminiaturized without lowering a saturated electric charge amount (Qs) and sensitivity.Type: GrantFiled: December 21, 2011Date of Patent: May 21, 2013Assignee: Sony CorporationInventors: Takayuki Ezaki, Teruo Hirayama
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Publication number: 20130038818Abstract: A display device includes: a light source section that emits excitation light for each pixel; and a light emitting layer that includes a quantum dot and emits emission light for each of the pixels. The quantum dot generates, based on the excitation light, the emission light having a wavelength longer than a wavelength of the excitation light.Type: ApplicationFiled: July 30, 2012Publication date: February 14, 2013Applicant: SONY CORPORATIONInventors: Atsushi Toda, Teruo Hirayama
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Publication number: 20120161267Abstract: A solid-state image pickup device 1 according to the present invention includes a semiconductor substrate 2 on which a pixel 20 composed of a photodiode 3 and a transistor is formed. The transistor comprising the pixel 20 is formed on the surface of the semiconductor substrate, a pn junction portion formed between high concentration regions of the photodiode 3 is provided within the semiconductor substrate 2 and a part of the pn junction portion of the photodiode 3 is extended to a lower portion of the transistor formed on the surface of the semiconductor substrate 2. According to the present invention, there is provided a solid-state image pickup device in which a pixel size can be microminiaturized without lowering a saturated electric charge amount (Qs) and sensitivity.Type: ApplicationFiled: December 21, 2011Publication date: June 28, 2012Applicant: Sony CorporationInventors: Takayuki Ezaki, Teruo Hirayama
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Patent number: 8088639Abstract: A solid-state image pickup device includes a semiconductor substrate within which a pixel comprised of a photodiode and a transistor is formed. The transistor is formed at a surface of the semiconductor substrate, a pn junction portion formed between high concentration regions of the photodiode is provided within the semiconductor substrate and a part of the pn junction portion of the photodiode is extended to a lower portion of the transistor formed at the surface of the semiconductor substrate.Type: GrantFiled: October 29, 2007Date of Patent: January 3, 2012Assignee: Sony CorporationInventors: Takayuki Ezaki, Teruo Hirayama
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Publication number: 20110310282Abstract: A solid-state imaging device includes a substrate and a photoelectric conversion region. The substrate has a charge accumulation region. The photoelectric conversion region is provided on the substrate. The photoelectric conversion region is configured to generate signal charges to be accumulated in the charge accumulation region. The photoelectric conversion region comprises a material that is not transparent.Type: ApplicationFiled: June 7, 2011Publication date: December 22, 2011Applicant: SONY CORPORATIONInventors: Atsushi Toda, Teruo Hirayama
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Patent number: 7459735Abstract: A solid-state imaging device capable of reducing the occurrence of a dark current and a pixel defect is provided. A solid-state imaging device 10 is formed in which a plurality of photoelectric conversion elements 4 are formed in a semiconductor substrate 1; circuits 5 which read out signal charge from each of the plurality of photoelectric conversion elements 4 are respectively formed on the semiconductor substrate 1; light is applied from the opposite side to the circuits 5 which read out signal charge from each of the plurality of photoelectric conversion elements; and a gettering region is provided in an element-isolation area 2 which separate the photoelectric conversion elements 4 adjacent to each other.Type: GrantFiled: March 30, 2005Date of Patent: December 2, 2008Assignee: Sony CorporationInventors: Takayuki Ezaki, Teruo Hirayama, Hideo Kanbe
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Patent number: 7402450Abstract: A solid-state image pickup device 1 according to the present invention includes a semiconductor substrate 2 on which a pixel 20 composed of a photodiode 3 and a transistor is formed. The transistor comprising the pixel 20 is formed on the surface of the semiconductor substrate, a pn junction portion formed between high concentration regions of the photodiode 3 is provided within the semiconductor substrate 2 and a part of the pn junction portion of the photodiode 3 is extended to a lower portion of the transistor formed on the surface of the semiconductor substrate 2. According to the present invention, there is provided a solid-state image pickup device in which a pixel size can be microminiaturized without lowering a saturated electric charge amount (Qs) and sensitivity.Type: GrantFiled: June 25, 2007Date of Patent: July 22, 2008Assignee: Sony CorporationInventors: Takayuki Ezaki, Teruo Hirayama
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Publication number: 20080083940Abstract: A solid-state image pickup device 1 according to the present invention includes a semiconductor substrate 2 on which a pixel 20 composed of a photodiode 3 and a transistor is formed. The transistor comprising the pixel 20 is formed on the surface of the semiconductor substrate, a pn junction portion formed between high concentration regions of the photodiode 3 is provided within the semiconductor substrate 2 and a part of the pn junction portion of the photodiode 3 is extended to a lower portion of the transistor formed on the surface of the semiconductor substrate 2. According to the present invention, there is provided a solid-state image pickup device in which a pixel size can be microminiaturized without lowering a saturated electric charge amount (Qs) and sensitivity.Type: ApplicationFiled: October 29, 2007Publication date: April 10, 2008Inventors: Takayuki Ezaki, Teruo Hirayama
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Publication number: 20070246746Abstract: A solid-state image pickup device 1 according to the present invention includes a semiconductor substrate 2 on which a pixel 20 composed of a photodiode 3 and a transistor is formed. The transistor comprising the pixel 20 is formed on the surface of the semiconductor substrate, a pn junction portion formed between high concentration regions of the photodiode 3 is provided within the semiconductor substrate 2 and a part of the pn junction portion of the photodiode 3 is extended to a lower portion of the transistor formed on the surface of the semiconductor substrate 2. According to the present invention, there is provided a solid-state image pickup device in which a pixel size can be microminiaturized without lowering a saturated electric charge amount (Qs) and sensitivity.Type: ApplicationFiled: June 25, 2007Publication date: October 25, 2007Inventors: Takayuki Ezaki, Teruo Hirayama
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Patent number: 7235826Abstract: A solid-state image pickup device 1 according to the present invention includes a semiconductor substrate 2 on which a pixel 20 composed of a photodiode 3 and a transistor is formed. The transistor comprising the pixel 20 is formed on the surface of the semiconductor substrate, a pn junction portion formed between high concentration regions of the photodiode 3 is provided within the semiconductor substrate 2 and a part of the pn junction portion of the photodiode 3 is extended to a lower portion of the transistor formed on the surface of the semiconductor substrate 2. According to the present invention, there is provided a solid-state image pickup device in which a pixel size can be microminiaturized without lowering a saturated electric charge amount (Qs) and sensitivity.Type: GrantFiled: February 3, 2005Date of Patent: June 26, 2007Assignee: Sony CorporationInventors: Takayuki Ezaki, Teruo Hirayama
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Patent number: 7135378Abstract: A semiconductor device of MCM type allowing high-density assembly and a process of fabricating the same is provided. There are provided semiconductor chips mounted on a supporting substrate and incrusted in an insulation film on the supporting substrate and wiring formed in the insulation film so as to connect to each semiconductor chip through connection holes provided in the insulation film. Then, an interlayer dielectric covers such wiring that is connected to an upper layer wiring, through connection holes provided in such interlayer dielectric. In addition, an upper layer insulation film covers the upper layer wiring, and an electrode, connected to such upper layer wiring through another connection hole, is provided on such upper layer insulation film.Type: GrantFiled: November 21, 2003Date of Patent: November 14, 2006Assignee: Sony CorporationInventors: Yuji Takaoka, Yukihiro Kamide, Teruo Hirayama, Masaki Hatano
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Patent number: 6946747Abstract: A semiconductor device of the MCM type capable of high-speed operation and low power consumption and its manufacturing method are provided. A plurality of semiconductor chips, each having an internal circuit as well as an external connection circuit drawn from the internal circuit, are mounted on the same supporting substrate of this semiconductor device. Semiconductor chips are connected with each other, not by way of the external connection circuits, but directly at a portion between the internal circuits through wiring. This wiring is patterned on an insulating film provided on the supporting substrate and covers the semiconductor chips. Accordingly, through connection holes formed on the insulating film, connection can be established to the internal circuits or the wiring can be formed on the supporting substrate side. If the wiring is formed on the supporting substrate side, the semiconductor chips are to be mounted facing down relative to the supporting substrate.Type: GrantFiled: March 12, 2003Date of Patent: September 20, 2005Assignee: Sony CorporationInventors: Yukari Mori, Takayuki Ezaki, Teruo Hirayama, Naoto Sasaki, Hiroshi Ozaki, Natsuya Ishikawa
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Patent number: 6936525Abstract: A method of manufacturing the semiconductor chips comprises the steps of: pasting on a substrate an adhesive sheet having a property to retain its adhesive strength prior to a processing, then lose its adhesive strength after the processing; fixing a plurality of non-defective bare chips on this adhesive sheet, with their Al electrode pad surfaces facing down; coating a resin on a whole area other than the Al electrode pad surfaces of the plurality of non-defective bare chips including interspaces therebetween; applying a predetermined process to the adhesive sheet to weaken its adhesive strength of the adhesive sheet; peeling off a pseudo wafer bonding non-defective bare chips; and dicing the plurality of non-defective bare chips into a discrete non-defective electronic part by cutting the pseudo wafer at a position of the resin between respective non-defective bare chips.Type: GrantFiled: September 6, 2002Date of Patent: August 30, 2005Assignee: Sony CorporationInventors: Kazuo Nishiyama, Hiroshi Ozaki, Yuji Takaoka, Teruo Hirayama
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Publication number: 20050179053Abstract: A solid-state imaging device capable of reducing the occurrence of a dark current and a pixel defect is provided. A solid-state imaging device 10 is formed in which a plurality of photoelectric conversion elements 4 are formed in a semiconductor substrate 1; circuits 5 which read out signal charge from each of the plurality of photoelectric conversion elements 4 are respectively formed on the semiconductor substrate 1; light is applied from the opposite side to the circuits 5 which read out signal charge from each of the plurality of photoelectric conversion elements; and a gettering region is provided in an element-isolation area 2 which separate the photoelectric conversion elements 4 adjacent to each other.Type: ApplicationFiled: March 30, 2005Publication date: August 18, 2005Inventors: Takayuki Ezaki, Teruo Hirayama, Hideo Kanbe
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Publication number: 20050167704Abstract: A solid-state image pickup device 1 according to the present invention includes a semiconductor substrate 2 on which a pixel 20 composed of a photodiode 3 and a transistor is formed. The transistor comprising the pixel 20 is formed on the surface of the semiconductor substrate, a pn junction portion formed between high concentration regions of the photodiode 3 is provided within the semiconductor substrate 2 and a part of the pn junction portion of the photodiode 3 is extended to a lower portion of the transistor formed on the surface of the semiconductor substrate 2. According to the present invention, there is provided a solid-state image pickup device in which a pixel size can be microminiaturized without lowering a saturated electric charge amount (Qs) and sensitivity.Type: ApplicationFiled: February 3, 2005Publication date: August 4, 2005Inventors: Takayuki Ezaki, Teruo Hirayama
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Patent number: 6911844Abstract: An electronic circuit apparatus and integrated circuit device, wherein an arrangement of connection terminals, external connection terminals and input/output interface circuits of a semiconductor chip as a unit circuit device is optimized so as to attain a suppression of a power consumption and a shorter signal transmission time, configured that only connection pads are allocated to be arranged on a mutually adjacent side of semiconductor chips 1 and 2, and input/output interface circuits, test pads and external connection pads are arranged along the remaining three sides, moreover, the connection pads and the electronic circuits are directly connected and not connected via the input/output interface circuits.Type: GrantFiled: June 26, 2003Date of Patent: June 28, 2005Assignee: Sony CorporationInventors: Naoto Sasaki, Teruo Hirayama
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Publication number: 20040113245Abstract: A semiconductor device of MCM type allowing high-density assembly and a process of fabricating the same is provided.Type: ApplicationFiled: November 21, 2003Publication date: June 17, 2004Inventors: Yuji Takaoka, Yukihiro Kamide, Teruo Hirayama, Masaki Hatano