Abstract: A semiconductor device according to an embodiment includes a semiconductor chip having a transistor region and a diode region, and a conductor. The semiconductor chip includes a first electrode, a second electrode, a silicon carbide layer between the first electrode and the second electrode, and a gate electrode. The first electrode includes a first region in the transistor region and a second region in the diode region. A first contact area between the conductor and the first region is larger than a second contact area between the conductor and the second region.

Abstract: A semiconductor device according to an embodiment includes a semiconductor chip having a transistor region and a diode region, a first conductor, and a second conductor. The semiconductor chip includes a first electrode, a second electrode, a silicon carbide layer between the first electrode and the second electrode, and a gate electrode. The transistor region is provided with a third electrode spaced apart from the first electrode and close to the diode region. One end of the first conductor is in contact with the first electrode, and one end of the second conductor is in contact with the third electrode.

Abstract: A semiconductor device according to an embodiment includes a transistor region and a diode region. The transistor region includes n-type first SiC region having a first portion contacting a first plane, p-type second SiC region, n-type third SiC region, and a gate electrode. The diode region includes the first SiC region having a second portion contacting the first plane and p-type fourth SiC region. The semiconductor device includes a first electrode contacting the first portion and the second portion and a second electrode contacting a second plane. An occupied area per unit area of the fourth SiC region is larger than an occupied area per unit area of the second SiC region. In addition, a first diode region is provided between a first transistor region and a second transistor region. An inorganic insulating layer is provided between the first electrode and a gate wiring adjacent to the first electrode.

Abstract: A semiconductor device according to an embodiment includes a transistor region and a diode region. The transistor region includes a first silicon carbide region of n-type having a first portion in contact with a first plane, a second silicon carbide region of p-type, a third silicon carbide region of n-type, and a gate electrode. The diode region includes the first silicon carbide region of n-type having a second portion in contact with the first plane and a fourth silicon carbide region of p-type. The semiconductor device includes a gate wiring electrically connected to the gate electrode. A distance between a high-concentration portion included in the fourth silicon carbide region and the gate wiring is larger than a distance between a high-concentration portion included in the second silicon carbide region and the gate wiring.

Abstract: The image data generation device includes a component information input section and an image data generation section. The component information input section is configured to input a mounting position and an outer shape of the electronic component for each of the multiple electronic components to be mounted in the mounting processing. The mounting position includes a position in a height direction orthogonal to a surface of the board. The image data generation section is configured to generate image data for displaying a state when each of the multiple electronic components to be mounted in the mounting processing is arranged at the mounting position of the electronic component based on the mounting position and the outer shape of the electronic component input by the component information input section.

Abstract: A data management device includes a determination section and an output section. Here, a set of data used in a mounting process of mounting a component on a substrate is defined as a data group. The determination section determines whether the derivative data group is associated with each of multiple types of the reference data groups. The output section outputs an identification information identifying a specific reference data group, which is the reference data group with which the derivative data group is associated, so as to be distinguishable from identification information identifying a normal reference data group, which is the reference data group with which the derivative data group is not associated, based on a determination result by the determination section.

Abstract: A semiconductor device of embodiments includes: an element region including a transistor, a first diode, and a first contact portion; a termination region surrounding the element region and including a second contact portion; and an intermediate region provided between the element region and the termination region and not including the transistor, the first diode, the first contact portion, and the second contact portion. The element region includes a first electrode, a second electrode, a gate electrode, a silicon carbide layer, and a gate insulating layer. The termination region includes a first wiring layer electrically connected to the first electrode, the second electrode, and the silicon carbide layer. The intermediate region includes the silicon carbide layer. The width of the intermediate region in a direction from the element region to the termination region is equal to or more than twice the thickness of the silicon carbide layer.

Abstract: A semiconductor device of embodiments includes: a first electrode; a second electrode; a gate electrode extending in a first direction; and a SiC layer. The SiC layer includes: a first conductive type first SiC region having a first region, a second region facing the gate electrode, and a third region in contact with the first electrode; a second conductive type second SiC region between the second region and the third region; a second conductive type third SiC region, the second region interposed between the second SiC region and the third SiC region; a second conductive type fourth SiC region, the third region interposed between the second SiC region and the fourth SiC region; a first conductive type fifth SiC region; a second conductive type sixth SiC region between the first region and the second SiC region; and a second conductive type seventh SiC region between the first region and the second SiC region and distant from the sixth SiC region in the first direction.

Abstract: A semiconductor device of embodiments includes: an element region including a transistor and a first diode; a termination region surrounding the element region and including a second diode; and an intermediate region between the element region and the termination region. The element region includes a first electrode, a second electrode, a gate electrode, a silicon carbide layer, and a gate insulating layer. The termination region includes a first wiring layer electrically connected to the first electrode, the second electrode, and the silicon carbide layer. The intermediate region includes a gate electrode pad, a first connection layer electrically connecting the first electrode and a part of the first wiring layer, a second connection layer electrically connecting the first electrode and another part of the first wiring layer, a second wiring layer electrically connected to the gate electrode pad and the gate electrode, and the silicon carbide layer.

Abstract: There is provided a production management apparatus including: a memory section configured to memorize component data in which ranks of LED components stored in the stocker are associated with identification information of the LED components; a rank input section configured to accept a rank of the LED component in the LED components of the multiple types as a designated rank, the LED component being used in producing the board product; and a component group generating section configured to generate a component group into which the LED components of the multiple ranks including the designated rank are combined so as to satisfy a required specification of the board product, based on the ranks of the LED components which are included in the component data.

Abstract: A semiconductor device according to an embodiment includes, a silicon carbide layer having first and second planes; a first electrode on the first plane; a second electrode on the second plane; a first conductivity type first silicon carbide region; second and third silicon carbide regions of a second conductivity type between the first silicon carbide region and the first plane; a first conductivity type fifth silicon carbide region between the first and the second silicon carbide region with higher impurity concentration than the first silicon carbide region; a first conductivity type sixth silicon carbide region between the first and the third silicon carbide region with higher impurity concentration than the first silicon carbide region; a first conductivity type seventh silicon carbide region between the fifth and the sixth silicon carbide region with lower impurity concentration than the fifth and the sixth silicon carbide region; and a gate electrode.

Abstract: A semiconductor device according to an embodiment includes, a silicon carbide layer having first and second planes; a first electrode on the first plane; a second electrode on the second plane; a first conductivity type first silicon carbide region; second and third silicon carbide regions of a second conductivity type between the first silicon carbide region and the first plane; a first conductivity type fifth silicon carbide region between the first and the second silicon carbide region with higher impurity concentration than the first silicon carbide region; a first conductivity type sixth silicon carbide region between the first and the third silicon carbide region with higher impurity concentration than the first silicon carbide region; a first conductivity type seventh silicon carbide region between the fifth and the sixth silicon carbide region with lower impurity concentration than the fifth and the sixth silicon carbide region; and a gate electrode.

Abstract: The image processing device displays, on a display, a virtual screen obtained by viewing, from above, an aggregate board in which multiple unit boards having a common component configuration are arranged. A control section of the image processing device uses one unit board at a predetermined position among the multiple unit boards as a reference unit board, generates a detailed image in which respective components are arranged on the unit board based on positional information of all components to be mounted on the unit boards, for the reference unit board, generates a simplified image obtained by simplifying the unit board, for a non-reference unit board other than the reference unit board among the multiple unit boards, and displays a simple virtual screen displaying the detailed image at a position of the reference unit board and the simplified image at a position of the non-reference unit board as the virtual screen.

Abstract: A system including multiple inspection machines and an NG board discharge machine which moves an NG board to a checking position visible to a worker. The system acquires positional information of a circuit board during conveyance, and stores the NG board by associating a work result for the NG board with the positional information. In this manner, the positional information of the NG board is acquired. Based on the positional information, it is determined whether or not the circuit board conveyed to the NG board discharge machine is the NG board. When the circuit board conveyed to the NG board discharge machine is the NG board, a checking-purpose working machine discharges the NG board to the checking position.

Abstract: A component determination system for determining, in a case when a first component to be mounted on a board by a first mounting operation and a second component mounted on the board by a second mounting operation have a particular corresponding relationship, whether a combination of the first component and the second component mounted is permissible, the component determination system including: a first characteristic information acquiring section configured to acquire first characteristic information of the first component for which the first mounting operation has been completed; a second characteristic information acquiring section configured to acquire second characteristic information of the second component prepared prior to the second mounting operation; and a combination determining section configured to determine whether to allow the combination of the first component and the second component based on the acquired first characteristic information and the acquired second characteristic information.

Abstract: According to one embodiment, a semiconductor device includes a first element region. The first element region includes first, second, and third semiconductor regions, and first, and second conductive layers. The first semiconductor region includes first, second, and third partial regions. A second direction from the first partial region toward the first conductive layer crosses a first direction from the second partial region toward the first partial region. The third partial region is between the second partial region and the second conductive layer in the second direction. The second semiconductor region includes a first semiconductor portion. The first semiconductor portion is between the first partial region and the first conductive layer in the second direction. At least a portion of the third semiconductor region is between the first partial region and the first semiconductor portion in the second direction.

Abstract: A mounting order determination device for determining a mounting order of multiple electronic components prior to mounting work using a component mounting machine or a component mounting line, the mounting order determination device including a level setting section for setting level information, in which mounting order priorities are ranked, for each component type, the target of which being of at least one of a multilayer mounting component type group, including a component type of multiple electronic components having a possibility of being mounted in the up-down direction in layers, and a close-proximity mounting component type group.

Abstract: A changeover operation configuration device for use in a component mounting line including a registration section configured to register information of at least one of line layout information related to an arrangement of the component mounting line, work area layout information related to an arrangement of a work area at which the changeover operation is to be performed, and personnel quantity information of a quantity of operators who are to perform the changeover operation; an aggregation section configured to select the component type for which to perform changeover operation from the multiple component types, aggregate the component types to a restricted quantity of the component supply devices and designate the component supply devices as work targets; and a setting section configured to set an arrangement position of the component supply devices that are the work targets based on the at least one of the registered information.

Abstract: There is provided a production management apparatus including: a memory section configured to memorize component data in which ranks of LED components stored in the stocker are associated with identification information of the LED components; a rank input section configured to accept a rank of the LED component in the LED components of the multiple types as a designated rank, the LED component being used in producing the board product; and a component group generating section configured to generate a component group into which the LED components of the multiple ranks including the designated rank are combined so as to satisfy a required specification of the board product, based on the ranks of the LED components which are included in the component data.

Abstract: A substrate production control system includes production start timing obtaining section configured to obtain information of production start timing on substrate production lines, setup time estimation section configured to estimate setup times required for a setup work of setting up the substrate production line, setup start timing determination section configured to determine setup start timing of starting the setup work based on the production start timing and the setup time, delivery time estimation section configured to estimate delivery time required for a delivery work of receiving a member necessary for production of the substrate from member warehouse and conveying the member to at least one of an execution location (external setup area) of the setup work and the substrate production line, and delivery start timing determination section configured to determine delivery start timing of starting the delivery work based on the setup start timing and the delivery time.