Abstract: A wiring substrate includes an insulation layer, a first wiring layer, and a second wiring layer. The first wiring layer is embedded in the insulation layer with an upper surface of the first wiring layer exposed from the insulation layer. The second wiring layer includes a terminal portion located at a lower position than a lower surface of the insulation layer and an embedded portion embedded in the insulation layer. The wiring substrate further includes a connection via connecting the first wiring layer and the embedded portion. The insulation layer includes an extension between the embedded portion and a lower surface of the first wiring layer. The extension includes a through hole. The connection via is located in the through hole of the extension.

Abstract: A circuit board includes a first metal layer; a second metal layer that is arranged on the first metal layer; and a sealing resin with which a space between the first metal layer and the second metal layer is filled, wherein the second metal layer includes an electrode that protrudes from an upper surface of the sealing resin and that has an end face on which an electronic part is mountable; and an interlayer connector whose upper surface is exposed in a position lower than the end face of the electrode from the upper surface of the sealing resin and that makes contact with the first metal layer.

Abstract: A lead frame includes a first frame member including a die pad; a second frame member that is layered on the first frame member and that includes a lead; and a resin with which a space around the die pad and the lead is filled, wherein the die pad includes a rising portion and a buried portion, the rising portion rises from the resin, the buried portion is buried in the resin and has a mount surface on which a semiconductor element is to be mounted and a side surface that is continuous to the mount surface, and the side surface is covered with the resin and has a constriction that is depressed in a direction parallel to the mount surface.

Abstract: A wiring substrate includes a resin layer formed of an insulating resin, a first component, at least a part of which is embedded in the resin layer, a first wiring embedded in the resin layer, the first wiring including an exposed surface exposed from the resin layer at a first surface-side of the resin layer, and a first electrode including a wiring portion and an electrode portion, the wiring portion embedded in the resin layer and connecting to the first component in the resin layer, the electrode portion protruding from the first surface-side of the resin layer to a position higher than the exposed surface of the first wiring.

Abstract: A circuit board includes a first metal layer; a second metal layer that is arranged on the first metal layer; and a sealing resin with which a space between the first metal layer and the second metal layer is filled, wherein the second metal layer includes an electrode that protrudes from an upper surface of the sealing resin and that has an end face on which an electronic part is mountable; and an interlayer connector whose upper surface is exposed in a position lower than the end face of the electrode from the upper surface of the sealing resin and that makes contact with the first metal layer.

Abstract: A wiring substrate includes an insulation layer, a first wiring layer, and a second wiring layer. The first wiring layer is embedded in the insulation layer with an upper surface of the first wiring layer exposed from the insulation layer. The second wiring layer includes a terminal portion located at a lower position than a lower surface of the insulation layer and an embedded portion embedded in the insulation layer. The wiring substrate further includes a connection via connecting the first wiring layer and the embedded portion. The insulation layer includes an extension between the embedded portion and a lower surface of the first wiring layer. The extension includes a through hole. The connection via is located in the through hole of the extension.

Abstract: A manufacturing method of a semiconductor device includes mounting a semiconductor element on a first electrode disposed on a first surface of a substrate; preparing a metal plate including a main body part and a projection part; mounting the metal plate on the first surface side of the substrate, by joining the projection part to a second electrode that is disposed on the first surface of the substrate; sealing the semiconductor element and the projection part with a sealing resin; and forming an electrode terminal made of a base end part that is connected to the second electrode and has a side surface that is covered by the sealing resin, and a tip end part that is integrally formed with the base end part and that projects from a front surface of the sealing resin, by etching the main body part excluding a portion overlapping with the projection part.

Abstract: A wiring substrate includes a resin layer formed of an insulating resin, a first component, at least a part of which is embedded in the resin layer, a first wiring embedded in the resin layer, the first wiring including an exposed surface exposed from the resin layer at a first surface-side of the resin layer, and a first electrode including a wiring portion and an electrode portion, the wiring portion embedded in the resin layer and connecting to the first component in the resin layer, the electrode portion protruding from the first surface-side of the resin layer to a position higher than the exposed surface of the first wiring.

Abstract: A manufacturing method of a semiconductor device includes mounting a semiconductor element on a first electrode disposed on a first surface of a substrate; preparing a metal plate including a main body part and a projection part; mounting the metal plate on the first surface side of the substrate, by joining the projection part to a second electrode that is disposed on the first surface of the substrate; sealing the semiconductor element and the projection part with a sealing resin; and forming an electrode terminal made of a base end part that is connected to the second electrode and has a side surface that is covered by the sealing resin, and a tip end part that is integrally formed with the base end part and that projects from a front surface of the sealing resin, by etching the main body part excluding a portion overlapping with the projection part.

Abstract: A substrate-with-support includes: a substrate having a wiring area, an outer peripheral area provided on an outer peripheral side of the wiring area, and a plurality of support joint portions being provided on the outer peripheral area; and a support made of metal having an outer frame portion arranged to face the outer peripheral area and to expose the wiring area, and a plurality of protruding portions being provided on the outer frame portion, wherein the support joint portions and the protruding portions are joined to each other.

Abstract: A substrate-with-support includes: a substrate having a wiring area, an outer peripheral area provided on an outer peripheral side of the wiring area, and a plurality of support joint portions being provided on the outer peripheral area; and a support made of metal having an outer frame portion arranged to face the outer peripheral area and to expose the wiring area, and a plurality of protruding portions being provided on the outer frame portion, wherein the support joint portions and the protruding portions are joined to each other.

Abstract: A wiring substrate includes an insulation layer, a first wiring layer, and a second wiring layer. The first wiring layer is embedded in the insulation layer with an upper surface of the first wiring layer exposed from the insulation layer. The second wiring layer includes a terminal portion located at a lower position than a lower surface of the insulation layer and an embedded portion embedded in the insulation layer. The wiring substrate further includes a connection via connecting the first wiring layer and the embedded portion. The insulation layer includes an extension between the embedded portion and a lower surface of the first wiring layer. The extension includes a through hole. The connection via is located in the through hole of the extension.

Abstract: A lead frame includes: a resin portion including an upper surface and a lower surface opposite to the upper surface; and a first terminal formed to penetrate the resin portion. The first terminal includes: a first upper terminal portion disposed to protrude from the upper surface; a first lower terminal portion disposed on the first upper terminal portion to protrude from the lower surface; a first through hole formed in one of the first upper terminal portion and the first lower terminal portion; a first recess defined by an inner wall surface of the first through hole and a surface of the other of the first upper terminal portion and the first lower terminal portion; and a first metal layer formed on an inner surface of the first recess.

Abstract: A lead frame includes a first lead frame including a first lead; a second lead frame including a second lead, the second lead frame being stacked on the first lead frame so that a space is formed between the first lead frame and the second lead frame, and the second lead being bonded to the first lead; and a resin portion provided in the space formed between the first lead frame and the second lead frame, wherein each of the first lead and the second lead includes an embedded portion embedded in the resin portion, and a protruding portion protruded from the resin portion, and wherein the embedded portion of the first lead and the embedded portion of the second lead are bonded in the resin portion.

Abstract: A lead frame includes: a resin portion including an upper surface and a lower surface opposite to the upper surface; and a first terminal formed to penetrate the resin portion. The first terminal includes: a first upper terminal portion disposed to protrude from the upper surface; a first lower terminal portion disposed on the first upper terminal portion to protrude from the lower surface; a first through hole formed in one of the first upper terminal portion and the first lower terminal portion; a first recess defined by an inner wall surface of the first through hole and a surface of the other of the first upper terminal portion and the first lower terminal portion; and a first metal layer formed on an inner surface of the first recess.

Abstract: A lead frame includes a first lead frame including a first lead; a second lead frame including a second lead, the second lead frame being stacked on the first lead frame so that a space is formed between the first lead frame and the second lead frame, and the second lead being bonded to the first lead; and a resin portion provided in the space formed between the first lead frame and the second lead frame, wherein each of the first lead and the second lead includes an embedded portion embedded in the resin portion, and a protruding portion protruded from the resin portion, and wherein the embedded portion of the first lead and the embedded portion of the second lead are bonded in the resin portion.

Abstract: A semiconductor device includes a lead frame having terminals, a semiconductor chip electrically coupled to the terminals, and a resin part configured to encapsulate the semiconductor chip such as to expose part of the terminals, wherein a given one of the terminals includes a first lead and a second lead welded together such that an upper face of the first lead is placed against a lower face of the second lead, wherein the lower face of the second lead extends further than the upper face of the first lead toward the semiconductor chip in a longitudinal direction of the terminal, and also extends further sideways than the upper face of the first lead in a transverse direction of the terminal, and wherein an area of the lower face of the second lead is covered with the resin part, the area extending further than the upper face of the first lead.

Abstract: A semiconductor device includes a lead frame having terminals, a semiconductor chip electrically coupled to the terminals, and a resin part configured to encapsulate the semiconductor chip such as to expose part of the terminals, wherein a given one of the terminals includes a first lead and a second lead welded together such that an upper face of the first lead is placed against a lower face of the second lead, wherein the lower face of the second lead extends further than the upper face of the first lead toward the semiconductor chip in a longitudinal direction of the terminal, and also extends further sideways than the upper face of the first lead in a transverse direction of the terminal, and wherein an area of the lower face of the second lead is covered with the resin part, the area extending further than the upper face of the first lead.

Abstract: In a method of manufacturing a lead frame for use in a leadless package such as a quad flat non-leaded package (QFN), a base frame is first formed which includes a region for resin-molding a plurality of semiconductor elements to be mounted on one surface of the base frame, the region being partitioned into land shapes, and in which a die-pad portion and lead portions around the die-pad portion are defined severally for the individual semiconductor elements to be mounted in each of the partitioned regions for resin-molding. Next, an adhesive tape is attached to the other surface of the base frame, and subsequently a cut portion is provided at a portion corresponding to a region between two adjacent partitioned regions for resin-molding, of the adhesive tape.

Abstract: First, a sheet member which is being unwound and conveyed from a winding body, and in which a conductive film is stuck on a support sheet, is stamped in such a shape that a coil portion, a frame portion defined around the coil portion, and a joining portion connecting the coil portion to the frame portion are left unstamped. Next, a protective sheet which is made sticky, is stuck onto a surface of the stamped structure where the conductive film is stuck, and then the support sheet is peeled off. Next, an insulative support sheet which is being unwound and conveyed from a winding body, is stuck onto a surface of the structure with the protective sheet stuck thereon where the stamped conductive film is stuck, and then the protective sheet is peeled off.