Patents by Inventor Tetsuichiro Kasahara

Tetsuichiro Kasahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050101055
    Abstract: In a method of manufacturing a lead frame for use in a leadless package such as a quad flat non-leaded package (QFN), a base frame is first formed which includes a region for resin-molding a plurality of semiconductor elements to be mounted on one surface of the base frame, the region being partitioned into land shapes, and in which a die-pad portion and lead portions around the die-pad portion are defined severally for the individual semiconductor elements to be mounted in each of the partitioned regions for resin-molding. Next, an adhesive tape is attached to the other surface of the base frame, and subsequently a cut portion is provided at a portion corresponding to a region between two adjacent partitioned regions for resin-molding, of the adhesive tape.
    Type: Application
    Filed: December 23, 2004
    Publication date: May 12, 2005
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Tetsuichiro Kasahara, Hideto Tanaka
  • Patent number: 6875630
    Abstract: In a method of manufacturing a lead frame for use in a leadless package such as a quad flat non-leaded package (QFN), a base frame is first formed which includes a region for resin-molding a plurality of semiconductor elements to be mounted on one surface of the base frame, the region being partitioned into land shapes, and in which a die-pad portion and lead portions around the die-pad portion are defined severally for the individual semiconductor elements to be mounted in each of the partitioned regions for resin-molding. Next, an adhesive tape is attached to the other surface of the base frame, and subsequently a cut portion is provided at a portion corresponding to a region between two adjacent partitioned regions for resin-molding, of the adhesive tape.
    Type: Grant
    Filed: October 24, 2002
    Date of Patent: April 5, 2005
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Tetsuichiro Kasahara, Hideto Tanaka
  • Publication number: 20040231138
    Abstract: First, a sheet member which is being unwound and conveyed from a winding body, and in which a conductive film is stuck on a support sheet, is stamped in such a shape that a coil portion, a frame portion defined around the coil portion, and a joining portion connecting the coil portion to the frame portion are left unstamped. Next, a protective sheet which is made sticky, is stuck onto a surface of the stamped structure where the conductive film is stuck, and then the support sheet is peeled off. Next, an insulative support sheet which is being unwound and conveyed from a winding body, is stuck onto a surface of the structure with the protective sheet stuck thereon where the stamped conductive film is stuck, and then the protective sheet is peeled off.
    Type: Application
    Filed: April 28, 2004
    Publication date: November 25, 2004
    Inventors: Tetsuichiro Kasahara, Hitoshi Yoshikawa
  • Patent number: 6797543
    Abstract: A process for manufacturing an IC card includes a step of forming a plane coil by etching or punching a thin metal plate so that the plane coil consists of a conductor line wound as several loops in substantially the same plane and has respective terminals. A semiconductor element having electrodes is mounted on the plane coil. An adhesive agent or tape is attached to a predetermined area of the plane coil so that adjacent conductor lines in the loops are kept a predetermined gap therebetween. The plane coil is disposed between a pair of films to cover the plane coil therebetween, one of the films being provided with adhesive layer on a surface facing to the other film to seal the plane coil with the semiconductor element by attaching the pair of films with respect to each other by means of the adhesive layer.
    Type: Grant
    Filed: July 2, 2003
    Date of Patent: September 28, 2004
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Tetsuichiro Kasahara, Hirokazu Tsukioka, Shintaro Hayashi
  • Publication number: 20040080025
    Abstract: In a lead frame, a die-pad portion is defined for a semiconductor element to be mounted, a plurality of wire bonding portions are arranged along a periphery of the die-pad portion within a region to be finally divided as a semiconductor device for the die-pad portion, and a plurality of land-like external terminal portions are arranged in a region outside the wire bonding portions. Furthermore, a plurality of linear connection lead portions are formed to integrally join the wire bonding portions to the respective corresponding external terminal portions. The die-pad portion, the wire bonding portions, the external terminal portions and the connection lead portions are supported by an adhesive tape.
    Type: Application
    Filed: September 15, 2003
    Publication date: April 29, 2004
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Tetsuichiro Kasahara, Akinobu Abe
  • Publication number: 20040046237
    Abstract: A lead frame includes a frame portion and a plurality of land-like conductor portions arranged in a lattice pattern in a region within the frame portion. The frame portion and the land-like conductor portions are supported by an adhesive tape. Each of the land-like conductor portions is formed of part of each of a plurality of leads at a portion where each lead intersects each other, the plurality of leads being discontinuously arranged so as to be orthogonal to each other. Each portion where the leads intersect each other is formed to be larger than a width of the corresponding lead.
    Type: Application
    Filed: September 4, 2003
    Publication date: March 11, 2004
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD
    Inventors: Akinobu Abe, Tetsuichiro Kasahara, Kesayuki Sonehara
  • Publication number: 20040023435
    Abstract: A process for manufacturing an IC card includes a step of forming a plane coil by etching or punching a thin metal plate so that the plane coil consists of a conductor line wound as several loops in substantially the same plane and has respective terminals. A semiconductor element having electrodes is mounted on the plane coil. An adhesive agent or tape is attached to a predetermined area of the plane coil so that adjacent conductor lines in the loops are kept a predetermined gap therebetween. The plane coil is disposed between a pair of films to cover the plane coil therebetween, one of the films being provided with adhesive layer on a surface facing to the other film to seal the plane coil with the semiconductor element by attaching the pair of films with respect to each other by means of the adhesive layer.
    Type: Application
    Filed: July 2, 2003
    Publication date: February 5, 2004
    Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventors: Tetsuichiro Kasahara, Hirokazu Tsukioka, Shintaro Hayashi
  • Patent number: 6631847
    Abstract: There is provided an IC card having a plane coil in which a short circuit is seldom caused by the deformation generated by an external force given to the plane coil in the traverse direction. An IC card 10 comprises a rectangular plane coil 14 formed by punching or etching a thin metallic sheet in which a conductor line 12 is wound a plurality of times on substantially the same plane, wherein terminals at both ends of the plane coil 14 and electrode terminals of a semiconductor element 16 are electrically connected with each other, and a bent portion 20 composed of a curved portion in which the conductor 12 on each winding composing a linear portion of the plane coil 14 is curved at the substantially same position in the same direction is formed in the conductor on each winding of the plane coil 14.
    Type: Grant
    Filed: May 18, 2000
    Date of Patent: October 14, 2003
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Tetsuichiro Kasahara, Hirokazu Tsukioka, Hirofumi Haniuda
  • Patent number: 6630370
    Abstract: A process for manufacturing an IC card includes a step of forming a plane coil by etching or punching a thin metal plate so that the plane coil consists of a conductor line wound as several loops in substantially the same plane and has respective terminals. A semiconductor element having electrodes is mounted on the plane coil. An adhesive agent or tape is attached to a predetermined area of the plane coil so that adjacent conductor lines in the loops are kept a predetermined gap therebetween. The plane coil is disposed between a pair of films to cover the plane coil therebetween, one of the films being provided with adhesive layer on a surface facing to the other film to seal the plane coil with the semiconductor element by attaching the pair of films with respect to each other by means of the adhesive layer.
    Type: Grant
    Filed: September 29, 1999
    Date of Patent: October 7, 2003
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Tetsuichiro Kasahara, Hirokazu Tsukioka, Shintaro Hayashi
  • Publication number: 20030082854
    Abstract: In a method of manufacturing a lead frame for use in a leadless package such as a quad flat non-leaded package (QFN), a base frame is first formed which includes a region for resin-molding a plurality of semiconductor elements to be mounted on one surface of the base frame, the region being partitioned into land shapes, and in which a die-pad portion and lead portions around the diepad portion are defined severally for the individual semiconductor elements to be mounted in each of the partitioned regions for resin-molding. Next, an adhesive tape is attached to the other surface of the base frame, and subsequently a cut portion is provided at a portion corresponding to a region between two adjacent partitioned regions for resin-molding, of the adhesive tape.
    Type: Application
    Filed: October 24, 2002
    Publication date: May 1, 2003
    Inventors: Tetsuichiro Kasahara, Hideto Tanaka
  • Publication number: 20020177255
    Abstract: A process for manufacturing an IC card includes a step of forming a plane coil by etching or punching a thin metal plate so that the plane coil consists of a conductor line wound as several loops in substantially the same plane and has respective terminals. A semiconductor element having electrodes is mounted on the plane coil. An adhesive agent or tape is attached to a predetermined area of the plane coil so that adjacent conductor lines in the loops are kept a predetermined gap therebetween. The plane coil is disposed between a pair of films to cover the plane coil therebetween, one of the films being provided with adhesive layer on a surface facing to the other film to seal the plane coil with the semiconductor element by attaching the pair of films with respect to each other by means of the adhesive layer.
    Type: Application
    Filed: September 29, 1999
    Publication date: November 28, 2002
    Applicant: Shinko Electric Industries Co., Ltd
    Inventors: TETSUICHIRO KASAHARA, HIROKAZU TSUKIOKA, SHINTARO HAYASHI