Abstract: A display device is provided which is capable of inhibiting a localized elevation in the temperature of a casing thereby uniformalizing the surface temperature distribution over the casing. A display device includes: a display panel having surface arrays of plural pixels for displaying an image by light radiation control on a pixel to pixel basis; an electronic component forming a control circuit configured to perform the light radiation control; a casing housing the display panel and the electronic component therein; and a flat heat-conductive sheet interposed between the display panel and the casing and between the electronic component and the casing.

Abstract: An organic thin film transistor of the present invention includes a substrate (11) and a semiconductor layer (14) made of an organic semiconductor and formed on the substrate (11). The semiconductor layer (14) is composed of crystals of the organic semiconductor, and a crystal phase of the crystals is the same as a crystal phase of energetically most stable bulk crystals of the organic semiconductor. A method for manufacturing the organic thin film transistor of the present invention includes forming the semiconductor layer (14) by depositing an organic semiconductor on the substrate (11). The organic semiconductor is deposited at a deposition rate of 0.1 to 1 nm/min while maintaining the temperature of the substrate (11) in the range of 40 to 150° C.

Abstract: A flat panel display device is provided which is capable of reliably inhibiting the surface temperature of a relevant portion of the casing of the flat panel display device from rising too much while efficiently cooling the inside of the casing. The flat panel display device (100) of the invention includes: a flat display panel (11); a front cover (15) having an opening matching a display surface of the flat display panel (11); and a casing (18) having a first casing section (20) and a second casing section (21) and covering a rear side of the flat display panel (11), the first casing section (20) having a lower thermal conductivity than the second casing section (21), extending upwardly from the second casing section (21), and being provided with a vent hole.

Abstract: A number of minuscule LDD thin film transistors with high precision are arranged on a substrate for use in a liquid crystal display apparatus or other similar devices. The gate electrode is used as a mask at the time of injecting impurities into the semiconductor layer. To realize an LDD structure, the impurities are injected in two installments. The size of the gate electrode is changed in accordance with the length of the LDD regions between the first and second injections. The size of the gate electrode is changed by means of metal oxidation or dry etching. For precision dry etching of the gate electrode, various ideas are put into forming the photo resist.

Abstract: A display device is provided which is capable of inhibiting a localized elevation in the temperature of a casing thereby uniformalizing the surface temperature distribution over the casing. A display device (10) includes: a display panel (11) having surface arrays of plural pixels for displaying an image by light radiation control on a pixel to pixel basis; an electronic component (16a to 16f) forming a control circuit configured to perform the light radiation control; a casing (120) housing the display panel (11) and the electronic component (16a to 16f) therein; and a flat heat-conductive sheet (140) interposed between the display panel (11) and the casing (120) and between the electronic component (16a to 16f) and the casing (120).

Abstract: An organic thin film transistor of the present invention includes a substrate (11) and a semiconductor layer (14) made of an organic semiconductor and formed on the substrate (11). The semiconductor layer (14) is composed of crystals of the organic semiconductor, and a crystal phase of the crystals is the same as a crystal phase of energetically most stable bulk crystals of the organic semiconductor. A method for manufacturing the organic thin film transistor of the present invention includes forming the semiconductor layer (14) by depositing an organic semiconductor on the substrate (11). The organic semiconductor is deposited at a deposition rate of 0.1 to 1 nm/min while maintaining the temperature of the substrate (11) in the range of 40 to 150° C.

Abstract: A semiconductor device provided with a thin-film transistor comprising a polycrystalline semiconductor thin film (2) formed on an insulating substrate (100). The semiconductor device comprises a channel region (80), a source region (91), and a drain region (92), each disposed on both sides of the channel region (80) in the semiconductor thin film (100). The channel region (90) comprises both a first conductive impurity and a second conductive impurity, the conductive type of the second conductive impurity being opposite the conductive type of the first conductive impurity, and is structured by layering a first layer in which the first conductive impurity and the second conductive impurity are canceled and a second layer in which either of the first conductive impurity or the second conductive impurity is dominant, wherein a gate electrode (4) is formed so as to face the first layer (2a) via an insulating film (3).

Abstract: A number of minuscule LDD thin film transistors with high precision are arranged on a substrate for use in a liquid crystal display apparatus or other similar devices. The gate electrode is used as a mask at the time of injecting impurities into the semiconductor layer. To realize an LDD structure, the impurities are injected in two installments. The size of the gate electrode is changed in accordance with the length of the LDD regions between the first and second injections. The size of the gate electrode is changed by means of metal oxidation or dry etching. For precision dry etching of the gate electrode, various ideas are put into forming the photo resist.

Abstract: The present invention provide an LDD type TFT having excellent properties, particularly for a liquid crystal display unit. For this purpose, a top gate type LDDTFT gate electrode is converted into a two-stage structure by use of a chemical reaction or plating, and furthermore, into a shape in which an upper portion or a lower portion slightly protrudes on the source electrode side, or the drain electrode side relative to the other portions. Impurities are injected by using this electrode having this structure and shape as a mask. Prior to injection of impurities, the gate insulating film is removed, and a Ti film is formed for preventing hydrogen for dilution from coming in. This is also the case with the LDD-TFT on the bottom gate side.

Abstract: The present invention provide an LDD type TFT having excellent properties, particularly for a liquid crystal display unit. For this purpose, a top gate type LDDTFT gate electrode is converted into a two-stage structure by use of a chemical reaction or plating, and furthermore, into a shape in which an upper portion or a lower portion slightly protrudes on the source electrode side, or the drain electrode side relative to the other portions. Impurities are injected by using this electrode having this structure and shape as a mask. Prior to injection of impurities, the gate insulating film is removed, and a Ti film is formed for preventing hydrogen for dilution from coming in. This is also the case with the LDD-TFT on the bottom gate side.

Abstract: The present invention provide an LDD type TFT having excellent properties, particularly for a liquid crystal display unit. For this purpose, a top gate type LDDTFT gate electrode is converted into a two-stage structure by use of a chemical reaction or plating, and furthermore, into a shape in which an upper portion or a lower portion slightly protrudes on the source electrode side, or the drain electrode side relative to the other portions. Impurities are injected by using this electrode having this structure and shape as a mask. Prior to injection of impurities, the gate insulating film is removed, and a Ti film is formed for preventing hydrogen for dilution from coming in. This is also the case with the LDD-TFT on the bottom gate side.

Abstract: A method of fabricating a thin-film transistor including forming a polycrystalline semiconductor thin film on a substrate by irradiating with a laser beam an amorphous semiconductor thin film formed on the substrate. Heat treating the polycrystalline semiconductor thin film while the substrate is held by a substrate holder provided in a container containing hydrogen, and processing, prior to or after the heat treating, the polycrystalline semiconductor thin film into a specified configuration.

Abstract: There are reduced degradation of the performance of a transistor element, variations in the quality thereof, and the like resulting from the surface roughness of a polycrystalline silicon thin film formed by laser annealing, particularly from the presence of portions in which tramp materials are segregated produced in the rough portions. For this purpose, (1) The projections at the surface portion of the polycrystalline silicon thin film and the portions in which the tramp materials are segregated after laser annealing are chemically, mechanically graded. (2) Likewise, a heat treatment is performed to grow a crystal and planarize the rough portions, while removing the tramp materials in the surface.

Abstract: In producing a thin film transistor used for such devices as a large-sized liquid crystal display panel with a high pixel density, a leftover of an insulating film caused by insufficient etching and a loss of a semiconductor layer caused by overetching are prevented, and a reliable electrical contact between the source and drain electrodes and the semiconductor layer is achieved. These are achieved by (a) forming a contact hole region of a silicon film so that the region has a larger thickness, for example, by making the film to have a plurality of layers, and (b) providing a suicide layer between an electrode metal and the semiconductor layer.

Abstract: In producing a thin film transistor used for such devices as a large-sized liquid crystal display panel with a high pixel density, a leftover of an insulating film caused by insufficient etching and a loss of a semiconductor layer caused by overetching are prevented, and a reliable electrical contact between the source and drain electrodes and the semiconductor layer is achieved. These are achieved by (a) forming a contact hole region of a silicon film so that the region has a larger thickness, for example, by making the film to have a plurality of layers, and (b) providing a silicide layer between an electrode metal and the semiconductor layer.

Abstract: A method of making semiconductor devices with contacts protruding from openings in a passivation layer over an active chip area. Inside each opening, a relatively hard barrier layer is provided and a flash-plated film is applied to subsequently form a relatively soft diffusion barrier layer when a protruding contact is formed. Two semiconductor devices with electrodes are joined by embedding relatively hard electrodes of a first device into relatively soft electrodes of a second device. A reducing agent can be incorporated into an insulating resin applied between semiconductor chips at areas other than the bonded electrodes.

Abstract: A semiconductor device having a protection layer covering the active layer of a semiconductor chip with an opening therein corresponding in location to a chip electrode located on the active surface of the semiconductor chip. Inside the opening a barrier layer covers the chip electrode, a diffusion barrier layer covers the barrier layer and a protruding contact protruding from the diffusion barrier layer. The protruding contact preferably comprises material whose hardness is lower than that of each of the barrier layer and chip electrode.

Abstract: The main surface of a first semiconductor chip having a first functional element is formed with first testing electrodes for testing the electrical characteristics of the first functional element and first connecting electrodes electrically connected to the first functional element. The main surface of a second semiconductor chip having a second functional element is formed with second testing electrodes for testing the electrical characteristics of the second functional element and second connecting electrodes electrically connected to the second functional element. The first semiconductor chip and the second semiconductor chip are integrated by using an insulating resin, with first bumps formed on the first connecting electrodes being bonded to third bumps formed on the second connecting electrodes.

Abstract: The main surface of a first semiconductor chip having a first functional element is formed with first testing electrodes for testing the electrical characteristics of the first functional element and first connecting electrodes electrically connected to the first functional element. The main surface of a second semiconductor chip having a second functional element is formed with second testing electrodes for testing the electrical characteristics of the second functional element and second connecting electrodes electrically connected to the second functional element. The first semiconductor chip and the second semiconductor chip are integrated by using an insulating resin, with first bumps formed on the first connecting electrodes being bonded to third bumps formed on the second connecting electrodes.

Abstract: The present invention relates to connecting electronic components using bump electrodes to connect electronic components such as semiconductors with the patterning electrodes of a circuit board. In order to prevent deterioration in connecting reliability due to deformation and the like of semiconductors and circuit boards, it is necessary to have some elasticity incorporated within bump electrodes. The bump electrodes disclosed by the present invention have resin bumps with numerous cavities disposed within and covered by a low melting point metal layer. According to this composition, even when there are some variations of distribution in circuit board warp and bump electrode height, it is possible to absorb the variations through the elasticity presented by the bump electrodes. It is also possible to perform a low strain connection with a resultant enhancement in connecting reliability at high temperature.