Abstract: An image memory, image memory system, and memory controller that are capable of efficiently accessing a rectangular area of two-dimensionally arrayed data are provided. The memory device has: a memory cell array that has a plurality of memory unit areas, each of which is selected by addresses; a plurality of input/output terminals; and an input/output unit provided between the memory cell array and the plurality of input/output terminals.

Abstract: The microreactor for mixing and discharging multiple raw material liquids is obtained by laminating: a base plate in which a raw material introducing fluid channel is formed; a raw material introducing plate; and a mixing fluid channel plate which is arranged between the base plate and the raw material introducing plate, and in which a mixing fluid channel is formed. The microreactor includes: a mixing fluid channel in the mixing fluid channel plate which is formed in the mixing fluid channel plate, and in which a flow is contracted in its width direction; and a mixing fluid channel in the base plate which is formed in the base plate, and which has a fluid channel cross-section which becomes larger in its depth direction as it goes downstream. The mixing fluid channel in the base plate communicates with the mixing fluid channel in the mixing fluid channel plate, and is connected to an outlet orifice from which to discharge the mixed liquids.

Abstract: An arbiter circuit includes a priority coefficient calculating unit, a priority coefficient comparator an acceptance determining unit, and a priority determining unit. The priority coefficient calculating unit calculates for each request an arbitration priority coefficient based on a priority level set for each request by requesters. The priority coefficient comparator compares arbitration priority coefficients calculated for the requesters by the priority coefficient calculating unit. The acceptance determining unit determines whether to accept the requests based on the comparison result by the priority coefficient comparator. When the arbitration priority coefficient calculated by the priority coefficient calculating unit is equal between two or more requests, the priority determining unit determines a priority order for accepting the requests.

Abstract: A functional block design method capable of shortening the period needed for developing functional blocks in compliance with orders. A logic design is prepared for a desired number of memory floor plan blocks with respective predetermined data storage capacities and a fixed block different from the memory floor plan blocks, and block-based design data is created in compliance with the logic design. The created block-based design data is verified in that a constraint on the creation of a CPU macro is always fulfilled within the limits up to which the memory blocks can be mounted. Using the verified block-based design data, design data of a CPU macro functional block in which a desired number of memory blocks corresponding to a desired memory capacity are connected to the fixed block is generated.

Abstract: An integrated circuit layout method for placing a plurality of cells within a chip comprises a process for sorting the plurality of cells (or function macros) that are to be laid out in order of their delay times (or operation speed margins for macro), placing cells (or macros) having the largest delay times (or smallest speed margin for macro) closer to the peripheral area of the chip, and as the cell delay times get smaller(or the speed margins get larger), placing the relevant cells (or macros) closer to the central area of the chip.

Abstract: A functional block design method capable of shortening the period needed for developing functional blocks in compliance with orders. A logic design is prepared for a desired number of memory floor plan blocks with respective predetermined data storage capacities and a fixed block different from the memory floor plan blocks, and block-based design data is created in compliance with the logic design. The created block-based design data is verified in that a constraint on the creation of a CPU macro is always fulfilled within the limits up to which the memory blocks can be mounted. Using the verified block-based design data, design data of a CPU macro functional block in which a desired number of memory blocks corresponding to a desired memory capacity are connected to the fixed block is generated.

Abstract: An integrated circuit layout method for placing a plurality of cells within a chip comprises a process for sorting the plurality of cells (or function macros) that are to be laid out in order of their delay times (or operation speed margins for macro), placing cells (or macros) having the largest delay times (or smallest speed margin for macro) closer to the peripheral area of the chip, and as the cell delay times get smaller(or the speed margins get larger), placing the relevant cells (or macros) closer to the central area of the chip.

Abstract: A solar lighting apparatus according to the present inveniton is configured so that one lighting prism plate is rotatably arranged in a lighting portion or a plurality of lighting prism plates are rotatably arranged in the lighting portion at intervals of a predetermined distance, and a prism angle of each the lighting prism plate is controlled correspondingly to the height and azimuth of the sun so that the sunlight refracted by the lighting prism plates goes out in a predetermined direction. Therefor, the lighting prism plates and parts relevant thereto are formed under predetermined conditions.A solar lighting controller in a solar lighting apparatus operated under predetermined conditions for improvement of lighting efficiency, reduction of consumed electric power, etc., the controller comprising a solar position detector, a central processing unit including an arithmetic operation storage means such as a micro computer and a necessary means such as an optical axis sensor.

Abstract: An electroviscous fluid wherein an electrically insulating fluid is mixed with silica fine particles having esterified surfaces, and a polyhydric alcohol. Thus, it is possible to provide an electroviscous fluid which is excellent in dispersion stability and shelf stability, free from aggregation of particles even under heating conditions and capable of manifesting high electroviscous effect.

Abstract: Electroviscous fluid according to the present invention is used for vibration control machines and devices such as variable damper, engine mount, bearing damper, clutch, valve, shock absorber, precision machine, accoustic machine, etc. and for display element. It has high electroviscous effect and wider application temperature range, and the electroviscous effect is stable.

Abstract: Diphenylpyrrolyfuran derivatives represented by the following formula (I): ##STR1## wherein R.sub.1 and R.sub.2 may be the same or different and independently represent a hydrogen atom, a halogen atom, a lower alkyl group, a lower alkoxy group, a lower alkylthio group, or a lower alkylsulfenyl group; m and n independently represent an integer of from 1 to 3; R.sub.3 represents a hydrogen atom or a lower alkyl group, R.sub.4 represents a hydrogen atom, a lower alkyl group, or a lower acyl group; and R.sub.5 represents a hydrogen atom, a lower alkyl group which may have one or more suitable substituents, a lower alkoxy- or an aryloxy-carbonyl group, an acyl group, or a sufonyl group, and pharmaceutically acceptable salts thereof are disclosed. The compounds disclosed are useful as anti-inflammatory agent, anti-allergic agents, anti-platelet agents and the like.