Abstract: A microprocessor according to the present invention comprises a sub-read bus, to which output terminals of registers of a register file of the microprocessor are coupled. The sub-read bus is in turn coupled to a main read bus of the microprocessor through a bus output circuit. Upon occurrence of a read access to any of the registers, the bus output circuit couples the sub-read bus with the main read bus, whereby data read out from the registers to the sub-read bus are transmitted to the main read bus, and under no existence of the read access, the bus output circuit interrupts the data transmission from the sub-read bus to the main read bus. With this, a load capacitance of the read bus is reduced. As a result, a time for making access to the read bus is much improved.

Abstract: A process for producing L-lysine by fermentation includes the steps of culturing a microorganism belonging to the genus Corynebacterium having a resistance to iodothyronine in a nutrient medium to form and accumulate L-lysine in the resulting culture and recovering the L-lysine therefrom.

Abstract: A thermal transfer printer which can use both an ink sheet provided with a positioning mark to indicate the top position of a set of three color ink patches necessary for producing one image, and an ink sheet provided with no such positioning mark, without the need of switching an operation mode. The thermal transfer printer has an optical sensor which can equally detect a color change between 3rd and 1st color patches on the ink sheet provided with no positioning mark and a color change between a positioning mark and a 1st color patch on the ink sheet provided with the positioning mark. There is also disclosed an ink sheet cassette for use in the thermal transfer printer, the ink sheet cassette accommodating the ink sheet in which a positioning mark is coated with the same color(s) of ink as those for printing and information about the color sequence of the ink coated patches for printing is also recorded in the coated pattern of the positioning mark.

Abstract: There are provided a bipolar-MOS IC device smaller than half-micron scale, and a combination of such IC device and external circuits. The IC device has an internal voltage generating circuit for generating an internal power source by using an external power source, the voltage of the internal power source being lower than that of the external power source. The internal voltage generating circuit includes an NPN transistor formed in an N-type region or N-type island within a P-type semiconductor substrate of the IC device, and a PMOS transistor formed in the N-type island. The collector of the NPN transistor and the source of the PMOS transistor are used as external power source terminals. The drain of the PMOS transistor is connected to the base of the NPN transistor. The gate is used as a control signal terminal. The emitter of the NPN transistor is used as an internal power source output terminal.

Abstract: In a semiconductor integrated circuit, drain-source paths of an NMOS transistor and a PMOS transistor are connected between the base and emitter of a bipolar transistor, and control signals are applied to gates of the NMOS transistor and the PMOS transistor so as to keep the NMOS transistor and the PMOS transistor at OFF condition when the bipolar transistor is operating and so as to keep the NMOS transistor and the PMOS transistor at ON condition when the bipolar transistor is in the quiescent state.

Abstract: A thermal transfer printer which can use both an ink sheet provided with a positioning mark to indicate the top position of a set of three color ink patches necessary for producing one image, and an ink sheet provided with no such positioning mark, without the need of switching the operation mode. The thermal transfer printer has an optical sensor which can equally detect color change between 3rd and 1st color patches for the ink sheet provided with no positioning mark and color change between a positioning mark and 1st color patch for the ink sheet provided with the positioning mark. There is also disclosed an ink sheet cassette for use in the thermal transfer printer, the ink sheet cassette accommodating the ink sheet in which a positioning mark is coated with the same color(s) of ink as those for printing and information about the color sequence of the ink coated patches for printing is also recorded in the coated pattern of the positioning mark.

Abstract: An arithmetic operation circuit is provided which includes a logic processing circuit having a first metal-oxide-semiconductor-field-effect-transistor (MOSFET) column cascade-connecting a plurality of MOSFETs and a second MOSFET column cascade-connecting a plurality of MOSFETs. First and second ends of the second MOSFET column are respectively connected to first and second ends of said first column. A first power supply voltage is coupled to the common connecting point of the first ends of said first and second MOSFET columns. An amplifying circuit, including the grounded emitter type bipolar transistor, is provided such that the base thereof is connected to the common connecting point of the second ends of said first and second MOSFET columns.

Abstract: A semiconductor memory includes an array of memory cells wherein each memory cell is disposed at the intersection between a word line and a data line. An output line of the memory is coupled to the data line via transfer MOSFET and a data line signal detecting circuit, the latter being provided between the common data line and the output line. A precharging circuit for precharging the data line and a feedback circuit for coupling together the output and input sides of the data line signal detecting circuit are provided.

Abstract: A semiconductor memory includes an array of memory cells wherein each memory cell is disposed at the intersection between a word line and a data line. An output line of the memory is coupled to the data line via transfer MOSFET and a data line signal detecting circuit, the latter being provided between the common data line and the output line. A precharging circuit for precharging the data line and a feedback circuit for coupling together the output and input sides of the data line signal detecting circuit are provided.

Abstract: A semiconductor memory is provided including a plurality of row lines, memory cells driven by selecting a row line, sense amplifiers connected to the memory cells via column lines, and a column line voltage setting circuit for setting a predetermined voltage on the column lines. The predetermined voltage is defined by a voltage necessary to activate semiconductor switch elements constituting the column line voltage setting circuit, and is made nearly equal to the threshold voltage of the sense amplifiers. Thus, a high-speed, low power consumption semiconductor memory can be realized.