Patents by Inventor Tetsuo Ono
Tetsuo Ono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20130109184Abstract: It is an object of the present invention to provide a plasma etching method that can improve a selection ratio of a film to be etched to a film different from the film to be etched than that in the related art. The present invention provides a plasma etching method for selectively etching a film to be etched with respect to another film different from the film to be etched, the plasma etching method including etching, using gas that can generate a deposited film containing components same as components of the another film different from the film to be etched, the film on which generation of the deposited film is suppressed.Type: ApplicationFiled: February 1, 2012Publication date: May 2, 2013Inventors: Tomoyuki WATANABE, Mamoru Yakushiji, Michikazu Morimoto, Tetsuo Ono
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Patent number: 8365993Abstract: A product sales processing system includes a portable terminal; a cash register, a customer operating the portable terminal so that product codes are read and stored in the portable terminal, and payment is made at the cash register based on the stored data; and an intermediating device that connects the portable terminal to the cash register such that the portable terminal and the cash register can communicate with each other, the portable terminal comprising: a code reading section that reads the codes that are provided to products; a storage section that stores the codes which have been read by the code reading section; and a communication section that, when the portable terminal is connected to the intermediating device, transmits product purchase information which includes the codes stored in the storage section to the cash register via the intermediating device.Type: GrantFiled: November 27, 2007Date of Patent: February 5, 2013Assignee: Teraoka Seiko Co., Ltd.Inventors: Kazuharu Teraoka, Tetsuo Ono, Ryouichi Katata
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Publication number: 20130029492Abstract: A plasma processing method and a plasma processing apparatus in which a stable process region can be ensured in a wide range, from low microwave power to high microwave power. The plasma processing method includes making production of plasma easy in a region in which production of plasma by continuous discharge is difficult, and plasma-processing an object to be processed, with the generated plasma, wherein the plasma is produced by pulsed discharge in which ON and OFF are repeated, radio-frequency power for producing the pulsed discharge, during an ON period, is a power to facilitate production of plasma by continuous discharge, and a duty ratio of the pulsed discharge is controlled so that an average power of the radio-frequency power per cycle is power in the region in which production of plasma by continuous discharge is difficult.Type: ApplicationFiled: February 1, 2012Publication date: January 31, 2013Inventors: Yoshiharu INOUE, Tetsuo ONO, Michikazu MORIMOTO, Masaki FUJII, Masakazu MIYAJI
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Publication number: 20130001197Abstract: In a plasma processing method for conducting etching on an object to be processed by generating plasma from depositional gas introduced into a processing chamber and exposing the object to be processed to the plasma in a state in which radio frequency power is applied, the object to be processed is etched under etching conditions that a deposit film on an inner wall of the processing chamber becomes amorphous by repeating a first period during which the object to be processed is exposed to plasma and a second period during which the object to be processed is exposed to plasma and an etching rate is lower as compared with the first period. Consequently, particles due to increase in the number of processed sheets of the object to be processed can be suppressed.Type: ApplicationFiled: August 16, 2011Publication date: January 3, 2013Inventors: Yoshiharu INOUE, Michikazu MORIMOTO, Tsuyoshi MATSUMOTO, Tetsuo ONO, Tadamitsu KANEKIYO, Mamoru YAKUSHIJI, Masakazu MIYAJI
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Publication number: 20120252219Abstract: Provided are a plasma processing apparatus with a radio-frequency power supply supplying temporally modulated intermittent radio-frequency power which can be controlled with high precision in a wide repetition frequency band, and a plasma processing method using the plasma processing apparatus. A plasma processing apparatus includes: a vacuum vessel; a plasma generating section plasma in the vacuum vessel; a stage installed in the vacuum vessel and mounted with a sample; and a radio-frequency power supply applying temporally modulated intermittent radio-frequency power to the stage, wherein the radio-frequency power supply has two or more different frequency bands and temporally modulates the radio-frequency power by a repetition frequency which has the same range of analog signals used in each of the frequency band.Type: ApplicationFiled: July 19, 2011Publication date: October 4, 2012Inventors: Michikazu MORIMOTO, Yasuo OHGOSHI, Yuuzou OOHIRABARU, Tetsuo ONO
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Patent number: 8071397Abstract: A semiconductor fabricating method including: placing the semiconductor wafer having a film thereon inside of a chamber; generating plasma; detecting a quantity of interference lights for each of at least two wavelengths obtained from a surface of the wafer for a predetermined time period during the etching of the wafer; detecting a first time point at which the detected quantity of interference lights for one of the two wavelengths becomes a maximum and a second time point at which the detected quantity of interference lights for the other wavelength becomes a minimum; determining a state of etching based on a result of comparing a predetermined value with an interval between the first and second time points, wherein both time points are detected by using outputs of a detector for detecting a quantity of the interference lights; and controlling etching in accordance with the determining.Type: GrantFiled: August 17, 2007Date of Patent: December 6, 2011Assignee: Hitachi High-Technologies CorporationInventors: Tatehito Usui, Motohiko Yoshigai, Kazuhiro Jyouo, Tetsuo Ono
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Publication number: 20110104882Abstract: The present invention relates to a method for processing semiconductor devices with a fine structure, and more particularly, to a processing method suitable for miniaturizing semiconductor devices with a so-called high-k/metal gate structure. In an embodiment of the present invention, a deposited film, which includes an insulating film made of Hf or Zr and a material of Mg, Y or Al existing on, under or in the insulating film, is formed on a Si substrate and is removed by repeating a dry etching process and a wet etching process at least one time. The wet etching process is performed prior to the dry etching process.Type: ApplicationFiled: January 27, 2010Publication date: May 5, 2011Inventors: Tetsuo ONO, Tetsu Morooka
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Patent number: 7771607Abstract: A plasma processing method for processing a substrate with plasma by applying a high frequency to a reaction chamber, and applying a second high frequency to a substrate holder includes covering at least 90% of a total surface area of an inner wall of the reaction chamber that is directly exposed to plasma with a dielectric, disposing a DC earth comprising a conductive portion that is earthed and having an area less than 10% of the inner wall of the reaction chamber, and performing plasma processing to the substrate in the reaction chamber having the DC earth located at a position where a floating potential of plasma is higher than the floating potential of plasma at the inner wall of the reaction chamber that is closest to the substrate.Type: GrantFiled: April 4, 2007Date of Patent: August 10, 2010Assignees: Hitachi, Ltd., Hitachi High-Technologies CorporationInventors: Tsutomu Tetsuka, Kazuyuki Ikenaga, Tetsuo Ono, Motohiko Yoshigai, Naoshi Itabashi
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Publication number: 20090325388Abstract: In a semiconductor that has a structure in which a work function controlling metal conductor is provided on a high dielectric insulation film, fine processing is performed without deteriorating a device. In a method of semiconductor processing, in which the semiconductor has an insulation film containing Hf or Zr formed on a semiconductor substrate and a conductor film containing Ti or Ta or Ru formed on an insulation film, and the conductor film is processed by using a resist formed on the conductor film under a plasma atmosphere, the resist is removed under the plasma atmosphere of gas that contains hydrogen and does not contain oxygen.Type: ApplicationFiled: August 26, 2008Publication date: December 31, 2009Inventors: Tetsuo Ono, Go Saito
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Patent number: 7611993Abstract: A plasma processing method for processing a sample by applying a high-frequency bias power periodically for each one period (T) which is divided along a time axis into a first sub-period (T1) for which feedback control of a CD gain is executed, a second sub-period (T2) for which feedback control of a select ratio is executed, and a third sub-period (T3) for which feedback control of both the CD gain and the select ratio are executed. The applied power is set at a large value in the first sub-period, and a duty ratio T1/T is controlled in accordance with the CD gain. A plurality of samples are processed with preset process conditions, and feedback control for each processing unit of the samples is executed in accordance with a processing state of each of the samples so that an average applied power over the one period (T) is constant.Type: GrantFiled: April 5, 2007Date of Patent: November 3, 2009Assignee: Hitachi High-Technologies CorporationInventors: Tetsuo Ono, Katsumi Setoguchi, Hideyuki Yamamoto
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Patent number: 7601241Abstract: A plasma processing apparatus having 90% or more of a side wall of an inner wall 101 of a reaction chamber 1 covered with a dielectric 102, and equipped with an earthed conductive member 21a having an area of less than 10% of the side wall area of the inner wall 101 and having a structure to allow direct current from a plasma to flow therein, wherein the DC earth formed of the conductive member 21 is located at a position where floating potential of plasma (or plasma density) is higher than the floating potential of plasma 9 located near a wafer holding electrode 14 where there is relatively large wall chipping.Type: GrantFiled: February 24, 2004Date of Patent: October 13, 2009Assignees: Hitachi, Ltd., Hitachi High-Technologies CorporationInventors: Tsutomu Tetsuka, Kazuyuki Ikenaga, Tetsuo Ono, Motohiko Yoshigai, Naoshi Itabashi
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Publication number: 20090090007Abstract: A gear is manufactured in a half blanking stage, a punching stage and a separating stage. In the half blanking stage, half blanking is performed for a columnar portion of a metal sheet. A part of an outer circumferential surface of the blank is disconnected from the other portion of the sheet, while the other part of the outer circumferential surface of the blank is connected with the other portion of the sheet. In the punching stage, an inner portion of the blank is punched in a punching direction to form teeth on an inner circumferential surface of the blank. In the separating stage, the blank is separated from the other portion of the sheet as a gear toward a separation direction opposite to the punching direction by disconnecting the other part of the outer circumferential surface of the blank from the other portion of the sheet.Type: ApplicationFiled: October 2, 2008Publication date: April 9, 2009Applicant: DENSO CORPORATIONInventors: Masahiro Takada, Shigenari Takigiri, Tetsuo Ono
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Publication number: 20080257863Abstract: A plasma processing apparatus is disclosed for removing the deposition film in the processing chamber and suppressing the corrosion of wall surface material. The plasma processing apparatus includes a plasma generating means, a monitor means for detecting the existence of a reaction product containing a material constituting an inner wall of the processing chamber, and an alarm means for notifying that the existence of the reaction product containing the material constituting the inner wall of the processing chamber has exceeded a predetermined amount. The plasma processing apparatus is configured such that plasma cleaning is performed for every arbitrary etching process, and a wall surface stabilization process is subsequently performed using O2 gas or F gas.Type: ApplicationFiled: August 31, 2007Publication date: October 23, 2008Inventors: Hiroyuki Kitsunai, Naoshi Itabashi, Motohiko Yoshigai, Tetsuo Ono
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Publication number: 20080128497Abstract: A product sales processing system includes a portable terminal; a cash register, a customer operating the portable terminal so that product codes are read and stored in the portable terminal, and payment is made at the cash register based on the stored data; and an intermediating device that connects the portable terminal to the cash register such that the portable terminal and the cash register can communicate with each other, the portable terminal comprising: a code reading section that reads the codes that are provided to products; a storage section that stores the codes which have been read by the code reading section; and a communication section that, when the portable terminal is connected to the intermediating device, transmits product purchase information which includes the codes stored in the storage section to the cash register via the intermediating device.Type: ApplicationFiled: November 27, 2007Publication date: June 5, 2008Applicant: TERAOKA SEIKO CO., LTD.Inventors: Kazuharu Teraoka, Tetsuo Ono, Ryouichi Katata
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Publication number: 20080020495Abstract: A semiconductor fabricating method including: placing the semiconductor wafer having a film thereon inside of a chamber; generating plasma; detecting a quantity of interference lights for each of at least two wavelengths obtained from a surface of the wafer for a predetermined time period during the etching of the wafer; detecting a first time point at which the detected quantity of interference lights for one of the two wavelengths becomes a maximum and a second time point at which the detected quantity of interference lights for the other wavelength becomes a minimum; determining a state of etching based on a result of comparing a predetermined value with an interval between the first and second time points, wherein both time points are detected by using outputs of a detector for detecting a quantity of the interference lights; and controlling etching in accordance with the determining.Type: ApplicationFiled: August 17, 2007Publication date: January 24, 2008Inventors: Tatehito Usui, Motohiko Yoshigai, Kazuhiro Jyouo, Tetsuo Ono
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Patent number: 7259866Abstract: A semiconductor fabricating apparatus for etching a semiconductor wafer, which is placed in a chamber and which has a multiple-layer film composed of a first film formed on a surface thereof and a second film formed on the first film, using plasma generated in the chamber. The semiconductor fabricating apparatus includes a light detector that detects a change in an amount of light with a plurality of wavelengths obtained from the surface of the wafer for a predetermined time during which the second film is etched, and a detection unit that detects a thickness of the first film based on a specific waveform obtained from an output of the detector.Type: GrantFiled: November 30, 2005Date of Patent: August 21, 2007Assignee: Hitachi High-Technologies CorporationInventors: Tatehito Usui, Motohiko Yoshigai, Kazuhiro Jyouo, Tetsuo Ono
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Patent number: 7259104Abstract: A surface processing method of a sample having a mask layer that does not contain carbon as a major component formed on a substance to be processed, the substance being a metal, semiconductor and insulator deposited on a silicon substrate, includes the steps of installing the sample on a sample board in a vacuum container, generating a plasma that consists of a mixture of halogen gas and adhesive gas inside the vacuum container, applying a radio frequency bias voltage having a frequency ranging from 200 kHz to 20 MHz on the sample board, and controlling a periodic on-off of the radio frequency bias voltage with an on-off control frequency ranging from 100 Hz to 10 kHz.Type: GrantFiled: September 29, 2003Date of Patent: August 21, 2007Assignee: Hitachi, Ltd.Inventors: Tetsuo Ono, Takafumi Tokunaga, Tadashi Umezawa, Motohiko Yoshigai, Tatsumi Mizutani, Tokuo Kure, Masayuki Kojima, Takashi Sato, Yasushi Goto
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Publication number: 20070184562Abstract: A plasma processing method for processing a sample by applying a high-frequency bias power periodically for each one period (T) which is divided along a time axis into a first sub-period (T1) for which feedback control of a CD gain is executed, a second sub-period (T2) for which feedback control of a select ratio is executed, and a third sub-period (T3) for which feedback control of both the CD gain and the select ratio are executed. The applied power is set at a large value in the first sub-period, and a duty ratio T1/T is controlled in accordance with the CD gain. A plurality of samples are processed with preset process conditions, and feedback control for each processing unit of the samples is executed in accordance with a processing state of each of the samples so that an average applied power over the one period (T) is constant.Type: ApplicationFiled: April 5, 2007Publication date: August 9, 2007Inventors: Tetsuo ONO, Katsumi Setoguchi, Hideyuki Yamamoto
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Publication number: 20070175586Abstract: A plasma processing method for processing a substrate with plasma by applying a high frequency to a reaction chamber, and applying a second high frequency to a substrate holder includes covering at least 90% of a total surface area of an inner wall of the reaction chamber that is directly exposed to plasma with a dielectric, disposing a DC earth comprising a conductive portion that is earthed and having an area less than 10% of the inner wall of the reaction chamber, and performing plasma processing to the substrate in the reaction chamber having the DC earth located at a position where a floating potential of plasma is higher than the floating potential of plasma at the inner wall of the reaction chamber that is closest to the substrate.Type: ApplicationFiled: April 4, 2007Publication date: August 2, 2007Inventors: Tsutomu Tetsuka, Kazuyuki Ikenaga, Tetsuo Ono, Motohiko Yoshigai, Naoshi Itabashi
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Patent number: 7049243Abstract: A plasma processing method for etching a sample having a gate oxide film which generates a plasma in a vacuum chamber using electromagnetic waves, applies an rf bias power to the sample, turns off the rf bias power before a charged voltage of the sample reaches a breakdown voltage of the gate oxide film, turns on the rf bias power after the charged voltage of the sample has substantially dropped and repeats the turning on and off of the rf bias power to process the sample. The off-time is set at least longer than the on-time, and the plasma is generated by continuously supplying power to enable generation of the plasma during the repeated turning on and off of the rf bias power.Type: GrantFiled: January 12, 2004Date of Patent: May 23, 2006Assignee: Hitachi, Ltd.Inventors: Tetsuo Ono, Yasuhiro Nishimori, Takashi Sato, Naoyuki Kofuji, Masaru Izawa, Yasushi Goto, Ken Yoshioka, Hideyuki Kazumi, Tatsumi Mizutani, Tokuo Kure, Masayuki Kojima, Takafumi Tokunaga, Motohiko Yoshigai