Patents by Inventor Tetsuro Komatsu

Tetsuro Komatsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230278427
    Abstract: A display panel is capable of displaying at least one meter image including a pointer image constituting a pointer and a mark image constituting a mark that the pointer is adapted to point to. A processor controls display status of the mark image. The processor causes the mark image to be displayed on the display panel in a first display mode when the pointer image does not point to the mark image and causes the mark image to be displayed on the display panel in a second display mode when the pointer image points to the mark image. The first display mode and the second display mode are different.
    Type: Application
    Filed: March 1, 2023
    Publication date: September 7, 2023
    Applicant: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Hiroya OUE, Yasuhiro TAKADA, Tetsuro KOMATSU, Tatsuya MURAOKA, Motoki ASARI, Mayu OFUJI
  • Patent number: 9620669
    Abstract: According to one embodiment, a semiconductor light emitting device includes a light emitting chip and a fluorescent material layer. The light emitting chip includes a semiconductor layer, a first electrode, a second electrode, an insulating layer, a first interconnect layer, a second interconnect layer, a first metal pillar, a second metal pillar, and a resin layer. The semiconductor layer includes a light emitting layer, a first major surface, and a second major surface formed on a side opposite to the first major surface. The fluorescent material layer is provided on the first major surface and has a larger planer size than the light emitting chip.
    Type: Grant
    Filed: October 2, 2014
    Date of Patent: April 11, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiaki Sugizaki, Hideki Shibata, Akihiro Kojima, Masayuki Ishikawa, Hideo Tamura, Tetsuro Komatsu
  • Patent number: 9496471
    Abstract: A semiconductor light emitting device includes a semiconductor layer, a first electrode, a second electrode, a first interconnection section, a second interconnection section, and a varistor film. The semiconductor layer includes a light emitting layer. The first electrode is provided in a emitting region on the second surface. The second electrode is provided in a non-emitting region on the second surface. The first interconnection section is provided on the first electrode and electrically connected to the first electrode. The second interconnection section is provided on the second electrode and on the first electrode and electrically connected to the second electrode. The varistor film is provided in contact with the first electrode and the second interconnection section between the first electrode and the second interconnection section.
    Type: Grant
    Filed: August 10, 2015
    Date of Patent: November 15, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke Akimoto, Yoshiaki Sugizaki, Hideyuki Tomizawa, Masanobu Ando, Akihiro Kojima, Gen Watari, Naoya Ushiyama, Tetsuro Komatsu, Miyoko Shimada, Hideto Furuyama
  • Patent number: 9478722
    Abstract: A method for manufacturing a light emitting device includes forming a multilayer body including a light emitting layer so that a first surface thereof is adjacent to a first surface side of a translucent substrate. A dielectric film on a second surface side opposite to the first surface of the multilayer body is formed having first and second openings on a p-side electrode and an n-side electrode. A seed metal on the dielectric film and an exposed surface of the first and second openings form a p-side metal interconnect layer and an n-side metal interconnect layer separating the seed metal into a p-side seed metal and an n-side seed metal by removing a part of the seed metal. A resin is formed in a space from which the seed metal is removed.
    Type: Grant
    Filed: October 5, 2015
    Date of Patent: October 25, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoshiaki Sugizaki, Hideki Shibata, Masayuki Ishikawa, Hideo Tamura, Tetsuro Komatsu, Akihiro Kojima
  • Publication number: 20160027982
    Abstract: A method for manufacturing a light emitting device includes forming a multilayer body including a light emitting layer so that a first surface thereof is adjacent to a first surface side of a translucent substrate. A dielectric film on a second surface side opposite to the first surface of the multilayer body is formed having first and second openings on a p-side electrode and an n-side electrode. A seed metal on the dielectric film and an exposed surface of the first and second openings form a p-side metal interconnect layer and an n-side metal interconnect layer separating the seed metal into a p-side seed metal and an n-side seed metal by removing a part of the seed metal. A resin is formed in a space from which the seed metal is removed.
    Type: Application
    Filed: October 5, 2015
    Publication date: January 28, 2016
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoshiaki SUGIZAKI, Hideki SHIBATA, Masayuki ISHIKAWA, Hideo TAMURA, Tetsuro KOMATSU, Akihiro KOJIMA
  • Patent number: 9240531
    Abstract: A semiconductor light-emitting device includes a semiconductor light-emitting layer, a pair of electrodes, a fluorescent material layer and a chromaticity adjusting layer. The semiconductor light-emitting layer emits first light. The pair of electrodes is connected to the semiconductor light-emitting layer. The fluorescent material layer covers at least a center portion of the semiconductor light-emitting layer, and contains a fluorescent material to absorb the first light and radiate second light. The chromaticity adjusting layer covers at least a peripheral portion of the semiconductor light-emitting layer, is exposed to outside, and contains a fluorescent material with a concentration lower than a concentration of the fluorescent material in the fluorescent material layer.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: January 19, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Naoya Ushiyama, Gen Watari, Masanobu Ando, Tetsuro Komatsu
  • Publication number: 20150364664
    Abstract: A semiconductor light emitting device includes a semiconductor layer, a first electrode, a second electrode, a first interconnection section, a second interconnection section, and a varistor film. The semiconductor layer includes a light emitting layer. The first electrode is provided in a emitting region on the second surface. The second electrode is provided in a non-emitting region on the second surface. The first interconnection section is provided on the first electrode and electrically connected to the first electrode. The second interconnection section is provided on the second electrode and on the first electrode and electrically connected to the second electrode. The varistor film is provided in contact with the first electrode and the second interconnection section between the first electrode and the second interconnection section.
    Type: Application
    Filed: August 10, 2015
    Publication date: December 17, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke AKIMOTO, Yoshiaki SUGIZAKI, Hideyuki TOMIZAWA, Masanobu ANDO, Akihiro KOJIMA, Gen WATARI, Naoya USHIYAMA, Tetsuro KOMATSU, Miyoko SHIMADA, Hideto FURUYAMA
  • Patent number: 9184357
    Abstract: A method for manufacturing a light emitting device includes forming a multilayer body including a light emitting layer so that a first surface thereof is adjacent to a first surface side of a translucent substrate. A dielectric film on a second surface side opposite to the first surface of the multilayer body is formed having first and second openings on a p-side electrode and an n-side electrode. A seed metal on the dielectric film and an exposed surface of the first and second openings form a p-side metal interconnect layer and an n-side metal interconnect layer separating the seed metal into a p-side seed metal and an n-side seed metal by removing a part of the seed metal. A resin is formed in a space from which the seed metal is removed.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: November 10, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoshiaki Sugizaki, Hideki Shibata, Masayuki Ishikawa, Hideo Tamura, Tetsuro Komatsu, Akihiro Kojima
  • Patent number: 9136439
    Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a first electrode, a second electrode, a first interconnection section, a second interconnection section, and a varistor film. The semiconductor layer includes a light emitting layer. The first electrode is provided in a emitting region on the second surface. The second electrode is provided in a non-emitting region on the second surface. The first interconnection section is provided on the first electrode and electrically connected to the first electrode. The second interconnection section is provided on the second electrode and on the first electrode and electrically connected to the second electrode. The varistor film is provided in contact with the first electrode and the second interconnection section between the first electrode and the second interconnection section.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: September 15, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke Akimoto, Yoshiaki Sugizaki, Hideyuki Tomizawa, Masanobu Ando, Akihiro Kojima, Gen Watari, Naoya Ushiyama, Tetsuro Komatsu, Miyoko Shimada, Hideto Furuyama
  • Publication number: 20150115306
    Abstract: A semiconductor light-emitting device includes a semiconductor light-emitting layer, a pair of electrodes, a fluorescent material layer and a chromaticity adjusting layer. The semiconductor light-emitting layer emits first light. The pair of electrodes is connected to the semiconductor light-emitting layer. The fluorescent material layer covers at least a center portion of the semiconductor light-emitting layer, and contains a fluorescent material to absorb the first light and radiate second light. The chromaticity adjusting layer covers at least a peripheral portion of the semiconductor light-emitting layer, is exposed to outside, and contains a fluorescent material with a concentration lower than a concentration of the fluorescent material in the fluorescent material layer.
    Type: Application
    Filed: December 22, 2014
    Publication date: April 30, 2015
    Inventors: Naoya USHIYAMA, Gen WATARI, Masanobu ANDO, Tetsuro KOMATSU
  • Patent number: 8952409
    Abstract: According to one embodiment, a semiconductor light-emitting device includes a semiconductor light-emitting layer, a pair of electrodes, a fluorescent material layer and a chromaticity adjusting layer. The semiconductor light-emitting layer emits first light. The pair of electrodes is connected to the semiconductor light-emitting layer. The fluorescent material layer covers at least a center portion of the semiconductor light-emitting layer, and contains a fluorescent material to absorb the first light and radiate second light. The chromaticity adjusting layer covers at least a peripheral portion of the semiconductor light-emitting layer, is exposed to outside, and contains a fluorescent material with a concentration lower than a concentration of the fluorescent material in the fluorescent material layer.
    Type: Grant
    Filed: February 27, 2013
    Date of Patent: February 10, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoya Ushiyama, Gen Watari, Masanobu Ando, Tetsuro Komatsu
  • Publication number: 20150017750
    Abstract: According to one embodiment, a semiconductor light emitting device includes a light emitting chip and a fluorescent material layer. The light emitting chip includes a semiconductor layer, a first electrode, a second electrode, an insulating layer, a first interconnect layer, a second interconnect layer, a first metal pillar, a second metal pillar, and a resin layer. The semiconductor layer includes a light emitting layer, a first major surface, and a second major surface formed on a side opposite to the first major surface. The fluorescent material layer is provided on the first major surface and has a larger planer size than the light emitting chip.
    Type: Application
    Filed: October 2, 2014
    Publication date: January 15, 2015
    Inventors: Yoshiaki Sugizaki, Hideki Shibata, Akihiro Kojima, Masayuki Ishikawa, Hideo Tamura, Tetsuro Komatsu
  • Publication number: 20140361324
    Abstract: A light emitting device includes a light emitting element disposed on a portion of a first lead frame element, a first resin including a fluorescent material, and a second resin. The first resin is above the light emitting element. The second resin is between the first resin and the first lead frame element. In some embodiments, the second resin includes a filler material that reflects light emitted by the light emitting element. In some embodiments, the light emitting device includes a protective diode connected in reverse parallel with the light emitting element. In some embodiments, a transparent resin may be disposed first and second resins.
    Type: Application
    Filed: February 28, 2014
    Publication date: December 11, 2014
    Inventors: Naoya USHIYAMA, Kazuhiro INOUE, Kenji SHIMOMURA, Tetsuro KOMATSU, Toshihiro KUROKI, Toshihiro KOMEYA, Kazuhiro TAMURA, Yoshiharu TSUBOI, Teruo TAKEUCHI, Kazuhisa IWASHITA
  • Patent number: 8884327
    Abstract: According to one embodiment, a semiconductor light emitting device includes a light emitting chip and a fluorescent material layer. The light emitting chip includes a semiconductor layer, a first electrode, a second electrode, an insulating layer, a first interconnect layer, a second interconnect layer, a first metal pillar, a second metal pillar, and a resin layer. The semiconductor layer includes a light emitting layer, a first major surface, and a second major surface formed on a side opposite to the first major surface. The fluorescent material layer is provided on the first major surface and has a larger planer size than the light emitting chip.
    Type: Grant
    Filed: September 21, 2010
    Date of Patent: November 11, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiaki Sugizaki, Hideki Shibata, Akihiro Kojima, Masayuki Ishikawa, Hideo Tamura, Tetsuro Komatsu
  • Patent number: 8753907
    Abstract: According to one embodiment, a method for manufacturing a semiconductor light emitting device includes: preparing a metal plate including first frames and second frames, the first frames and the second frames being alternately arranged and spaced from each other, a light emitting element being fixed to each of the first frames, the light emitting element being connected to an adjacent one of the second frames via a metal wire; molding a first resin on the metal plate, the first resin covering the first frame, the second frame, and the light emitting element; forming in the first resin a groove defining a resin package including the first frame, the second frame, and the light emitting element; filling a second resin inside the groove; and forming the resin package with an outer edge of the first resin covered with the second resin by cutting the second resin along the groove.
    Type: Grant
    Filed: March 7, 2012
    Date of Patent: June 17, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenji Shimomura, Tetsuro Komatsu
  • Patent number: 8686464
    Abstract: According to one embodiment, an LED module includes a substrate, an interconnect layer, a light emitting diode (LED) package, and a reflection member. The interconnect layer is provided on the substrate. The LED package is mounted on the interconnect layer. The reflection member is provided on a region in the substrate where the LED package is not mounted and has a property of reflecting light emitted from the LED package. The LED package includes a first lead frame, a second lead frame, an LED chip, and a resin body. The first lead frame and the second lead frame are arranged apart from each other on the same plane. The LED chip is provided above the first lead frame and the second lead frame, with one terminal connected to the first lead frame and one other terminal connected to the second lead frame.
    Type: Grant
    Filed: March 22, 2011
    Date of Patent: April 1, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuhiro Inoue, Kazuhisa Iwashita, Teruo Takeuchi, Gen Watari, Tetsuro Komatsu, Tatsuo Tonedachi
  • Publication number: 20140070248
    Abstract: According to one embodiment, a semiconductor light-emitting device includes a semiconductor light-emitting layer, a pair of electrodes, a fluorescent material layer and a chromaticity adjusting layer. The semiconductor light-emitting layer emits first light. The pair of electrodes is connected to the semiconductor light-emitting layer. The fluorescent material layer covers at least a center portion of the semiconductor light-emitting layer, and contains a fluorescent material to absorb the first light and radiate second light. The chromaticity adjusting layer covers at least a peripheral portion of the semiconductor light-emitting layer, is exposed to outside, and contains a fluorescent material with a concentration lower than a concentration of the fluorescent material in the fluorescent material layer.
    Type: Application
    Filed: February 27, 2013
    Publication date: March 13, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Naoya USHIYAMA, Gen WATARI, Masanobu ANDO, Tetsuro KOMATSU
  • Publication number: 20130313590
    Abstract: According to one embodiment, a semiconductor light emitting device includes a semiconductor layer, a first electrode, a second electrode, a first interconnection section, a second interconnection section, and a varistor film. The semiconductor layer includes a light emitting layer. The first electrode is provided in a emitting region on the second surface. The second electrode is provided in a non-emitting region on the second surface. The first interconnection section is provided on the first electrode and electrically connected to the first electrode. The second interconnection section is provided on the second electrode and on the first electrode and electrically connected to the second electrode. The varistor film is provided in contact with the first electrode and the second interconnection section between the first electrode and the second interconnection section.
    Type: Application
    Filed: February 28, 2013
    Publication date: November 28, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke AKIMOTO, Yoshiaki SUGIZAKI, Hideyuki TOMIZAWA, Masanobu ANDO, Akihiro KOJIMA, Gen WATARI, Naoya USHIYAMA, Tetsuro KOMATSU, Miyoko SHIMADA, Hideto FURUYAMA
  • Patent number: 8525202
    Abstract: According to one embodiment, an LED package includes first and second lead frames, an LED chip and a resin body. The first and second lead frames are apart from each other. The LED chip is provided above the first and second lead frames, and the LED chip has one terminal connected to the first lead frame and another terminal connected to the second lead frame. In addition, the resin body covers the first and second lead frames and the LED chip, and has an upper surface with a surface roughness of 0.15 ?m or higher and a side surface with a surface roughness higher than the surface roughness of the upper surface.
    Type: Grant
    Filed: August 3, 2010
    Date of Patent: September 3, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Gen Watari, Satoshi Shimizu, Mami Yamamoto, Hidenori Egoshi, Hiroaki Oshio, Tatsuo Tonedachi, Kazuhisa Iwashita, Tetsuro Komatsu, Teruo Takeuchi
  • Patent number: D698744
    Type: Grant
    Filed: April 12, 2013
    Date of Patent: February 4, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mitsuhiro Kobayashi, Kazuhiro Tamura, Tetsuro Komatsu