Patents by Inventor Tetsuro Sawai
Tetsuro Sawai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8110929Abstract: A semiconductor module includes: a substrate having a wiring layer; a first rectangular-shaped semiconductor device mounted on one surface of the substrate; a second rectangular-shaped semiconductor device mounted on the other surface of the substrate. The first semiconductor device is arranged such that each side thereof is not parallel to that of the second semiconductor device, and that the first semiconductor device is superimposed on the second semiconductor device, when seen from the direction perpendicular to the surface of the substrate.Type: GrantFiled: May 27, 2008Date of Patent: February 7, 2012Assignee: Sanyo Electric Co., Ltd.Inventors: Toshikazu Imaoka, Tetsuro Sawai, Kenichi Kobayashi, Atsushi Nakano
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Patent number: 8110895Abstract: A first wiring layer in a circuit substrate structure is provided with a first inductor and a second inductor. A dielectric layer is provided with a first via and a second via electrically connected to the first inductor and the second inductor, respectively. A second wiring layer is provided with: a bridge electrically connecting the first via and the second via; and a conductive pattern provided around the bridge, the outer edge of the conductive pattern being located outside the outer edge of the first wiring pattern and the second wiring pattern in the first wiring layer. The bridge functions as a coplanar line and suppresses generation of electromagnetic field.Type: GrantFiled: May 27, 2010Date of Patent: February 7, 2012Assignee: Sanyo Electric Co., Ltd.Inventors: Toshikazu Imaoka, Tetsuro Sawai, Atsushi Saita, Takeshi Yamaguchi
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Patent number: 8063846Abstract: A semiconductor module includes a multilayer board, a first circuit element mounted on the multilayer board, a second circuit element stacked on the first circuit element, an interposer board, provided between the first circuit element and the second circuit element, which includes an antenna conductor, a passive element, mounted on the multilayer board, which is connected to the antenna conductor, and a molded resin layer which seals the respective elements. The antenna conductor is structured by a spiral-shaped wiring pattern and the both ends of the antenna conductor are connected to the passive element via a bonding wire. The antenna conductor functions as a loop antenna with the passive element inserted.Type: GrantFiled: December 28, 2007Date of Patent: November 22, 2011Assignee: Sanyo Electric Co., Ltd.Inventors: Toshikazu Imaoka, Takeshi Otsuka, Tetsuro Sawai
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Patent number: 7907390Abstract: A circuit device includes a metal substrate; and a plurality of circuit elements, mounted on the metal substrate, which electrically connects to the metal substrate. The metal substrate is made of a copper plate of high thermal conductivity. The metal substrate is demarcated into a plurality of sections by insulating films added with a filler for enhancing the thermal conductivity in resin. The circuit elements, which have respective independent operating potentials on a side of the metal substrate of the circuit elements, are respectively provided on separated copper plates.Type: GrantFiled: March 29, 2007Date of Patent: March 15, 2011Assignee: Sanyo Electric Co., Ltd.Inventors: Shin-ya Nakano, Yoh Takano, Tetsuro Sawai, Ryosuke Usui
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Publication number: 20100315790Abstract: A first wiring layer in a circuit substrate structure is provided with a first inductor and a second inductor. A dielectric layer is provided with a first via and a second via electrically connected to the first inductor and the second inductor, respectively. A second wiring layer is provided with: a bridge electrically connecting the first via and the second via; and a conductive pattern provided around the bridge, the outer edge of the conductive pattern being located outside the outer edge of the first wiring pattern and the second wiring pattern in the first wiring layer. The bridge functions as a coplanar line and suppresses generation of electromagnetic field.Type: ApplicationFiled: May 27, 2010Publication date: December 16, 2010Applicant: Sanyo Electric Co., Ltd.Inventors: Toshikazu Imaoka, Tetsuro Sawai, Atsushi Saita, Takeshi Yamaguchi
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Publication number: 20100290331Abstract: A signal current wiring line is configured to carry a signal current from a first circuit block to a second circuit block. A return current wiring line is configured to carry a return current from the second circuit block to the first circuit block. The signal current wiring line and the return current wiring line are stacked with an offset in the width direction so as to form a region between the surface of the casing on the second wiring line side and the signal current wiring line where the signal current wiring line faces the surface of the casing on the second wiring line side without the return current wiring line intervening between them.Type: ApplicationFiled: March 19, 2010Publication date: November 18, 2010Inventors: Yasuhiro KAIZAKI, Tetsuro Sawai, Sumitoshi Kawasaki
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Publication number: 20100252936Abstract: A semiconductor module includes: a substrate having a wiring layer; a first rectangular-shaped semiconductor device mounted on one surface of the substrate; a second rectangular-shaped semiconductor device mounted on the other surface of the substrate. The first semiconductor device is arranged such that each side thereof is not parallel to that of the second semiconductor device, and that the first semiconductor device is superimposed on the second semiconductor device, when seen from the direction perpendicular to the surface of the substrate.Type: ApplicationFiled: May 27, 2008Publication date: October 7, 2010Inventors: Toshikazu Imaoka, Tetsuro Sawai, Kenichi Kobayashi, Atsushi Nakano
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Publication number: 20100201447Abstract: A radio-frequency circuit comprises a low-noise amplifier, an NMOS mixer for converting a radio-frequency signal output from the low-noise amplifier into an intermediate-frequency signal, a polyphase filter for removing image noises, and a PMOS mixer for converting the intermediate-frequency signal passed through the polyphase filter into a baseband signal.Type: ApplicationFiled: April 21, 2010Publication date: August 12, 2010Applicant: SEMICONDUCTOR TECHNOLOGY ACADAMIC RESEARCH CENTERInventors: Akira Hyogo, Satoshi Tanaka, Tetsuro Sawai, Kenichi Agawa, Hirotada Honma, Ryutaro Saito, Tomoki Hikichi, Keitaro Sekine
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Patent number: 7750434Abstract: A first wiring layer in a circuit substrate structure is provided with a first inductor and a second inductor. A dielectric layer is provided with a first via and a second via electrically connected to the first inductor and the second inductor, respectively. A second wiring layer is provided with: a bridge electrically connecting the first via and the second via; and a conductive pattern provided around the bridge, the outer edge of the conductive pattern being located outside the outer edge of the first wiring pattern and the second wiring pattern in the first wiring layer. The bridge functions as a coplanar line and suppresses generation of electromagnetic field.Type: GrantFiled: January 20, 2006Date of Patent: July 6, 2010Assignee: Sanyo Electric Co., Ltd.Inventors: Toshikazu Imaoka, Tetsuro Sawai, Atsushi Saita, Takeshi Yamaguchi, Makoto Tsubonoya, Kazunari Kurokawa
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Patent number: 7453153Abstract: The ground noise is reduced which propagates between circuit elements in a circuit device having a multiple stack structure. A grounding bonding pad provided on the surface of a second circuit element is connected to a bonding wire provided on the surface of a conduction layer via a grounding wire such as gold. A bonding pad provided on the surface of the conductive layer is connected to a lead provided on a ground wire via a grounding wire such as gold. This structure creates a capacitance between the second circuit element and the conduction layer so as to prevent the propagation of noise circuit from element to the ground wiring.Type: GrantFiled: March 29, 2006Date of Patent: November 18, 2008Assignee: Sanyo Electric Co., Ltd.Inventors: Atsushi Saita, Toshikazu Imaoka, Tetsuro Sawai, Yasunori Inoue
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Patent number: 7450397Abstract: A wiring board in which a line can be made narrower and/or a transmission loss can be reduced is developed. The wiring board includes a first conductor and a second conductor maintained at the same potential, a dielectric material layer provided between the first and second conductors, and a third conductor embedded in the dielectric material layer. In the wiring board, a thickness of the dielectric material layer in a first region located between the third conductor and the first conductor is larger than a thickness of the dielectric material layer in a second region located between the third conductor and the second conductor. Moreover, a cross-sectional shape of the third conductor is trapezoidal in which angles of respective ends of the third conductor on a side closer to the second conductor are obtuse.Type: GrantFiled: March 24, 2006Date of Patent: November 11, 2008Assignee: Sanyo Electric Co., Ltd.Inventors: Atsushi Saita, Toshikazu Imaoka, Tetsuro Sawai
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Patent number: 7432580Abstract: A semiconductor apparatus comprises a substrate, a semiconductor chip fixedly secured on one side of the substrate, a spirally shaped coil formed on the other side of the substrate and electrically connected to the semiconductor chip, and a conductive pattern formed on a surface of the one side of the substrate facing to the semiconductor chip for stabilizing an inductance characteristic of the coil.Type: GrantFiled: December 20, 2005Date of Patent: October 7, 2008Assignees: Sanyo Electric Co., Ltd., Kanto Sanyo Semiconductors Co., Ltd.Inventors: Akihiro Sato, Satoru Sekiguchi, Kiyokazu Kamado, Kazunari Kurokawa, Makoto Tsubonoya, Kiyoshi Mita, Yoichi Nabeta, Tetsuro Sawai, Toshikazu Imaoka
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Publication number: 20080203557Abstract: Warp of a circuit device manufactured by the wafer level packaging technology is reduced. A semiconductor substrate used in a circuit device is provided with a circuit device and electrodes connected to the circuit device. A wiring layer having bumps connected to the electrodes is provided on a major surface of the semiconductor substrate. A metal layer is provided on a surface opposite to the major surface of the semiconductor substrate.Type: ApplicationFiled: January 30, 2008Publication date: August 28, 2008Applicant: Sanyo Electric Co., Ltd.Inventors: Tetsuya Yamamoto, Yoshio Okayama, Yasuyuki Yanase, Tetsuro Sawai
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Publication number: 20080158091Abstract: A semiconductor module includes a multilayer board, a first circuit element mounted on the multilayer board, a second circuit element stacked on the first circuit element, an interposer board, provided between the first circuit element and the second circuit element, which includes an antenna conductor, a passive element, mounted on the multilayer board, which is connected to the antenna conductor, and a molded resin layer which seals the respective elements. The antenna conductor is structured by a spiral-shaped wiring pattern and the both ends of the antenna conductor are connected to the passive element via a bonding wire. The antenna conductor functions as a loop antenna with the passive element inserted.Type: ApplicationFiled: December 28, 2007Publication date: July 3, 2008Applicant: Sanyo Electric Co., Ltd.Inventors: Toshikazu Imaoka, Takeshi Otsuka, Tetsuro Sawai
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Publication number: 20080078571Abstract: A device mounting board includes: a wiring layer; opposing signal wires formed on respective conductive layers, being arranged in parallel with each other; a pair of pad electrodes formed on the top of the wiring layer; a pair of pad electrodes formed on the bottom of the wiring layer; conductor parts which are formed through insulating layers and establish electrical connection between the top and bottom conductive layers; a circuit device mounted on the top side of the wiring layer; and a pair of signal electrodes formed on this circuit device, being connected to the pair of pad electrodes via conductive members. A line extending from one of the pad electrodes on the top to one of the pad electrodes on the bottom through one signal wire and a line extending from the other pad electrode on the top to the other pad electrode on the bottom through the other signal wire constitute a pair of differential transmission lines of equal lengths.Type: ApplicationFiled: September 26, 2007Publication date: April 3, 2008Applicant: SANYO ELECTRIC CO., LTD.Inventors: Toshikazu Imaoka, Tetsuro Sawai
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Publication number: 20070230078Abstract: A circuit device includes a metal substrate; and a plurality of circuit elements, mounted on the metal substrate, which electrically connects to the metal substrate. The metal substrate is made of a copper plate of high thermal conductivity. The metal substrate is demarcated into a plurality of sections by insulating films added with a filler for enhancing the thermal conductivity in resin. The circuit elements, which have respective independent operating potentials on a side of the metal substrate of the circuit elements, are respectively provided on separated copper plates.Type: ApplicationFiled: March 29, 2007Publication date: October 4, 2007Applicant: SANYO ELECTRIC CO., LTD.Inventors: Shin-ya Nakano, Yoh Takano, Tetsuro Sawai, Ryosuke Usui
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Publication number: 20070176303Abstract: A highly reliable circuit device is provided at low cost. The circuit device includes a semiconductor element electrically connected to a wiring layer (copper plate and plating film) and passive parts sealed by a molded resin layer. The wiring layer has a predetermined pattern formed by a conductive member. The molded resin layer has projections protruding from gaps in the adjacent wiring layer toward an underside of the wiring layer. Thereby, the drop of yield is prevented and the highly reliable circuit device is provided at low cost.Type: ApplicationFiled: December 27, 2006Publication date: August 2, 2007Inventors: Makoto Murai, Ryosuke Usui, Tetsuro Sawai, Toshikazu Imaoka, Yasunori Inoue
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Publication number: 20060238961Abstract: The ground noise is reduced which propagates between circuit elements in a circuit device having a multiple stack structure. A grounding bonding pad provided on the surface of a second circuit element is connected to a bonding wire provided on the surface of a conduction layer via a grounding wire such as gold. A bonding pad provided on the surface of the conductive layer is connected to a lead provided on a ground wire via a grounding wire such as gold. This structure creates a capacitance between the second circuit element and the conduction layer so as to prevent the propagation of noise circuit from element to the ground wiring.Type: ApplicationFiled: March 29, 2006Publication date: October 26, 2006Inventors: Atsushi Saita, Toshikazu Imaoka, Tetsuro Sawai, Yasunori Inoue
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Publication number: 20060216484Abstract: A wiring board in which a line can be made narrower and/or a transmission loss can be reduced is developed. The wiring board includes a first conductor and a second conductor maintained at the same potential, a dielectric material layer provided between the first and second conductors, and a third conductor embedded in the dielectric material layer. In the wiring board, a thickness of the dielectric material layer in a first region located between the third conductor and the first conductor is larger than a thickness of the dielectric material layer in a second region located between the third conductor and the second conductor. Moreover, a cross-sectional shape of the third conductor is trapezoidal in which angles of respective ends of the third conductor on a side closer to the second conductor are obtuse.Type: ApplicationFiled: March 24, 2006Publication date: September 28, 2006Inventors: Atsushi Saita, Toshikazu Imaoka, Tetsuro Sawai
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Publication number: 20060194559Abstract: A radio-frequency circuit comprises a low-noise amplifier, an NMOS mixer for converting a radio-frequency signal output from the low-noise amplifier into an intermediate-frequency signal, a polyphase filter for removing image noises, and a PMOS mixer for converting the intermediate-frequency signal passed through the polyphase filter into a baseband signal.Type: ApplicationFiled: February 15, 2006Publication date: August 31, 2006Applicant: SEMICONDUCTOR TECHNOLOGY ACADEMIC RESEARCH CENTERInventors: Akira Hyogo, Satoshi Tanaka, Tetsuro Sawai, Kenichi Agawa, Hirotada Honma, Ryutaro Saito, Tomoki Hikichi, Keitaro Sekine