Abstract: Disclosed herein is a display apparatus including: a pixel array section including pixel circuits each having an electro optical device, a signal writing transistor, a signal storage capacitor, and a device driving transistor; and a pixel driving section, wherein: in a no-light emission period, the pixel driving section carries out a threshold-voltage correction process by changing an electric potential appearing on an electrode of the device driving transistor close to the electro optical device toward an electric potential obtained by subtracting the threshold voltage of the device driving transistor from the initialization electric potential of the gate electrode of the device driving transistor and a mobility correction process of negatively feeding a current flowing through the device driving transistor back to the gate electrode of the device driving transistor; and when a current is not flowing through the device driving transistor, the pixel driving section applies a positive bias voltage to the gate

Abstract: A pixel has an outer region extending linearly along a boundary with an adjacent pixel and an inner region extending along the inner side of the outer region. Wiring lines are arranged across the outer region and the inner region. An outer uneven zone is formed along the outer region and on a substrate due to level differences resulting from the presence of the wiring lines. Similarly, an inner uneven zone is formed along the inner region and on the substrate due to level differences resulting from the presence of the wiring lines. A pattern of a conductor film of which the wiring lines are made is formed properly such that recessed portions of the outer uneven zone are located directly behind their corresponding raised portions of the inner uneven zone, as viewed from inside the pixel.

Abstract: Disclosed herein is a display apparatus, including: a plurality of pixel circuits arrayed in a matrix; a driving wiring line to which the pixel circuits are connected; and a plurality of signal lines wired so as to cross with the driving wiring line and having the pixel circuits connected; the signal lines being wired in parallel to each other.

Abstract: A driving method for an organic EL light emitting section achieves optimization of mobility correction for a transistor of a driving circuit in response to luminance. In a driving circuit formed from a driving transistor, an image signal writing transistor and a capacitor section having a pair of electrodes, a driving method carries out a pre-process, a threshold voltage cancellation process and a writing process. A variable correction voltage which relies upon the image signal voltage is applied to a first node of the capacitor and a voltage which is higher than a potential of the second node of the capacitor in the threshold voltage cancellation process is applied to the drain electrode of the driving transistor, between the threshold voltage cancellation process and the writing process, to raise the potential of the second node in response to a characteristic of the driving transistor.

Abstract: A pixel has an outer region extending linearly along a boundary with an adjacent pixel and an inner region extending along the inner side of the outer region. Wiring lines are arranged across the outer region and the inner region. An outer uneven zone is formed along the outer region and on a substrate due to level differences resulting from the presence of the wiring lines. Similarly, an inner uneven zone is formed along the inner region and on the substrate due to level differences resulting from the presence of the wiring lines. A pattern of a conductor film of which the wiring lines are made is formed properly such that recessed portions of the outer uneven zone are located directly behind their corresponding raised portions of the inner uneven zone, as viewed from inside the pixel.

Abstract: An inverter circuit includes: first to third transistors; and first and second capacity elements. The first transistor makes/breaks connection between an output terminal and a first voltage line in response to potential difference between an input terminal and the first voltage line or its correspondent. The second transistor makes/breaks connection between a second voltage line and the output terminal in response to potential difference between a gate of the second transistor and the output terminal or its correspondent. The third transistor makes/breaks connection between a gate of the second transistor and a third voltage line in response to potential difference between the input terminal and the third voltage line or its correspondent. The first and second capacity elements are inserted in series between the input terminal and the gate of the second transistor. A junction between the first and second capacity elements is connected to the output terminal.

Abstract: An inverter circuit includes: a first transistor and a second transistor; a first switch and a second switch; and a first capacity element, in which the first and second transistors are connected in series between a first voltage line and a second voltage line, the first and second switches are connected in series between a supply voltage line and a gate of the second transistor, and are alternately turned on and off so as not to be turned on simultaneously, an end of the first capacity element is connected between the first switch and the second switch, and off-state of the first transistor allows a predetermined fixed voltage to be supplied from the supply voltage line to the gate of the second transistor through the first switch, the end of the first capacity element and the second switch.

Abstract: An active-matrix-type organic EL display panel having pixel circuits includes a main signal and a sub-signal line wired vertically in parallel to each other. There are two horizontal, parallel wiring lines connecting the main signal line and the sub-signal line.

Abstract: An inverter circuit includes: first and second transistors connected between first and second voltage lines; a fifth transistor having a drain connected to a fifth voltage line and a source connected to a gate of the second transistor; a first capacitive element between a gate and the source of the fifth transistor; a second capacitive element between a first input terminal and the source of the fifth transistor; and the third capacitive element between a second input terminal and the source of the fifth transistor. A first pulse signal into the first input terminal has a phase advanced more than a second pulse signal into the second input terminal. The second pulse signal is switched while the gate of the fifth transistor and the first voltage line are connected. The first pulse signal is switched while the gate of the fifth transistor and the first voltage line are unconnected.

Abstract: An inverter circuit including: first to third transistors; first and second switches; and a first capacitive element. The first and second transistors are connected in series between a first voltage line and a second voltage line. The third transistor is connected between the second voltage line and a gate of the second transistor. The first and second switches are connected in series between a voltage supply line and a gate of the third transistor, and are turned on/off alternately to prevent the first and second switches from simultaneously turning ON. One end of the first capacitive element is connected to a node between the first and second switches. Off-state of the first transistor allows a predetermined fixed voltage to be supplied from the voltage supply line to the gate of the second transistor, via the first switch, the one end of the first capacitive element and the second switch.

Abstract: A pixel circuit and driving method are disclosed, wherein the pixel circuit comprises a first transistor, a second transistor, and a capacitor. The first transistor is connected between a power source and a light emission portion, and the second transistor is connected to a data line. The capacitor is initialized according to a potential, and a video signal is applied from the data line to the capacitor through the second transistor. For driving, an initialization voltage is applied to the data line and the video signal is supplied to the data line, with the second transistor being turned ON prior to applying the initialization voltage to the data line.

Abstract: Disclosed herein is an electro luminescence display panel having a pixel structure corresponding to an active matrix drive system, including: a reverse bias potential generating portion configured to generate a reverse bias potential in which corresponding one of gradation values of pixels is reflected; and a voltage applying portion configured to apply the reverse bias potential to a gate electrode of a drive transistor composing a pixel circuit adapted to operate for a non-emission time period.

Abstract: Disclosed herein is a display including an acceptor substrate having thereon a red light-emitting element column, a green light-emitting element column, and a blue light-emitting element column that are arranged along a row direction and are each obtained by arranging rectangular organic light-emitting elements for generating light of one of red, green, and blue along a longitudinal direction of the organic light-emitting elements.

Abstract: A display apparatus includes a pixel unit in which pixels are arranged in a matrix pattern; and a driving circuit for driving the pixel unit. Each of the pixels includes a signal level holding capacitor; a first transistor that is turned on/off in response to a writing signal and via which one end of the signal level holding capacitor is connected to a signal line; a second transistor having one end of the signal level holding capacitor connected to a gate thereof and the other end of the signal level holding capacitor connected to a source thereof; a current-driven self-light-emitting element whose cathode is held at a cathode potential and whose anode is connected to the source of the second transistor; a third transistor that is turned on/off in response to a driving pulse signal; and a fourth transistor that is turned on/off in response to a control signal.

Abstract: With a source voltage of a transistor driving a light emitting element set to a fixed voltage, variations in an emission luminance due to variations in the threshold voltage of the transistor are corrected. The fixed voltage is set in accordance with a signal level of a drive pulse signal on-off controlling a transistor supplying power to the first transistor.

Abstract: There is provided a pixel circuit capable of obtaining high-luminance while suppressing power consumption. Further, there are provided a display panel having the pixel circuit, and a display device including the display panel. Still further, there is provided an electronic unit including the display device. The pixel circuit includes a first transistor driving a light-emitting element, a plurality of holding capacitors connected in series between a gate and a source of the first transistor, a second transistor provided between a first signal line and the gate of the first transistor, and a third transistor provided between a second signal line and one of junctions of the holding capacitors.

Abstract: There is provided a photodetection circuit and a photodetection method capable of obtaining high detection accuracy while reducing burn-in, and a display panel and a display including the above-described photodetection circuit. A photodetection circuit detecting incident light includes: a transistor provided between a fixed power supply line and a photodetection line; a photodiode provided between a gate of the transistor and a control line, and having a cathode directed toward the control line; a first capacitor connected, between the gate of the transistor and the control line, in parallel with the photodiode; and a second capacitor provided between the gate of the transistor and the fixed power supply line.

Abstract: A display apparatus and display driving method. A selective scan operation is performed on pixel circuits in row units, and a threshold-voltage correction operation is also performed to correct variations of the threshold voltage of respective pixel circuit driving transistors. Before performing the threshold-voltage correction operation in a horizontal scan period, a preparatory operation is performed in order to fix each of the electric potentials appearing on the gate and the source of the driving transistor at a predetermined level.

Abstract: Disclosed herein is a display apparatus, including: a pixel array section including a plurality of pixel circuits disposed in a matrix and each including a driving transistor for producing driving current, a storage capacitor for storing information of a image signal amplitude, an electro-optical element connected to an output terminal side of the driving transistor, and a sampling transistor for writing information of the signal amplitude into the storage capacitor, the driving transistor being operable to produce driving current based on the information stored in the storage capacitor and supply the driving current to the electro-optical element to cause the electro-optical element to emit light; a driving signal fixing circuit for keeping the driving current fixed; and a light blocking layer provided on the light input side of a transistor which participates in the driving signal fixing function and for preventing appearance of leak current of the transistors arising from light irradiation.

Abstract: Disclosed herein is a method of driving an organic electroluminescence emission portion, the driving method including the steps of: executing steps from preprocessing step to writing step for at least continuous three scanning time periods; applying a first node initialization voltage to corresponding one of the data lines, and supplying the video signal instead of the first node initialization voltage for each of the scanning time periods; applying the first node initialization voltage from the corresponding one of the data lines to the first node through the write transistor held in the ON state, thereby initializing the potential at the first node; and applying the first node initialization voltage from the corresponding one of the data lines to the first node through the write transistor held in an ON state, thereby holding the potential at the first node.