Patents by Inventor Tetsuro Yamamoto

Tetsuro Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8248397
    Abstract: Disclosed herein is a method of driving an organic electroluminescence emission portion, the driving method including the steps of: executing steps from preprocessing step to writing step for at least continuous three scanning time periods; applying a first node initialization voltage to corresponding one of the data lines, and supplying the video signal instead of the first node initialization voltage for each of the scanning time periods; applying the first node initialization voltage from the corresponding one of the data lines to the first node through the write transistor held in the ON state, thereby initializing the potential at the first node; and applying the first node initialization voltage from the corresponding one of the data lines to the first node through the write transistor held in an ON state, thereby holding the potential at the first node.
    Type: Grant
    Filed: October 9, 2008
    Date of Patent: August 21, 2012
    Assignee: Sony Corporation
    Inventors: Naobumi Toyomura, Katsuhide Uchino, Tetsuro Yamamoto
  • Patent number: 8248334
    Abstract: Disclosed herein is a method of driving an organic electroluminescence emission portion, the method including the steps of: applying a first node initialization voltage to corresponding one of the data lines, and supplying the video signal instead of the first node initialization voltage for a predetermined scanning time period, applying the first node initialization voltage from the corresponding one of the data lines to the first node through the write transistor held in an ON state for initializing the potential at the first node, and holding a state of applying the first node initialization voltage from the corresponding one of the data lines to the first node through the write transistor held in an ON state for holding the potential at the first node.
    Type: Grant
    Filed: August 26, 2008
    Date of Patent: August 21, 2012
    Assignee: Sony Corporation
    Inventors: Naobumi Toyomura, Tetsuro Yamamoto, Katsuhide Uchino
  • Patent number: 8237698
    Abstract: The present invention provides a panel, including: a plurality of pixel circuits disposed in rows and columns and each including a light emitting element for emitting light in response to driving current, a sampling transistor for sampling an image signal, a driving transistor for supplying the driving current to the light emitting element, and a storage capacitor for storing a predetermined potential; a power supplying section configured to supply a predetermined power supply voltage to the pixel circuits disposed in rows and columns; and a power supply line for connecting all of the pixel circuits disposed in rows and columns and the power supply section to each other.
    Type: Grant
    Filed: February 23, 2009
    Date of Patent: August 7, 2012
    Assignee: Sony Corporation
    Inventors: Tetsuro Yamamoto, Katsuhide Uchino
  • Patent number: 8232720
    Abstract: A display is provided. The display includes an acceptor substrate including red light-emitting elements arranged in a first column, green light-emitting elements arranged in a second column, and blue light-emitting elements arranged in a third column. The light-emitting elements are arranged along a row direction and are each obtained by arranging rectangular organic light-emitting elements for generating light of one of red, green, and blue along a longitudinal direction of the organic light-emitting elements.
    Type: Grant
    Filed: March 10, 2008
    Date of Patent: July 31, 2012
    Assignee: Sony Corporation
    Inventors: Keisuke Matsuo, Chiyoko Sato, Kohji Hanawa, Takanori Shibasaki, Tetsuro Yamamoto, Kiwamu Miura
  • Publication number: 20120182281
    Abstract: A sampling transistor in embodiments of the present invention is kept at the on-state with a time width shorter than one horizontal cycle, during the period from the rising of a control pulse supplied from a scanner to the falling of the control pulse, and samples a video signal Vsig from a signal line SL to write the video signal Vsig to a hold capacitor. A sampling transistor T1 has a double gate structure in which a pair of transistor elements are connected in common. This suppresses change in the threshold voltage of the sampling transistor.
    Type: Application
    Filed: March 23, 2012
    Publication date: July 19, 2012
    Applicant: Sony Corporation
    Inventors: Tetsuro Yamamoto, Junichi Yamashita, Seiichiro Jinta, Hideki Sugimoto, Katsuhide Uchino
  • Patent number: 8217865
    Abstract: A display apparatus includes a pixel array, a life control unit, a signal output unit, and a duty ratio transmission unit. The pixel array, including light-emitting elements constituting a screen, displays each frame of an image on the screen by emitting light having a luminance in accordance with a level of an image signal and continuously emits light from the screen within each frame for an amount of time specified by a duty ratio. The life control unit extends the life of the light-emitting elements by simultaneously adjusting the maximum permissible level of the image signal and the duty ratio. The signal output unit drives the screen to display an image by outputting an image signal adjusted within the maximum permissible level to the pixel array. The duty ratio transmission unit for enabling the screen to emit light for an amount of time specified transmitting an adjusted duty ratio to the pixel array.
    Type: Grant
    Filed: July 7, 2005
    Date of Patent: July 10, 2012
    Assignee: Sony Corporation
    Inventors: Mitsuru Tada, Tetsuro Yamamoto
  • Publication number: 20120169794
    Abstract: A pixel circuit, display device, and method of driving a pixel circuit enabling source-follower output with no deterioration of luminance even with a change of the current-voltage characteristic of the light emitting element along with elapse, enabling a source-follower circuit of n-channel transistors, and able to use an n-channel transistor as an EL drive transistor while using current anode-cathode electrodes, wherein a source of a TFT 111 as a drive transistor is connected to an anode of a light emitting element 114, a drain is connected to a power source potential VCC, a capacitor C111 is connected between a gate and source of the TFT 111, and a source potential of the TFT 111 is connected to a fixed potential through a TFT 113 as a switching transistor.
    Type: Application
    Filed: March 9, 2012
    Publication date: July 5, 2012
    Applicant: Sony Corporation
    Inventors: Katsuhide Uchino, Junichi Yamashita, Tetsuro Yamamoto
  • Patent number: 8212747
    Abstract: Disclosed herein is an image display device including a display section formed by arranging pixel circuits in a matrix form. Each pixel circuit includes at least a light emitting element, a drive transistor, a holding capacitor, and a write transistor. A light emission and non-light emission periods are alternately repeated. A light emission period start voltage and a non-light emission period start voltage are alternately output to the signal line. The terminal voltage of the holding capacitor is set to start the light emission and non-light emission periods. The write signal is set to sequentially delay the timings. The power drive signal is set in units of a plurality of successive lines. The drain voltage of the drive transistor is pulled up to high level at a time other than when the one of the terminals is connected to the signal line by the write signal in different lines.
    Type: Grant
    Filed: June 11, 2009
    Date of Patent: July 3, 2012
    Assignee: Sony Corporation
    Inventors: Tomoaki Handa, Katsuhide Uchino, Tetsuro Yamamoto
  • Publication number: 20120162164
    Abstract: A pixel circuit able to prevent a spread of the terminal voltages of drive transistors inside a panel and in turn able to reliably prevent deterioration of uniformity, wherein a source of a TFT serving as a drive transistor is connected to an anode of a light emitting element, a drain is connected to a power source potential, a capacitor is connected between a gate and source of the TFT, and a source potential of the TFT is connected to a fixed potential through a TFT serving as a switch transistor and wherein pixel circuit lines are connected by an upper line and bottom line and are arranged in parallel with pixel circuit power source voltage lines so as not to have intersecting parts.
    Type: Application
    Filed: March 6, 2012
    Publication date: June 28, 2012
    Applicant: Sony Corporation
    Inventors: Katsuhide UCHINO, Junichi YAMASHITA, Tetsuro YAMAMOTO
  • Publication number: 20120157632
    Abstract: The aim is to provide a flame retardant for thermoplastic resins that has a high flame-retardant imparting effect, and that produces a thermoplastic resin composition with superior moldability and workability that does not easily bleed out and a molded body with superior resistance to heat-moisture and chemicals; and a flame retardant for thermoplastic resins that has a high flame-retardant imparting effect, and that produces a flame retardant with a heat resistance to working temperatures of 300° C. or higher and a molded body with superior resistance to reflow heat and chemicals. Disclosed is a flame retardant, which is a specific flame retardant for thermoplastic resins comprising the reaction product of a nitrogen-containing compound and a phosphorous-containing compound, that is insoluble in toluene and comprises in the range of 5 to 10 wt % of phosphorus atoms.
    Type: Application
    Filed: August 24, 2010
    Publication date: June 21, 2012
    Applicant: KANEKA CORPORATION
    Inventors: Shuji Taketani, Hidekazu Kawakubo, Noriyuki Suzuki, Tetsuro Yamamoto, Yutaka Kaneda
  • Patent number: 8203510
    Abstract: A display apparatus, including: a pixel array section; and a driving section; the pixel array section including a plurality of scanning lines disposed along the direction of a row, a plurality of signal lines disposed along the direction of a column, a plurality of pixels disposed in rows and columns at places at which the scanning lines and the signal lines intersect with each other, and a plurality of feed lines disposed in parallel to the scanning lines; the driving section including a scanner for successively supplying a control signal to the scanning lines with a phase difference of a horizontal period, a selector for supplying an image signal having a signal potential, which changes over between a reference potential and a signal potential within each horizontal period, to the signal lines, and a power supply for supplying a power supply voltage, which changes over between a high potential and a low potential within each horizontal period, to the feed lines.
    Type: Grant
    Filed: January 13, 2009
    Date of Patent: June 19, 2012
    Assignee: Sony Corporation
    Inventors: Tetsuro Yamamoto, Katsuhide Uchino
  • Patent number: 8199077
    Abstract: Disclosed herein is a display apparatus, including a pixel array section; and a driving section; the pixel array section including a plurality of scanning lines extending along the direction of a row, a plurality of signal lines extending along the direction of a column, a plurality of pixels disposed in rows and columns at places at which the scanning lines and the signal lines intersect with each other, and a plurality of feed lines disposed in parallel to the scanning lines, the driving section including a signal selector for supplying a driving signal having a signal potential to the signal lines, a write scanner for successively supplying a control signal to the scanning lines, and a drive scanner for supplying a power supply, which changes over between a high potential and a low potential, to the feed lines.
    Type: Grant
    Filed: January 8, 2009
    Date of Patent: June 12, 2012
    Assignee: Sony Corporation
    Inventors: Tetsuro Yamamoto, Katsuhide Uchino
  • Patent number: 8199078
    Abstract: A display apparatus includes: a display area formed by disposing pixel circuits in a matrix; a signal line drive circuit for generating drive signals for signal lines in accordance with image data, and outputting the drive signals for the signal lines to signal lines of the display area, respectively; and a scanning line drive circuit for outputting write signals to scanning lines for write of the display area, respectively; wherein when there is no change in the image data, the scanning line drive circuit stops the write signals from being outputted.
    Type: Grant
    Filed: July 1, 2009
    Date of Patent: June 12, 2012
    Assignee: Sony Corporation
    Inventors: Tomoaki Handa, Tetsuro Yamamoto, Yuuki Seo, Katsuhide Uchino
  • Patent number: 8199143
    Abstract: The present invention provides a display apparatus, includes: a pixel array section; and a driving section; the pixel array section including a plurality of scanning lines extending along the direction of a row, a plurality of signal lines extending along the direction of a column, and a plurality of pixels disposed in rows and columns at places at which the scanning lines and the signal lines intersect with each other. The driving section including a write scanner and a signal selector.
    Type: Grant
    Filed: October 30, 2008
    Date of Patent: June 12, 2012
    Assignee: Sony Corporation
    Inventors: Tetsuro Yamamoto, Katsuhide Uchino, Naobumi Toyomura
  • Publication number: 20120133637
    Abstract: Disclosed herein is a display device including a pixel array part configured to include scan lines disposed along rows, signal lines disposed along columns, and pixels that are disposed at intersections of the scan lines and the signal lines and arranged in a matrix, each of the pixels having at least a sampling transistor, a drive transistor, a switching transistor, a hold capacitor, and a light-emitting element; and a drive part configured to include a scanner and a driver, the driver supplying a video signal to the signal lines along the columns.
    Type: Application
    Filed: February 6, 2012
    Publication date: May 31, 2012
    Applicant: Sony Corporation
    Inventors: Tetsuro Yamamoto, Katsuhide Uchino
  • Patent number: 8188944
    Abstract: In an embodiment of the present invention, a signal driver employs a two-stage system in which the potential of a signal line (SL) is switched from a reference potential (Vofs) to an intermediate potential (Vofs2), and then switched to a signal potential (Vsig) of a video signal. A scanner supplies a first control pulse to a scan line (WS) when the signal line (SL) is at the intermediate potential (Vofs2), and then supplies a second control pulse to thereby turn on and off a sampling transistor T1 when the signal line (SL) is at the signal potential (Vsig). Based on this configuration, two times of mobility correction (? correction) are carried out.
    Type: Grant
    Filed: December 1, 2008
    Date of Patent: May 29, 2012
    Assignee: Sony Corporation
    Inventors: Tetsuro Yamamoto, Katsuhide Uchino
  • Patent number: 8184075
    Abstract: An active matrix display device includes a driving section provided on a substrate, an insulating film stacked on the substrate, and light-emitting elements arranged in a matrix on the insulating film, and each of the light-emitting elements includes an light-emitting layer between its upper and lower electrodes, the active matrix display device being driven by the driving section provided for each of the light-emitting elements, the active matrix display device also including a first wiring required to cause the light-emitting element to emit light, and a second wiring disposed in the underlying layer of the first wiring via the insulating film, the second wiring also required to cause the light-emitting element to emit light, wherein the first or second wiring is branched into a plurality of wirings at the intersection between the two wirings.
    Type: Grant
    Filed: October 30, 2008
    Date of Patent: May 22, 2012
    Assignee: Sony Corporation
    Inventors: Hiroshi Sagawa, Takayuki Taneda, Tetsuro Yamamoto, Junichi Yamashita, Katsuhide Uchino, Yukihito Iida, Mitsuru Asano
  • Publication number: 20120112989
    Abstract: A pixel has an outer region extending linearly along a boundary with an adjacent pixel and an inner region extending along the inner side of the outer region. Wiring lines are arranged across the outer region and the inner region. An outer uneven zone is formed along the outer region and on a substrate due to level differences resulting from the presence of the wiring lines. Similarly, an inner uneven zone is formed along the inner region and on the substrate due to level differences resulting from the presence of the wiring lines. A pattern of a conductor film of which the wiring lines are made is formed properly such that recessed portions of the outer uneven zone are located directly behind their corresponding raised portions of the inner uneven zone, as viewed from inside the pixel.
    Type: Application
    Filed: January 16, 2012
    Publication date: May 10, 2012
    Applicant: SONY CORPORATION
    Inventors: Katsuhide UCHINO, Tetsuro YAMAMOTO
  • Patent number: 8174466
    Abstract: Disclosed herein is a display device including: a pixel array unit having pixel circuits arranged in a form of a matrix; and a control unit having a writing scanning unit for outputting, to the sampling transistor, a writing scanning pulse. The control unit effects control to supply a control input terminal of the drive transistor with a fixed potential for a threshold value correcting operation for retaining a voltage corresponding to a threshold voltage of the drive transistor in the storage capacitor. When setting a voltage across the storage capacitor to the threshold voltage of the drive transistor by repeating the threshold value correcting operation a plurality of times on a time division basis, the control unit effects control to perform each the threshold value correcting operation and the sampling transistor to a conducting state.
    Type: Grant
    Filed: February 12, 2008
    Date of Patent: May 8, 2012
    Assignee: Sony Corporation
    Inventors: Naobumi Toyomura, Katsuhide Uchino, Tetsuro Yamamoto
  • Patent number: 8169432
    Abstract: A sampling transistor in embodiments of the present invention is kept at the on-state with a time width shorter than one horizontal cycle, during the period from the rising of a control pulse supplied from a scanner to the falling of the control pulse, and samples a video signal Vsig from a signal line SL to write the video signal Vsig to a hold capacitor. A sampling transistor T1 has a double gate structure in which a pair of transistor elements are connected in common. This suppresses change in the threshold voltage of the sampling transistor.
    Type: Grant
    Filed: August 6, 2009
    Date of Patent: May 1, 2012
    Assignee: Sony Corporation
    Inventors: Tetsuro Yamamoto, Junichi Yamashita, Seiichiro Jinta, Hideki Sugimoto, Katsuhide Uchino