Patents by Inventor Tetsuro Yamamoto

Tetsuro Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150103061
    Abstract: A pixel circuit able to prevent a spread of the terminal voltages of drive transistors inside a panel and in turn able to reliably prevent deterioration of uniformity, wherein a source of a TFT serving as a drive transistor is connected to an anode of a light emitting element, a drain is connected to a power source potential, a capacitor is connected between a gate and source of the TFT, and a source potential of the TFT is connected to a fixed potential through a TFT serving as a switch transistor and wherein pixel circuit lines are connected by an upper line and bottom line and are arranged in parallel with pixel circuit power source voltage lines so as not to have intersecting parts.
    Type: Application
    Filed: December 16, 2014
    Publication date: April 16, 2015
    Applicant: Sony Corporation
    Inventors: Katsuhide UCHINO, Junichi YAMASHITA, Tetsuro YAMAMOTO
  • Publication number: 20150099106
    Abstract: A resin composition including 40 parts by weight or more and less than 95 parts by weight of a polycarbonate resin and 5 parts by weight or more and less than 60 parts by weight of a polyester-polyether copolymer as a base resin, wherein the polyester-polyether copolymer is a copolymer which is obtained by a polymerization using a germanium compound catalyst, includes aromatic polyester units and modified polyether units represented by the following general formula 1, and has an IV value within a range of 0.30 to 1.00 can be well-balanced in moldability, heat resistance, impact resistance, and low linear expansion property, without deteriorating a surface appearance of a molding obtained therefrom.
    Type: Application
    Filed: April 30, 2013
    Publication date: April 9, 2015
    Applicant: KANEKA CORPORATION
    Inventors: Hidekazu Kawakubo, Shuji Taketani, Tetsuro Yamamoto
  • Patent number: 9001011
    Abstract: An electroluminescent display panel has pixel circuits for an active matrix driving system. At least one of the pixel circuits has a thin-film transistor in which a portion of a pattern of a metal wiring material above a channel layer of the thin-film transistor is disposed to shield the channel region of the thin-film transistor.
    Type: Grant
    Filed: January 15, 2014
    Date of Patent: April 7, 2015
    Assignee: Sony Corporation
    Inventors: Junichi Yamashita, Tetsuro Yamamoto, Katsuhide Uchino
  • Publication number: 20150090997
    Abstract: Disclosed herein is a display apparatus, including: a plurality of subpixels disposed adjacent each other and forming one pixel which forms a unit for formation of a color image; the plurality of subpixels including a first subpixel which emits light of the shortest wavelength and a second subpixel disposed adjacent the first subpixel; the second subpixel having a light blocking member disposed between the second subpixel and the first subpixel and having a width greater than a channel length or a channel width of a transistor which forms the second subpixel.
    Type: Application
    Filed: November 25, 2014
    Publication date: April 2, 2015
    Inventors: Tetsuro Yamamoto, Katsuhide Uchino
  • Publication number: 20150084940
    Abstract: Disclosed herein is a display apparatus, including: a plurality of pixel circuits arrayed in a matrix; a driving wiring line to which the pixel circuits are connected; and a plurality of signal lines wired so as to cross with the driving wiring line and having the pixel circuits connected; the signal lines being wired in parallel to each other.
    Type: Application
    Filed: December 2, 2014
    Publication date: March 26, 2015
    Inventors: Tetsuro Yamamoto, Katsuhide Uchino, Naobumi Toyomura
  • Patent number: 8988415
    Abstract: A display device includes: a pixel array section having pixels arranged in a form of a matrix on a display panel; a first terminal group disposed on the display panel so as to correspond to each control line of a first control line group arranged in each pixel row of the pixel array section; a first wiring group for electrically connecting each terminal of the first terminal group to each control line of the first control line group; a second terminal group disposed on the display panel for a second control line group arranged in each pixel row of the pixel array section with a plurality of control lines as a unit; and a second wiring group for electrically connecting each terminal of the second terminal group to each control line of the second control line group through parts between the terminals of the first terminal group.
    Type: Grant
    Filed: January 9, 2013
    Date of Patent: March 24, 2015
    Assignee: Sony Corporation
    Inventors: Tetsuro Yamamoto, Katsuhide Uchino
  • Patent number: 8988326
    Abstract: A pixel circuit, display device, and method of driving a pixel circuit enabling source-follower output with no deterioration of luminance even with a change of the current-voltage characteristic of the light emitting element along with elapse, enabling a source-follower circuit of n-channel transistors, and able to use an n-channel transistor as an EL drive transistor while using current anode-cathode electrodes, wherein a source of a TFT 111 as a drive transistor is connected to an anode of a light emitting element 114, a drain is connected to a power source potential VCC, a capacitor C111 is connected between a gate and source of the TFT 111, and a source potential of the TFT 111 is connected to a fixed potential through a TFT 113 as a switching transistor.
    Type: Grant
    Filed: July 15, 2014
    Date of Patent: March 24, 2015
    Assignee: Sony Corporation
    Inventors: Katsuhide Uchino, Junichi Yamashita, Tetsuro Yamamoto
  • Patent number: 8982018
    Abstract: An EL display panel includes light emitting pixels disposed in a matrix and a driving circuit for driving the pixels. The driving circuit drives the pixels such that a threshold value correction operation is carried out commonly (simultaneously) for a group of multiple pixels, which are connected to a same signal line, and such that an operation of writing a signal potential corresponding to a gradation value is executed individually (time-sequentially) for the pixels in the group. The driving circuit applies a reset potential to the pixels in the group before executing the signal writing operation. The reset potential is lower than a reference potential that is used for the threshold value correction operation.
    Type: Grant
    Filed: January 11, 2013
    Date of Patent: March 17, 2015
    Assignee: Sony Corporation
    Inventors: Tetsuro Yamamoto, Katsuhide Uchino
  • Publication number: 20150070782
    Abstract: A lens barrel includes a first barrel which rotates around an optical axis; and a second barrel which supports the first barrel to slide freely around the optical axis and to be movable in an optical axis direction. One of the barrels includes a cam follower, and a cam groove is formed in the other. When the first barrel rotates, the cam follower slides in the cam groove. The cam groove includes first and second sliding portions, and an inclination angle of the first sliding portion to the optical axis is smaller than that of the second sliding portion. When transitioning from the collapsed to the photographing state, the cam follower slides on the first sliding portion and the first barrel extends. When transitioning from the photographing to the collapsed state, the cam follower slides on the second sliding portion and the first barrel is incorporated in the second barrel.
    Type: Application
    Filed: September 3, 2014
    Publication date: March 12, 2015
    Inventor: TETSURO YAMAMOTO
  • Patent number: 8976090
    Abstract: There is provided a pixel circuit capable of obtaining high-luminance while suppressing power consumption. Further, there are provided a display panel having the pixel circuit, and a display device including the display panel. Still further, there is provided an electronic unit including the display device. The pixel circuit includes a first transistor driving a light-emitting element, a plurality of holding capacitors connected in series between a gate and a source of the first transistor, a second transistor provided between a first signal line and the gate of the first transistor, and a third transistor provided between a second signal line and one of junctions of the holding capacitors.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: March 10, 2015
    Assignee: Sony Corporation
    Inventors: Tetsuro Yamamoto, Katsuhide Uchino
  • Publication number: 20150054802
    Abstract: A buffer circuit includes a first transistor circuit having a first conductivity type transistor, a second transistor circuit having a second conductivity type transistors, in which the first and second transistor circuits are serially connected between a first fixed power supply and a second fixed power supply, and input terminals and output terminals of each of the first and second transistor circuits are connected in common respectively, in which at least one transistor circuit of the first transistor circuit and the second transistor circuit is a double gate transistor, and in which wherein a switch element, when any one transistor circuit of the first and the second transistor circuits is in an operating state, is included to supply a voltage of a third fixed power supply to a common connection node of the double gate transistor of the other transistor circuit.
    Type: Application
    Filed: October 30, 2014
    Publication date: February 26, 2015
    Inventors: Tetsuro Yamamoto, Katsuhide Uchino
  • Publication number: 20150042232
    Abstract: A level shifter circuit, wherein a first and a second transistor circuit are connected serially, a third and a fourth transistor circuit are connected serially; a first input voltage is applied to the second transistor circuit and a second input voltage is applied to the fourth transistor circuit; an input terminal of the first transistor circuit is connected to an output terminal of the third and the fourth transistor circuits, and an input terminal of the third transistor circuit is connected to an output terminal of the first and the second transistor circuits; two transistor circuits of at least one side of two transistor circuits of a first fixed power source side and two transistor circuits of a second fixed power source side are configured of double gate transistors; and the level shifter circuit has a switch element for applying a voltage to a common connection node.
    Type: Application
    Filed: October 31, 2014
    Publication date: February 12, 2015
    Inventors: Tetsuro Yamamoto, Katsuhide Uchino
  • Patent number: 8941564
    Abstract: A display device including a pixel array having a plurality of pixels arranged in a matrix form, each of the pixels including a sampling transistor configured to sample a data potential from a video signal line which is insulated from and intersects a control line in response to the change in potential of the control line, and a light-emitting element configured to emit light at the brightness commensurate with the magnitude of the post-sampling data potential.
    Type: Grant
    Filed: January 16, 2013
    Date of Patent: January 27, 2015
    Assignee: Sony Corporation
    Inventors: Tetsuro Yamamoto, Katsuhide Uchino
  • Patent number: 8937583
    Abstract: The present invention provides a display apparatus, includes: a pixel array section including a plurality of scanning lines disposed in rows, a plurality of signal lines disposed in columns, and a plurality of pixels arranged in rows and columns at places at which the scanning lines and the signal lines intersect with each other; and a driving section configured to drive the pixels through the scanning lines and the signal lines; the driving section carrying out block-sequential driving wherein the scanning lines are grouped for each predetermined number to form blocks and the pixels disposed in rows and columns are sequentially driven in a unit of a block and line-sequential driving wherein the scanning lines are scanned in each of the blocks to sequentially drive the pixels in a unit of a row.
    Type: Grant
    Filed: November 13, 2008
    Date of Patent: January 20, 2015
    Assignee: Sony Corporation
    Inventors: Tetsuro Yamamoto, Katsuhide Uchino
  • Patent number: 8928647
    Abstract: An inverter circuit includes: a first transistor, a second transistor, a third transistor, a fourth transistor, and a fifth transistor; an input terminal and an output terminal; and a capacitor. The capacitor is inserted between a gate of the second transistor and one of a source and a drain of the second transistor in which the one is located on an output terminal side.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: January 6, 2015
    Assignee: Sony Corporation
    Inventors: Tetsuro Yamamoto, Katsuhide Uchino
  • Patent number: 8922472
    Abstract: A level shifter circuit, wherein a first and a second transistor circuit are connected serially, a third and a fourth transistor circuit are connected serially; a first input voltage is applied to the second transistor circuit and a second input voltage is applied to the fourth transistor circuit; an input terminal of the first transistor circuit is connected to an output terminal of the third and the fourth transistor circuits, and an input terminal of the third transistor circuit is connected to an output terminal of the first and the second transistor circuits; two transistor circuits of at least one side of two transistor circuits of a first fixed power source side and two transistor circuits of a second fixed power source side are configured of double gate transistors; and the level shifter circuit has a switch element for applying a voltage to a common connection node.
    Type: Grant
    Filed: October 31, 2012
    Date of Patent: December 30, 2014
    Assignee: Sony Corporation
    Inventors: Tetsuro Yamamoto, Katsuhide Uchino
  • Patent number: 8922538
    Abstract: Disclosed herein is a display apparatus, including: a plurality of subpixels disposed adjacent each other and forming one pixel which forms a unit for formation of a color image; the plurality of subpixels including a first subpixel which emits light of the shortest wavelength and a second subpixel disposed adjacent the first subpixel; the second subpixel having a light blocking member disposed between the second subpixel and the first subpixel and having a width greater than a channel length or a channel width of a transistor which forms the second subpixel.
    Type: Grant
    Filed: May 14, 2014
    Date of Patent: December 30, 2014
    Assignee: Sony Corporation
    Inventors: Tetsuro Yamamoto, Katsuhide Uchino
  • Patent number: 8922461
    Abstract: A display device includes: a display element including a plurality of sub-elements connected to retention capacities, respectively; a plurality of writing transistors arranged corresponding to the sub-elements, respectively, and writing an image signal to the retention capacities; and a plurality of driving transistors driving the sub-elements, respectively based on the image signal written through the writing transistors. The writing transistors, the driving transistors or both of them are aligned along a source-drain alignment direction in which a drain electrode and a source electrode of each transistor in the writing transistors and driving transistors are aligned, and the writing transistors, the driving transistors or both of them are arranged so that drain electrodes or source electrodes in a pair of transistors are immediately adjacent to each other, the pair of transistors being a pair of the writing transistors or the driving transistors, and being immediately adjacent to each other.
    Type: Grant
    Filed: April 28, 2009
    Date of Patent: December 30, 2014
    Assignee: Sony Corporation
    Inventors: Hiroshi Sagawa, Tetsuro Yamamoto, Katsuhide Uchino
  • Patent number: 8907940
    Abstract: A driving method for an organic EL light emitting section is provided which achieves optimization of a mobility correction process for a transistor of a driving circuit in response to luminance. The light emitting section may include a driving circuit with a driving transistor, an image signal writing transistor and a capacitor section having a pair of electrodes (corresponding to a first node ND1 and a second node ND2). A variable correction voltage which relies upon an image signal voltage is applied to the first node ND1 and a voltage which is higher than a potential of the second node ND2 in a threshold voltage cancellation process is applied to the drain electrode of the driving transistor, between the threshold voltage cancellation process and a writing process, to raise the potential of the second node ND2 in response to a characteristic of the driving transistor.
    Type: Grant
    Filed: November 5, 2012
    Date of Patent: December 9, 2014
    Assignee: Sony Corporation
    Inventors: Naobumi Toyomura, Katsuhide Uchino, Tetsuro Yamamoto
  • Publication number: 20140347337
    Abstract: A transistor connected to a power source for driving a light-emitting element driving transistor and a transistor setting to a predetermined voltage a source voltage of the light-emitting element driving transistor are commonly controlled by a control signal that takes one of three levels.
    Type: Application
    Filed: August 14, 2014
    Publication date: November 27, 2014
    Inventors: Katsuhide Uchino, Tetsuro Yamamoto, Junichi Yamashita